B8( 2$ti,omap3-gta04ti,omap36xxti,omap3 +7Goldelico GTA04A4chosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/serial@4806a000T/ocp@68000000/serial@4806c000\/ocp@68000000/serial@49020000d/ocp@68000000/serial@49042000l/spi_lcd/td028ttec1@0cpus+cpu@0arm,cortex-a8ucpucpus 'O 57pmu@54000000arm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus + pinmux@30 ti,omap3-padconfpinctrl-single08+2Odefault]pinmux_hsusb2_pins0g      {pinmux_uart1_pinsgRL{pinmux_uart2_pinsgJH{pinmux_uart3_pinsgnp{pinmux_mmc1_pins0g{backlight_pins_pimnuxg{pinmux_dss_dpi_pinsg{hdq_pinsg{pinmux_bma180_pinsg {pinmux_itg3200_pinsg{pinmux_hmc5843_pinsg{pinmux_twl4030_pinsgA{scm_conf@270sysconsimple-busp0+ p0{pbias_regulator@2b0ti,pbias-omap3ti,pbias-omappbias_mmc_omap2430pbias_mmc_omap2430w@-{clocks+mcbsp5_mux_fck@68ti,composite-mux-clockh{ mcbsp5_fckti,composite-clock {mcbsp1_mux_fck@4ti,composite-mux-clock{ mcbsp1_fckti,composite-clock {mcbsp2_mux_fck@4ti,composite-mux-clock {mcbsp2_fckti,composite-clock {mcbsp3_mux_fck@68ti,composite-mux-clock h{mcbsp3_fckti,composite-clock{mcbsp4_mux_fck@68ti,composite-mux-clock h{mcbsp4_fckti,composite-clock{clockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+2pinmux_twl4030_vpins g{aes@480c5000 ti,omap3-aesaesH PPABtxrxprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clockY{osc_sys_ck@d40 ti,mux-clock @{sys_ck@1270ti,divider-clockp {sys_clkout1@d70ti,gate-clock pdpll3_x2_ckfixed-factor-clock$/dpll3_m2x2_ckfixed-factor-clock$/{dpll4_x2_ckfixed-factor-clock$/corex2_fckfixed-factor-clock$/{ wkup_l4_ickfixed-factor-clock$/{Ocorex2_d3_fckfixed-factor-clock $/{corex2_d5_fckfixed-factor-clock $/{clockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clockomap_32k_fck fixed-clock{Avirt_12m_ck fixed-clock{virt_13m_ck fixed-clock]@{virt_19200000_ck fixed-clock${virt_26000000_ck fixed-clock{virt_38_4m_ck fixed-clockI{dpll4_ck@d00ti,omap3-dpll-per-j-type-clock D 0{dpll4_m2_ck@d48ti,divider-clock? H {!dpll4_m2x2_mul_ckfixed-factor-clock!$/{"dpll4_m2x2_ck@d00ti,hsdiv-gate-clock" 9{#omap_96m_alwon_fckfixed-factor-clock#$/{*dpll3_ck@d00ti,omap3-dpll-core-clock @ 0{dpll3_m3_ck@1140ti,divider-clock@ {$dpll3_m3x2_mul_ckfixed-factor-clock$$/{%dpll3_m3x2_ck@d00ti,hsdiv-gate-clock%  9{&emu_core_alwon_ckfixed-factor-clock&$/{csys_altclk fixed-clock{/mcbsp_clks fixed-clock{dpll3_m2_ck@d40ti,divider-clock @ {core_ckfixed-factor-clock$/{'dpll1_fck@940ti,divider-clock' @ {(dpll1_ck@904ti,omap3-dpll-clock(  $ @ 4{dpll1_x2_ckfixed-factor-clock$/{)dpll1_x2m2_ck@944ti,divider-clock) D {=cm_96m_fckfixed-factor-clock*$/{+omap_96m_fck@d40 ti,mux-clock+ @{Fdpll4_m3_ck@e40ti,divider-clock @ {,dpll4_m3x2_mul_ckfixed-factor-clock,$/{-dpll4_m3x2_ck@d00ti,hsdiv-gate-clock- 9{.omap_54m_fck@d40 ti,mux-clock./ @{9cm_96m_d2_fckfixed-factor-clock+$/{0omap_48m_fck@d40 ti,mux-clock0/ @{1omap_12m_fckfixed-factor-clock1$/{Hdpll4_m4_ck@e40ti,divider-clock @ {2dpll4_m4x2_mul_ckti,fixed-factor-clock2O]j{3dpll4_m4x2_ck@d00ti,gate-clock3 9j{dpll4_m5_ck@f40ti,divider-clock?@ {4dpll4_m5x2_mul_ckti,fixed-factor-clock4O]j{5dpll4_m5x2_ck@d00ti,hsdiv-gate-clock5 9j{kdpll4_m6_ck@1140ti,divider-clock?@ {6dpll4_m6x2_mul_ckfixed-factor-clock6$/{7dpll4_m6x2_ck@d00ti,hsdiv-gate-clock7 9{8emu_per_alwon_ckfixed-factor-clock8$/{dclkout2_src_gate_ck@d70 ti,composite-no-wait-gate-clock' p{:clkout2_src_mux_ck@d70ti,composite-mux-clock'+9 p{;clkout2_src_ckti,composite-clock:;{<sys_clkout2@d70ti,divider-clock<@ p}mpu_ckfixed-factor-clock=$/{>arm_fck@924ti,divider-clock> $emu_mpu_alwon_ckfixed-factor-clock>$/{el3_ick@a40ti,divider-clock' @ {?l4_ick@a40ti,divider-clock? @ {@rm_ick@c40ti,divider-clock@ @ gpt10_gate_fck@a00ti,composite-gate-clock  {Bgpt10_mux_fck@a40ti,composite-mux-clockA @{Cgpt10_fckti,composite-clockBCgpt11_gate_fck@a00ti,composite-gate-clock  {Dgpt11_mux_fck@a40ti,composite-mux-clockA @{Egpt11_fckti,composite-clockDEcore_96m_fckfixed-factor-clockF$/{mmchs2_fck@a00ti,wait-gate-clock {mmchs1_fck@a00ti,wait-gate-clock {i2c3_fck@a00ti,wait-gate-clock {i2c2_fck@a00ti,wait-gate-clock {i2c1_fck@a00ti,wait-gate-clock {mcbsp5_gate_fck@a00ti,composite-gate-clock  {mcbsp1_gate_fck@a00ti,composite-gate-clock  { core_48m_fckfixed-factor-clock1$/{Gmcspi4_fck@a00ti,wait-gate-clockG {mcspi3_fck@a00ti,wait-gate-clockG {mcspi2_fck@a00ti,wait-gate-clockG {mcspi1_fck@a00ti,wait-gate-clockG {uart2_fck@a00ti,wait-gate-clockG {uart1_fck@a00ti,wait-gate-clockG  {core_12m_fckfixed-factor-clockH$/{Ihdq_fck@a00ti,wait-gate-clockI {core_l3_ickfixed-factor-clock?$/{Jsdrc_ick@a10ti,wait-gate-clockJ {gpmc_fckfixed-factor-clockJ$/core_l4_ickfixed-factor-clock@$/{Kmmchs2_ick@a10ti,omap3-interface-clockK {mmchs1_ick@a10ti,omap3-interface-clockK {hdq_ick@a10ti,omap3-interface-clockK {mcspi4_ick@a10ti,omap3-interface-clockK {mcspi3_ick@a10ti,omap3-interface-clockK {mcspi2_ick@a10ti,omap3-interface-clockK {mcspi1_ick@a10ti,omap3-interface-clockK {i2c3_ick@a10ti,omap3-interface-clockK {i2c2_ick@a10ti,omap3-interface-clockK {i2c1_ick@a10ti,omap3-interface-clockK {uart2_ick@a10ti,omap3-interface-clockK {uart1_ick@a10ti,omap3-interface-clockK  {gpt11_ick@a10ti,omap3-interface-clockK  {gpt10_ick@a10ti,omap3-interface-clockK  {mcbsp5_ick@a10ti,omap3-interface-clockK  {mcbsp1_ick@a10ti,omap3-interface-clockK  {omapctrl_ick@a10ti,omap3-interface-clockK {dss_tv_fck@e00ti,gate-clock9{dss_96m_fck@e00ti,gate-clockF{dss2_alwon_fck@e00ti,gate-clock{dummy_ck fixed-clockgpt1_gate_fck@c00ti,composite-gate-clock {Lgpt1_mux_fck@c40ti,composite-mux-clockA @{Mgpt1_fckti,composite-clockLMaes2_ick@a10ti,omap3-interface-clockK {wkup_32k_fckfixed-factor-clockA$/{Ngpio1_dbck@c00ti,gate-clockN {sha12_ick@a10ti,omap3-interface-clockK {wdt2_fck@c00ti,wait-gate-clockN {wdt2_ick@c10ti,omap3-interface-clockO {wdt1_ick@c10ti,omap3-interface-clockO {gpio1_ick@c10ti,omap3-interface-clockO {omap_32ksync_ick@c10ti,omap3-interface-clockO {gpt12_ick@c10ti,omap3-interface-clockO {gpt1_ick@c10ti,omap3-interface-clockO {per_96m_fckfixed-factor-clock*$/{ per_48m_fckfixed-factor-clock1$/{Puart3_fck@1000ti,wait-gate-clockP {gpt2_gate_fck@1000ti,composite-gate-clock{Qgpt2_mux_fck@1040ti,composite-mux-clockA@{Rgpt2_fckti,composite-clockQRgpt3_gate_fck@1000ti,composite-gate-clock{Sgpt3_mux_fck@1040ti,composite-mux-clockA@{Tgpt3_fckti,composite-clockSTgpt4_gate_fck@1000ti,composite-gate-clock{Ugpt4_mux_fck@1040ti,composite-mux-clockA@{Vgpt4_fckti,composite-clockUVgpt5_gate_fck@1000ti,composite-gate-clock{Wgpt5_mux_fck@1040ti,composite-mux-clockA@{Xgpt5_fckti,composite-clockWXgpt6_gate_fck@1000ti,composite-gate-clock{Ygpt6_mux_fck@1040ti,composite-mux-clockA@{Zgpt6_fckti,composite-clockYZgpt7_gate_fck@1000ti,composite-gate-clock{[gpt7_mux_fck@1040ti,composite-mux-clockA@{\gpt7_fckti,composite-clock[\gpt8_gate_fck@1000ti,composite-gate-clock {]gpt8_mux_fck@1040ti,composite-mux-clockA@{^gpt8_fckti,composite-clock]^gpt9_gate_fck@1000ti,composite-gate-clock {_gpt9_mux_fck@1040ti,composite-mux-clockA@{`gpt9_fckti,composite-clock_`per_32k_alwon_fckfixed-factor-clockA$/{agpio6_dbck@1000ti,gate-clocka{gpio5_dbck@1000ti,gate-clocka{gpio4_dbck@1000ti,gate-clocka{gpio3_dbck@1000ti,gate-clocka{gpio2_dbck@1000ti,gate-clocka {wdt3_fck@1000ti,wait-gate-clocka {per_l4_ickfixed-factor-clock@$/{bgpio6_ick@1010ti,omap3-interface-clockb{gpio5_ick@1010ti,omap3-interface-clockb{gpio4_ick@1010ti,omap3-interface-clockb{gpio3_ick@1010ti,omap3-interface-clockb{gpio2_ick@1010ti,omap3-interface-clockb {wdt3_ick@1010ti,omap3-interface-clockb {uart3_ick@1010ti,omap3-interface-clockb {uart4_ick@1010ti,omap3-interface-clockb{gpt9_ick@1010ti,omap3-interface-clockb {gpt8_ick@1010ti,omap3-interface-clockb {gpt7_ick@1010ti,omap3-interface-clockb{gpt6_ick@1010ti,omap3-interface-clockb{gpt5_ick@1010ti,omap3-interface-clockb{gpt4_ick@1010ti,omap3-interface-clockb{gpt3_ick@1010ti,omap3-interface-clockb{gpt2_ick@1010ti,omap3-interface-clockb{mcbsp2_ick@1010ti,omap3-interface-clockb{mcbsp3_ick@1010ti,omap3-interface-clockb{mcbsp4_ick@1010ti,omap3-interface-clockb{mcbsp2_gate_fck@1000ti,composite-gate-clock{ mcbsp3_gate_fck@1000ti,composite-gate-clock{mcbsp4_gate_fck@1000ti,composite-gate-clock{emu_src_mux_ck@1140 ti,mux-clockcde@{femu_src_ckti,clkdm-gate-clockf{gpclk_fck@1140ti,divider-clockg@ pclkx2_fck@1140ti,divider-clockg@ atclk_fck@1140ti,divider-clockg@ traceclk_src_fck@1140 ti,mux-clockcde@{htraceclk_fck@1140ti,divider-clockh @ secure_32k_fck fixed-clock{igpt12_fckfixed-factor-clocki$/wdt1_fckfixed-factor-clocki$/security_l4_ick2fixed-factor-clock@$/{jaes1_ick@a14ti,omap3-interface-clockj rng_ick@a14ti,omap3-interface-clockj sha11_ick@a14ti,omap3-interface-clockj des1_ick@a14ti,omap3-interface-clockj cam_mclk@f00ti,gate-clockkjcam_ick@f10!ti,omap3-no-wait-interface-clock@{csi2_96m_fck@f00ti,gate-clock{security_l3_ickfixed-factor-clock?$/{lpka_ick@a14ti,omap3-interface-clockl icr_ick@a10ti,omap3-interface-clockK des2_ick@a10ti,omap3-interface-clockK mspro_ick@a10ti,omap3-interface-clockK mailboxes_ick@a10ti,omap3-interface-clockK ssi_l4_ickfixed-factor-clock@$/{ssr1_fck@c00ti,wait-gate-clock { sr2_fck@c00ti,wait-gate-clock { sr_l4_ickfixed-factor-clock@$/dpll2_fck@40ti,divider-clock'@ {mdpll2_ck@4ti,omap3-dpll-clockm$@4{ndpll2_m2_ck@44ti,divider-clocknD {oiva2_ck@0ti,wait-gate-clocko{modem_fck@a00ti,omap3-interface-clock {sad2d_ick@a10ti,omap3-interface-clock? {mad2d_ick@a18ti,omap3-interface-clock? {mspro_fck@a00ti,wait-gate-clock ssi_ssr_gate_fck_3430es2@a00 ti,composite-no-wait-gate-clock  {pssi_ssr_div_fck_3430es2@a40ti,composite-divider-clock  @${qssi_ssr_fck_3430es2ti,composite-clockpq{rssi_sst_fck_3430es2fixed-factor-clockr$/{hsotgusb_ick_3430es2@a10"ti,omap3-hsotgusb-interface-clockJ {ssi_ick_3430es2@a10ti,omap3-ssi-interface-clocks { usim_gate_fck@c00ti,composite-gate-clockF  {~sys_d2_ckfixed-factor-clock$/{uomap_96m_d2_fckfixed-factor-clockF$/{vomap_96m_d4_fckfixed-factor-clockF$/{womap_96m_d8_fckfixed-factor-clockF$/{xomap_96m_d10_fckfixed-factor-clockF$/ {ydpll5_m2_d4_ckfixed-factor-clockt$/{zdpll5_m2_d8_ckfixed-factor-clockt$/{{dpll5_m2_d16_ckfixed-factor-clockt$/{|dpll5_m2_d20_ckfixed-factor-clockt$/{}usim_mux_fck@c40ti,composite-mux-clock(uvwxyz{|} @ {usim_fckti,composite-clock~usim_ick@c10ti,omap3-interface-clockO  {dpll5_ck@d04ti,omap3-dpll-clock  $ L 4{dpll5_m2_ck@d50ti,divider-clock P {tsgx_gate_fck@b00ti,composite-gate-clock' {core_d3_ckfixed-factor-clock'$/{core_d4_ckfixed-factor-clock'$/{core_d6_ckfixed-factor-clock'$/{omap_192m_alwon_fckfixed-factor-clock#$/{core_d2_ckfixed-factor-clock'$/{sgx_mux_fck@b40ti,composite-mux-clock + @{sgx_fckti,composite-clocksgx_ick@b10ti,wait-gate-clock? {cpefuse_fck@a08ti,gate-clock {ts_fck@a08ti,gate-clockA {usbtll_fck@a08ti,wait-gate-clockt {usbtll_ick@a18ti,omap3-interface-clockK {mmchs3_ick@a10ti,omap3-interface-clockK {mmchs3_fck@a00ti,wait-gate-clock {dss1_alwon_fck_3430es2@e00ti,dss-gate-clockj{dss_ick_3430es2@e10ti,omap3-dss-interface-clock@{usbhost_120m_fck@1400ti,gate-clockt{usbhost_48m_fck@1400ti,dss-gate-clock1{usbhost_ick@1410ti,omap3-dss-interface-clock@{uart4_fck@1000ti,wait-gate-clockP{clockdomainscore_l3_clkdmti,clockdomaindpll3_clkdmti,clockdomaindpll1_clkdmti,clockdomainper_clkdmti,clockdomainlemu_clkdmti,clockdomaingdpll4_clkdmti,clockdomainwkup_clkdmti,clockdomain$dss_clkdmti,clockdomaincore_l4_clkdmti,clockdomaincam_clkdmti,clockdomainiva2_clkdmti,clockdomaindpll2_clkdmti,clockdomainnd2d_clkdmti,clockdomain dpll5_clkdmti,clockdomainsgx_clkdmti,clockdomainusbhost_clkdmti,clockdomain counter@48320000ti,omap-counter32kH2  counter_32kinterrupt-controller@48200000ti,omap3-intcH {dma-controller@48056000"ti,omap3630-sdmati,omap3430-sdmaH`  `dma{gpio@48310000ti,omap3-gpioH1gpio1{gpio@49050000ti,omap3-gpioIgpio2{gpio@49052000ti,omap3-gpioI gpio3gpio@49054000ti,omap3-gpioI@ gpio4{gpio@49056000ti,omap3-gpioI`!gpio5gpio@49058000ti,omap3-gpioI"gpio6{serial@4806a000ti,omap3-uartH  H12txrxuart1lOdefault]serial@4806c000ti,omap3-uartH I34txrxuart2lOdefault]serial@49020000ti,omap3-uartI J56txrxuart3lOdefault]i2c@48070000 ti,omap3-i2cH8txrx+i2c1'@twl@48H fck ti,twl4030Odefault]audioti,twl4030-audio4codecDpowerti,twl4030-powerXrtcti,twl4030-rtc bciti,twl4030-bci hv vac0watchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1&%-regulator-vaux2ti,twl4030-vaux2**regulator-vaux3ti,twl4030-vaux3&%&%regulator-vaux4ti,twl4030-vaux4*0{regulator-vdd1ti,twl4030-vdd1 ' {regulator-vdacti,twl4030-vdacw@w@{regulator-vioti,twl4030-vioregulator-vintana1ti,twl4030-vintana1regulator-vintana2ti,twl4030-vintana2regulator-vintdigti,twl4030-vintdigregulator-vmmc1ti,twl4030-vmmc1:0{regulator-vmmc2ti,twl4030-vmmc2:0regulator-vusb1v5ti,twl4030-vusb1v5{regulator-vusb1v8ti,twl4030-vusb1v8{regulator-vusb3v1ti,twl4030-vusb3v1{regulator-vpll1ti,twl4030-vpll1regulator-vpll2ti,twl4030-vpll2w@w@{regulator-vsimti,twl4030-vsim*0gpioti,twl4030-gpiotwl4030-usbti,twl4030-usb {pwmti,twl4030-pwmpwmledti,twl4030-pwmledpwrbuttonti,twl4030-pwrbuttonkeypadti,twl4030-keypad *disabledmadcti,twl4030-madc1{i2c@48072000 ti,omap3-i2cH 9txrx+i2c2bmp085@77 bosch,bmp085w bma180@41 bosch,bma180AOdefaultC itg3200@68invensense,itg3200hOdefault] tca6507@45 ti,tca6507+E{red_aux@0Mgta04:red:auxgreen_aux@1Mgta04:green:auxred_power@3Mgta04:red:power Sdefault-ongreen_power@4Mgta04:green:powerwifi_reset@6gpiohmc5843@1ehoneywell,hmc5883lOdefault] tsc2007@48 ti,tsc2007H  ioXm24lr64@50 atmel,24c64Pi2c@48060000 ti,omap3-i2cH=txrx+i2c3mailbox@48094000ti,omap3-mailboxmailboxH @dsp  spi@48098000ti,omap2-mcspiH A+mcspi1@#$%&'()* tx0rx0tx1rx1tx2rx2tx3rx3spi@4809a000ti,omap2-mcspiH B+mcspi2 +,-.tx0rx0tx1rx1spi@480b8000ti,omap2-mcspiH [+mcspi3 tx0rx0tx1rx1spi@480ba000ti,omap2-mcspiH 0+mcspi4FGtx0rx01w@480b2000 ti,omap3-1wH :hdq1wOdefault]mmc@4809c000ti,omap3-hsmmcH Smmc1=>txrxOdefault]mmc@480b4000ti,omap3-hsmmcH @Vmmc2/0txrx'mmc@480ad000ti,omap3-hsmmcH ^mmc3MNtxrx *disabledmmu@480bd4002ti,omap2-iommuH mmu_isp?{ mmu@5d0000002ti,omap2-iommu]mmu_iva *disabledwdt@48314000 ti,omap3-wdtH1@ wd_timer2mcbsp@48074000ti,omap3-mcbspH@Ompu ;< Ycommontxrximcbsp1 txrxfck *disabledmcbsp@49022000ti,omap3-mcbspI I Ompusidetone>?Ycommontxrxsidetoneimcbsp2mcbsp2_sidetone!"txrxfckick*okay{mcbsp@49024000ti,omap3-mcbspI@I OmpusidetoneYZYcommontxrxsidetoneimcbsp3mcbsp3_sidetonetxrxfckick *disabledmcbsp@49026000ti,omap3-mcbspI`Ompu 67 Ycommontxrximcbsp4txrxfckx*okay{mcbsp@48096000ti,omap3-mcbspH `Ompu QR Ycommontxrximcbsp5txrxfck *disabledsham@480c3000ti,omap3-shamshamH 0d1Erxtimer@48318000ti,omap3430-timerH1%timer1timer@49032000ti,omap3430-timerI &timer2timer@49034000ti,omap3430-timerI@'timer3timer@49036000ti,omap3430-timerI`(timer4timer@49038000ti,omap3430-timerI)timer5timer@4903a000ti,omap3430-timerI*timer6timer@4903c000ti,omap3430-timerI+timer7timer@4903e000ti,omap3430-timerI,timer8timer@49040000ti,omap3430-timerI-timer9timer@48086000ti,omap3430-timerH`.timer10timer@48088000ti,omap3430-timerH/timer11{timer@48304000ti,omap3430-timerH0@_timer12usbhstll@48062000 ti,usbhs-tllH N usb_tll_hsusbhshost@48064000ti,usbhs-hostH@ usb_host_hs+ ehci-phyohci@48064400ti,ohci-omap3HDLehci@48064800 ti,ehci-omapHHMgpmc@6e000000ti,omap3430-gpmcgpmcnrxtx+0{nand@0,0ti,omap2-nand  bch8'8F,X,jy",(6@RR(+x-loader@0 MX-Loaderbootloaders@80000MU-Bootbootloaders_env@260000 MU-Boot Env&kernel@280000MKernel(@filesystem@680000 MFile Systemhusb_otg_hs@480ab000ti,omap3-musbH \]Ymcdma usb_otg_hs*5= FU ]usb2-phyg2dss@48050000 ti,omap3-dssH*okay dss_corefck+Odefault]mdispc@48050400ti,omap3-dispcH dss_dispcfckencoder@4804fc00 ti,omap3-dsiHH@H Oprotophypll *disabled dss_dsi1 fcksys_clkencoder@48050800ti,omap3-rfbiH *disabled dss_rfbifckickencoder@48050c00ti,omap3-vencH *okay dss_vencfcktv_dac_clk}portendpoint{portendpoint{ssi-controller@48058000 ti,omap3-ssissi*okHHOsysgddGYgdd_mpu+ r  ssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-portHHOtxrxCDssi-port@4805b000ti,omap3-ssi-portHHOtxrxEFserial@49042000ti,omap3-uartI PQRtxrxuart4lregulator-abb-mpu ti,abb-v1 abb_mpu_iva+H0rH0hObase-addressint-address`sO7pinmux@480025a0 ti,omap3-padconfpinctrl-singleH%\+2Odefault] pinmux_hsusb2_2_pins0gPRT V X Z { spi_gpio_pinmux g8FHD{isp@480bc000 ti,omap3-ispH H   ports+bandgap@48002524H%$ti,omap36xx-bandgap{target-module@480cb000ti,sysc-omap3630-srti,syscsmartreflex_coreH 8Osysc2 ? fck+ H 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compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2serial0serial1serial2serial3display0device_typeregclocksclock-namesclock-latencyoperating-pointscpu0-supplyinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinsphandlesysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividers#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedti,enable-vibrati,ramp_delay_valueti,use_poweroffbci3v1-supplyio-channelsio-channel-namesti,bb-uvoltti,bb-uampregulator-always-onusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columnsstatus#io-channel-cellspintcrl-0labellinux,default-triggergpiosti,x-plate-ohms#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplybus-widthti,non-removablecap-power-off-cardmmc-pwrseq#iommu-cellsti,#tlb-entriesreg-namesinterrupt-namesti,buffer-size#sound-dai-cellsti,timer-alwonti,timer-dspti,timer-pwmti,timer-secureport2-moderemote-wakeup-connectedphysgpmc,num-csgpmc,num-waitpinsnand-bus-widthti,nand-ecc-optgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-off-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nsgpmc,device-widthmultipointnum-epsram-bitsinterface-typeusb-phyphy-namespowervdds_dsi-supplyvdda-supplyremote-endpointti,channelsti,invert-polaritydata-linesti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infoiommusti,phy-type#thermal-sensor-cellsti,sysc-maskti,sysc-sidlepolling-delay-passivepolling-delaycoefficientsthermal-sensorslinux,codewakeup-sourceti,modelti,mcbspsimple-audio-card,namesimple-audio-card,bitclock-mastersimple-audio-card,frame-mastersimple-audio-card,formatsimple-audio-card,bitclock-inversionsimple-audio-card,frame-inversionsound-daigpio-sckgpio-misogpio-mosics-gpiosnum-chipselectsspi-max-frequencyspi-cpolspi-cphapwmspwm-namesbrightness-levelsdefault-brightness-levelti,timersreset-gpiosenable-gpios