Ð þíh“8b,(gaô,rockchip,rk3368-evb-act8846rockchip,rk3368 +&7Rockchip RK3368 EVB with ACT8846 pmicaliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff660000Q/i2c@ff140000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/serial@ff180000m/serial@ff190000u/serial@ff690000}/serial@ff1b0000…/serial@ff1c0000�/spi@ff110000’/spi@ff120000—/spi@ff130000cpus+cpu-mapcluster0core0œcore1œcore2œcore3œcluster1core0œcore1œcore2œcore3œ cpu@0 cpuarm,cortex-a53¬°psci¾Ícpu@1 cpuarm,cortex-a53¬°psci¾Ícpu@2 cpuarm,cortex-a53¬°psci¾Ícpu@3 cpuarm,cortex-a53¬°psci¾Í cpu@100 cpuarm,cortex-a53¬°psci¾Ícpu@101 cpuarm,cortex-a53¬°psci¾Ícpu@102 cpuarm,cortex-a53¬°psci¾Ícpu@103 cpuarm,cortex-a53¬°psci¾Íbus simple-bus+Õdma-controller@ff250000arm,pl330arm,primecell¬ÿ%@Üçò $ à +apb_pclkdma-controller@ff600000arm,pl330arm,primecell¬ÿ`@Üçò $  +apb_pclkÍ2arm-pmuarm,armv8-pmuv3`Üpqrstuvw 7 psci arm,psci-0.2·smctimerarm,armv8-timer0Ü ÿÿ ÿ ÿoscillator fixed-clockJn6Zxin24mmmmc@ff0c00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc¬ÿ @zðÑ€ $ È D r v+biuciuciu-driveciu-sampleˆ Ü “ €šreset ¦disabledmmc@ff0d00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc¬ÿ @zðÑ€ $ É E s w+biuciuciu-driveciu-sampleˆ Ü!“ �šreset ¦disabledmmc@ff0f00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc¬ÿ@zðÑ€ $ Ë G u y+biuciuciu-driveciu-sampleˆ Ü#“ ƒšreset¦okay­·É Ôâdefault ð saradc@ff100000rockchip,saradc¬ÿ Ü$ú$ I [+saradcapb_pclk“ W šsaradc-apb ¦disabledspi@ff110000(rockchip,rk3368-spirockchip,rk3066-spi¬ÿ$ A R+spiclkapb_pclk Ü,âdefaultð+ ¦disabledspi@ff120000(rockchip,rk3368-spirockchip,rk3066-spi¬ÿ$ B S+spiclkapb_pclk Ü-âdefaultð+ ¦disabledspi@ff130000(rockchip,rk3368-spirockchip,rk3066-spi¬ÿ$ C T+spiclkapb_pclk Ü)âdefaultð+ ¦disabledi2c@ff140000(rockchip,rk3368-i2crockchip,rk3288-i2c¬ÿ Ü>++i2c$ Nâdefaultð ¦disabledi2c@ff150000(rockchip,rk3368-i2crockchip,rk3288-i2c¬ÿ Ü?++i2c$ Oâdefaultð ¦disabledi2c@ff160000(rockchip,rk3368-i2crockchip,rk3288-i2c¬ÿ Ü@++i2c$ Pâdefaultð ¦disabledi2c@ff170000(rockchip,rk3368-i2crockchip,rk3288-i2c¬ÿ ÜA++i2c$ Qâdefaultð ¦disabledserial@ff180000&rockchip,rk3368-uartsnps,dw-apb-uart¬ÿJn6$ M U+baudclkapb_pclk Ü7  ¦disabledserial@ff190000&rockchip,rk3368-uartsnps,dw-apb-uart¬ÿJn6$ N V+baudclkapb_pclk Ü8  ¦disabledserial@ff1b0000&rockchip,rk3368-uartsnps,dw-apb-uart¬ÿJn6$ P X+baudclkapb_pclk Ü:  ¦disabledserial@ff1c0000&rockchip,rk3368-uartsnps,dw-apb-uart¬ÿJn6$ Q Y+baudclkapb_pclk Ü;  ¦disabledthermal-zonescpu#d9ˆGtripscpu_alert0W$øcЧpassiveÍ cpu_alert1W8€cЧpassiveÍ!cpu_critWscÐ §criticalcooling-mapsmap0n 0sÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿmap1n!0sÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿgpu#d9ˆGtripsgpu_alert0W8€cЧpassiveÍ"gpu_critWÁ8cÐ §criticalcooling-mapsmap0n"0sÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿtsadc@ff280000rockchip,rk3368-tsadc¬ÿ( Ü%$ H Z+tsadcapb_pclk“ Ÿ štsadc-apbâinitdefaultsleepð#‚$Œ#–¬s¦okayÃÚÍethernet@ff290000rockchip,rk3368-gmac¬ÿ) Üõmacirq%8$  f g c € Å ]M+stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac¦okay&rmii&output 3' C Y'B@âdefaultð(n0wusb@ff500000 generic-ehci¬ÿP Ü$ ¦okayusb@ff5800002rockchip,rk3368-usbrockchip,rk3066-usbsnps,dwc2¬ÿX Ü$ Á+otg€hostˆš©€€@@ ¦okayi2c@ff650000(rockchip,rk3368-i2crockchip,rk3288-i2c¬ÿe$ L+i2c Ü<âdefaultð)+¦okayJ€syr827@40silergy,syr827¬@¸Õvdd_cpuä øPü™p(:*syr828@41silergy,syr828¬A¸Õvdd_gpuä øPü™p:*act8846@5aactive-semi,act8846¬Z¦okayE*P*[*f*q+}*‰,regulatorsREG1ÕVCC_DDRäO€üO€REG2ÕVCC_IOä2Z ü2Z Í+REG3ÕVDD_LOGä ®`üã`REG4ÕVCC_20ä„€ü„€Í,REG5 ÕVCCIO_SDäw@ü2Z REG6 ÕVDD10_LCDäB@üB@REG7 ÕVCCA_CODECä2Z ü2Z REG8ÕVCCA_TPä2Z ü2Z REG9 ÕVCCIO_PMUä2Z ü2Z REG10ÕVDD_10äB@üB@REG11ÕVCC_18äw@üw@REG12 ÕVCC18_LCDäw@üw@i2c@ff660000(rockchip,rk3368-i2crockchip,rk3288-i2c¬ÿf Ü=++i2c$ Mâdefaultð- ¦disabledpwm@ff680000(rockchip,rk3368-pwmrockchip,rk3288-pwm¬ÿh•âdefaultð.$ _+pwm¦okayÍ=pwm@ff680010(rockchip,rk3368-pwmrockchip,rk3288-pwm¬ÿh•âdefaultð/$ _+pwm ¦disabledpwm@ff680020(rockchip,rk3368-pwmrockchip,rk3288-pwm¬ÿh •$ _+pwm ¦disabledpwm@ff680030(rockchip,rk3368-pwmrockchip,rk3288-pwm¬ÿh0•âdefaultð0$ _+pwm ¦disabledserial@ff690000&rockchip,rk3368-uartsnps,dw-apb-uart¬ÿi$ O W+baudclkapb_pclk Ü9âdefaultð1 ¦okaymbox@ff6b0000rockchip,rk3368-mailbox¬ÿk0Ü’“”•$ E +pclk_mailbox  ¦disabledsyscon@ff738000)rockchip,rk3368-pmugrfsysconsimple-mfd¬ÿs€Í5io-domains&rockchip,rk3368-pmu-io-voltage-domain ¦disabledreboot-modesyscon-reboot-mode¬³RBÿRBÃÍRBà ÝRBÃclock-controller@ff760000rockchip,rk3368-cru¬ÿv%méÍ syscon@ff770000&rockchip,rk3368-grfsysconsimple-mfd¬ÿwÍ%io-domains"rockchip,rk3368-io-voltage-domain ¦disabledwatchdog@ff800000 rockchip,rk3368-wdtsnps,dw-wdt¬ÿ€$ p ÜO¦okaytimer@ff810000,rockchip,rk3368-timerrockchip,rk3288-timer¬ÿ�  ÜBspdif@ff880000rockchip,rk3368-spdif¬ÿˆ Ü6$ S Ð +mclkhclkö2ûtxâdefaultð3 ¦disabledi2s-2ch@ff890000(rockchip,rk3368-i2srockchip,rk3066-i2s¬ÿ‰ Ü(+i2s_clki2s_hclk$ T Îö22ûtxrx ¦disabledi2s-8ch@ff898000(rockchip,rk3368-i2srockchip,rk3066-i2s¬ÿ‰€ Ü5+i2s_clki2s_hclk$ R Ïö22ûtxrxâdefaultð4 ¦disablediommu@ff900800rockchip,iommu¬ÿ� Üõiep_mmu$ Ê Ô +aclkiface ¦disablediommu@ff914000rockchip,iommu ¬ÿ‘@ÿ‘P Üõisp_mmu$ Í Õ +aclkiface# ¦disablediommu@ff930300rockchip,iommu¬ÿ“ Üõvop_mmu$ Æ Ñ +aclkiface ¦disablediommu@ff9a0440rockchip,iommu ¬ÿš@@ÿš€@ Ü  õhevc_mmu$ Ð Ü +aclkiface ¦disablediommu@ff9a0800rockchip,iommu¬ÿšÜ  õvepu_mmuvdpu_mmu$ Ð Ü +aclkiface ¦disabledefuse@ffb00000rockchip,rk3368-efuse¬ÿ° +$ q +pclk_efusecpu-leakage@17¬temp-adjust@1f¬interrupt-controller@ffb71000 arm,gic-400>S@¬ÿ·ÿ· ÿ·@ ÿ·`  Ü ÿÍpinctrlrockchip,rk3368-pinctrl%d5+Õgpio0@ff750000rockchip,gpio-bank¬ÿu$ @ ÜQq�>SÍ;gpio1@ff780000rockchip,gpio-bank¬ÿx$ A ÜRq�>Sgpio2@ff790000rockchip,gpio-bank¬ÿy$ B ÜSq�>SÍ?gpio3@ff7a0000rockchip,gpio-bank¬ÿz$ C ÜTq�>SÍ'pcfg-pull-up�Í8pcfg-pull-downšpcfg-pull-none©Í9pcfg-pull-none-12ma©¶ Í:emmcemmc-clkÅ6Í emmc-cmdÅ7Í emmc-pwrÅ8emmc-bus1Å8emmc-bus4@Å8888emmc-bus8€Å77777777Íemmc-resetÅ9Í>gmacrgmii-pinsðÅ999: : ::: :999999rmii-pins Å999: : :9999Í(i2c0i2c0-xfer Å99Í)i2c1i2c1-xfer Å99Í-i2c2i2c2-xfer Å 99Íi2c3i2c3-xfer Å99Íi2c4i2c4-xfer Å99Íi2c5i2c5-xfer Å99Íi2si2s-8ch-bus�Å 9 99999999Í4pwm0pwm0-pinÅ9Í.pwm1pwm1-pinÅ9Í/pwm3pwm3-pinÅ9Í0sdio0sdio0-bus1Å8sdio0-bus4@Å8888sdio0-cmdÅ8sdio0-clkÅ9sdio0-cdÅ8sdio0-wpÅ8sdio0-pwrÅ8sdio0-bkpwrÅ8sdio0-intÅ8sdmmcsdmmc-clkÅ 9sdmmc-cmdÅ 8sdmmc-cdÅ 8sdmmc-bus1Å8sdmmc-bus4@Å8888spdifspdif-txÅ9Í3spi0spi0-clkÅ8Íspi0-cs0Å8Íspi0-cs1Å8spi0-txÅ8Íspi0-rxÅ8Íspi1spi1-clkÅ8Íspi1-cs0Å8Íspi1-cs1Å8spi1-rxÅ8Íspi1-txÅ8Íspi2spi2-clkÅ 8Íspi2-cs0Å 8Íspi2-rxÅ 8Íspi2-txÅ 8Ítsadcotp-pinÅ9Í#otp-outÅ9Í$uart0uart0-xfer Å89uart0-ctsÅ9uart0-rtsÅ9uart1uart1-xfer Å89uart1-ctsÅ9uart1-rtsÅ9uart2uart2-xfer Å89Í1uart3uart3-xfer Å89uart3-ctsÅ9uart3-rtsÅ9uart4uart4-xfer Å89uart4-ctsÅ9uart4-rtsÅ9pcfg-pull-none-drv-8ma©¶Í6pcfg-pull-up-drv-8ma�¶Í7backlightbl-enÅ9Í<keyspwr-keyÅ8Í@pmicpmic-intÅ8sdiowifi-reg-onÅ9bt-rstÅ9usbhost-vbus-drvÅ9ÍAchosenÓserial2:115200n8memory memory¬@backlightpwm-backlightß  !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~€�‚ƒ„…†‡ˆ‰Š‹Œ�Ž��‘’“”•–—˜™š›œ�žŸ ¡¢£¤¥¦§¨©ª«¬­®¯°±²³´µ¶·¸¹º»¼½¾¿ÀÁÂÃÄÅÆÇÈÉÊËÌÍÎÏÐÑÒÓÔÕÖרÙÚÛÜÝÞßàáâãäåæçèéêëìíîïðñòóôõö÷øùúûüýþÿñ€  ;âdefaultð<=B@'emmc-pwrseqmmc-pwrseq-emmcð>âdefault )?Í gpio-keys gpio-keysâdefaultð@power5 ; CGPIO PowerItvcc-host-regulatorregulator-fixedT >;âdefaultðA Õvcc_host(:*vcc-lan-regulatorregulator-fixedÕvcc_lanä2Z ü2Z (:+Í&vcc-sys-regulatorregulator-fixedÕvcc_sysäLK@üLK@(Í* compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4spi0spi1spi2cpudevice_typeregenable-method#cooling-cellsphandlerangesinterrupts#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstclocksclock-namesinterrupt-affinityclock-frequencyclock-output-names#clock-cellsmax-frequencyfifo-depthresetsreset-namesstatusbus-widthcap-mmc-highspeedmmc-pwrseqnon-removablepinctrl-namespinctrl-0#io-channel-cellsreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfphy-supplyphy-modeclock_in_outsnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaydr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizefcs,suspend-voltage-selectorregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onvin-supplyvp1-supplyvp2-supplyvp3-supplyvp4-supplyinl1-supplyinl2-supplyinl3-supply#pwm-cells#mbox-cellsoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsdmasdma-names#sound-dai-cells#iommu-cellsrockchip,disable-mmu-resetinterrupt-controller#interrupt-cellsrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthrockchip,pinsstdout-pathbrightness-levelsdefault-brightness-levelenable-gpiospwmspwm-delay-usreset-gpioswakeup-sourcelabellinux,codeenable-active-high