Ð þíæú8Û8( ÂÛ'friendlyarm,nanopi-r4srockchip,rk3399 +7FriendlyElec NanoPi R4Saliases=/ethernet@fe300000G/i2c@ff3c0000L/i2c@ff110000Q/i2c@ff120000V/i2c@ff130000[/i2c@ff3d0000`/i2c@ff140000e/i2c@ff150000j/i2c@ff160000o/i2c@ff3e0000t/serial@ff180000|/serial@ff190000„/serial@ff1a0000Œ/serial@ff1b0000”/serial@ff370000œ/mmc@fe310000¡/mmc@fe320000¦/mmc@fe330000cpus+cpu-mapcluster0core0«core1«core2«core3«cluster1core0«core1«cpu@0¯cpuarm,cortex-a53»¿psciÍåàçöd  4 ?cpu@1¯cpuarm,cortex-a53»¿psciÍåàçöd  4 ?cpu@2¯cpuarm,cortex-a53»¿psciÍåàçöd  4 ?cpu@3¯cpuarm,cortex-a53»¿psciÍåàçöd  4 ?cpu@100¯cpuarm,cortex-a72»¿psciÍà çö´  4?thermal-idleçG'Sôcpu@101¯cpuarm,cortex-a72»¿psciÍà çö´  4?thermal-idleçG'Sôidle-statescpscicpu-sleeparm,idle-statep�˜xSú©„? cluster-sleeparm,idle-statep�˜�Sô©Ð? memory-controllerrockchip,rk3399-dmcºÇà¨Ödmc_clk âdisabledpmu_a53arm,cortex-a53-pmuépmu_a72arm,cortex-a72-pmuépsci arm,psci-1.0Æsmctimerarm,armv8-timer@é   ôxin24m fixed-clock n6xin24m.?–pcie@f8000000rockchip,rk3399-pcie »øý;axi-baseapb-base¯pci+EVb àÅÄG Öaclkaclk-perfhclkpm0é123lsyslegacyclient|`��¬ ´,¹pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-38Âúúà�ûàûà8Ê‚ƒ„…†�€(Ñcoremgmtmgmt-stickypipepmpclkaclkâokayÝç÷interrupt-controllerE?ethernet@fe300000rockchip,rk3399-gmac»þ0é lmacirq8àighfjÕfMÖstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac,ʉ Ñstmmaceth:GâokayRi¦yinput†default ”ž©rgmii² ½(Æmdiosnps,dwmac-mdio+ethernet-phy@1» !é Ï'ßu0 ñ!?mmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc»þ1@é@ýðÑ€ àîMœ�Öbiuciuciu-driveciu-sample ,ÊyÑreset âdisabled 1>T"_†default ”#$%mmmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc»þ2@éAýðÑ€iÍ{ ë àÎLš›Öbiuciuciu-driveciu-sample ,ÊzÑresetâokay � ¢&«†default”'()*m¶+Â,mmc@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.1»þ3é ÏiN{ ëÂàNðÖclk_xinclk_ahbemmc_cardclock.´- ¹phy_arasan,å âdisabledö_?™usb@fe380000 generic-ehci»þ8éàÈÉ.´/¹usbâokayusb@fe3a0000 generic-ohci»þ:éàÈÉ.´/¹usbâokayusb@fe3c0000 generic-ehci»þ<éàÊË0´1¹usbâokayusb@fe3e0000 generic-ohci»þ>é àÊË0´1¹usbâokaydebug@fe430000&arm,coresight-cpu-debugarm,primecell»þCàM Öapb_pclk«debug@fe432000&arm,coresight-cpu-debugarm,primecell»þC àM Öapb_pclk«debug@fe434000&arm,coresight-cpu-debugarm,primecell»þC@àM Öapb_pclk«debug@fe436000&arm,coresight-cpu-debugarm,primecell»þC`àM Öapb_pclk«debug@fe610000&arm,coresight-cpu-debugarm,primecell»þaàL Öapb_pclk«debug@fe710000&arm,coresight-cpu-debugarm,primecell»þqàL Öapb_pclk«usb@fe800000rockchip,rk3399-dwc3+Ã0à�ƒöøôùGÖref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clkÊ% Ñusb3-otgâokayusb@fe800000 snps,dwc3»þ€éià�öƒÖrefbus_earlysuspendhost´23¹usb2-phyusb3-phy  utmi_wide.Oh‰,âokayusb@fe900000rockchip,rk3399-dwc3+Ã0à‚„÷øôùGÖref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clkÊ& Ñusb3-otgâokayusb@fe900000 snps,dwc3»þ�énà‚÷„Örefbus_earlysuspendhost´45¹usb2-phyusb3-phy  utmi_wide.Oh‰,âokaydp@fec00000rockchip,rk3399-cdn-dp»þÀé ir¡{õá ë àru¡oÖcore-clkpclkspdifgrf´67, ÊHJýÑspdifdptxapbcore:« âdisabledportsport+endpoint@0»¼8?¨endpoint@1»¼9?¢interrupt-controller@fee00000 arm,gic-v3E+ÃP»þàþð ÿðÿñÿòé ?interrupt-controller@fee20000arm,gic-v3-itsÌÛ»þâ?ppi-partitionsinterrupt-partition-0æ?interrupt-partition-1æ?saradc@ff100000rockchip,rk3399-saradc»ÿé>ïàPeÖsaradcapb_pclkÊÔ Ñsaradc-apbâokayi2c@ff110000rockchip,rk3399-i2c»ÿiA{ ëÂàAU Öi2cpclké;†default”:+âokay  @ –$i2c@ff120000rockchip,rk3399-i2c»ÿiB{ ëÂàBV Öi2cpclké#†default”;+âokayi2c@ff130000rockchip,rk3399-i2c»ÿiC{ ëÂàCW Öi2cpclké"†default”<+ âdisabledi2c@ff140000rockchip,rk3399-i2c»ÿiD{ ëÂàDX Öi2cpclké&†default”=+ âdisabledi2c@ff150000rockchip,rk3399-i2c»ÿiE{ ëÂàEY Öi2cpclké%†default”>+ âdisabledi2c@ff160000rockchip,rk3399-i2c»ÿiF{ ëÂàFZ Öi2cpclké$†default”?+âokay?¯serial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uart»ÿàQ`Öbaudclkapb_pclkéc<F†default ”@AB âdisabledbluetoothbrcm,bcm43438-btàCÖlpo SD g& y& ˆ= †default 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âdisableddfi@ff630000»ÿc@rockchip,rk3399-dfiºéƒày Öpclk_ddr_mon âdisabled?video-codec@ff650000rockchip,rk3399-vpu»ÿe érq lvepuvdpuàëê Öaclkhclk ‹”,iommu@ff650800rockchip,iommu»ÿe@ésàëê Öaclkiface ’,?”video-codec@ff660000rockchip,rk3399-vdec»ÿfét àí쟞Öaxiahbcabaccore ‹•, iommu@ff660480rockchip,iommu »ÿf€@ÿfÀ@éuàíì Öaclkiface,  ’?•iommu@ff670800rockchip,iommu»ÿg@é*àáÝ Öaclkiface ’ âdisabledrga@ff680000rockchip,rk3399-rga»ÿhé7àÜåmÖaclkhclksclkÊjgi Ñcoreaxiahb,!efuse@ff690000rockchip,rk3399-efuse»ÿi€+à} Öpclk_efusecpu-id@7»cpu-leakage@17»gpu-leakage@18»center-leakage@19»cpu-leakage@1a»logic-leakage@1b»wafer-info@1c»dma-controller@ff6d0000arm,pl330arm,primecell»ÿm@ é Ÿ ªàÓ Öapb_pclk?]dma-controller@ff6e0000arm,pl330arm,primecell»ÿn@ é Ÿ ªàÔ Öapb_pclk?Lclock-controller@ff750000rockchip,rk3399-pmucru»ÿuà–Öxin24m:. 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¼cif-clkouta # ¼edpedp-hpd #¼?·gmacrgmii-pinsð #½¼ ¼ ½ ¼ ¼¼¼¼½½¼¼½½?rmii-pins  # ¼ ½ ¼ ¼ ¼¼¼¼½½phy-intb # ¾?phy-rstb #¼?i2c0i2c0-xfer #¼¼?…i2c1i2c1-xfer #¼¼?:i2c2i2c2-xfer #¿¿?;i2c3i2c3-xfer #¼¼?<i2c4i2c4-xfer # ¼ ¼?Œi2c5i2c5-xfer # ¼ ¼?=i2c6i2c6-xfer # ¼ ¼?>i2c7i2c7-xfer #¼¼??i2c8i2c8-xfer #¼¼?�i2s0i2s0-2ch-bus` #¼¼¼¼¼¼i2s0-8ch-bus� #¼¼¼¼¼¼¼¼¼?›i2s1i2s1-2ch-busP #¼¼¼¼¼?œsdio0sdio0-bus1 #¾sdio0-bus4@ #¾¾¾¾?#sdio0-cmd #¾?$sdio0-clk #¼?%sdio0-cd #¾sdio0-pwr #¾sdio0-bkpwr #¾sdio0-wp #¾sdio0-int #¾sdmmcsdmmc-bus1 #¾sdmmc-bus4@ #¾ ¾ ¾ ¾?'sdmmc-clk # ¼?(sdmmc-cmd # ¾?)sdmmc-cd #¾sdmmc-wp #¾sdmmc0-det-l #¾?*sdmmc0-pwr-h #¼?Âsuspendap-pwroff #¼?Šddrio-pwroff #¼spdifspdif-bus #¼?šspdif-bus-1 #¼spi0spi0-clk #¾?Mspi0-cs0 #¾?Pspi0-cs1 #¾spi0-tx #¾?Nspi0-rx #¾?Ospi1spi1-clk # ¾?Qspi1-cs0 # ¾?Tspi1-rx #¾?Sspi1-tx #¾?Rspi2spi2-clk # ¾?Uspi2-cs0 # ¾?Xspi2-rx # ¾?Wspi2-tx # ¾?Vspi3spi3-clk #¾?€spi3-cs0 #¾?ƒspi3-rx #¾?‚spi3-tx #¾?�spi4spi4-clk #¾?Yspi4-cs0 #¾?\spi4-rx #¾?[spi4-tx #¾?Zspi5spi5-clk #¾?^spi5-cs0 #¾?aspi5-rx #¾?`spi5-tx #¾?_testclktest-clkout0 #¼test-clkout1 #¼test-clkout2 #¼tsadcotp-pin #¼?gotp-out #¼?huart0uart0-xfer #¾¼?@uart0-cts #¼?Buart0-rts #¼?Auart1uart1-xfer # ¾ ¼?Iuart2auart2a-xfer #¾ ¼uart2buart2b-xfer #¾¼uart2cuart2c-xfer #¾¼?Juart3uart3-xfer #¾¼?Kuart3-cts #¼uart3-rts #¼uart4uart4-xfer #¾¼?„uarthdcpuarthdcp-xfer #¾¼pwm0pwm0-pin #¼?�pwm0-pin-pull-down #Àvop0-pwm-pin #¼vop1-pwm-pin #¼pwm1pwm1-pin #¼?‘pwm1-pin-pull-down #Àpwm2pwm2-pin #¼pwm2-pin-pull-down #À?’pwm3apwm3a-pin #¼?“pwm3bpwm3b-pin #¼hdmihdmi-i2c-xfer #¼¼hdmi-cec #¼?°pciepci-clkreqn-cpm #¼pci-clkreqnb-cpm #¼fusb30xfusb0-int #¾?�gpio-ledslan-led-pin #¼?Åsys-led-pin # ¼?Æwan-led-pin #¼?Çpmiccpu-b-sleep #À?†gpu-sleep #À?‡pmic-int-l #¾?‰rockchip-keyreset-button-pin #¾?Äsdiobt-host-wake-l #¼?Fbt-reg-on-h # ¼?Ebt-wake-l #¼?Gwifi-reg_on-h # ¼?Èopp-table-0operating-points-v2 1? opp00 <Q– C –¨ –¨Ð Qœ@opp01 <#ÃF C –¨ –¨Ðopp02 <0£, C øP øPÐopp03 <<Ü CHHÐopp04 <G†Œ CB@B@Ðopp05 <Tfr C*ˆ*ˆÐopp-table-1operating-points-v2 1? opp00 <Q– C –¨ –¨Ð Qœ@opp01 <#ÃF C –¨ –¨Ðopp02 <0£, C –¨ –¨Ðopp03 <<Ü C Yø YøÐopp04 <G†Œ C~ð~ðÐopp05 <Tfr C£è£èÐopp06 <_Ø" CÈàÈàÐopp07 <kIÒ CO€O€Ðopp-table-2operating-points-v2?ºopp00 < ë C –¨ –¨Œ0opp01 <³Ü@ C –¨ –¨Œ0opp02 <ׄ C –¨ –¨Œ0opp03 <Íe C Yø YøŒ0opp04 <#ÃF CHHŒ0opp05 </¯ CÈàÈàŒ0chosen bserial2:1500000n8external-gmac-clock fixed-clock sY@ clkin_gmac.?vcc3v3-sysregulator-fixedÓçù2Z 2Z  )vcc3v3_sysMÁ?vcc5v0-sysregulator-fixedÓçùLK@LK@ )vcc5v0_sysM˜?Ávcc1v8-s3regulator-fixedÓçùw@w@ )vcc1v8_s3MH?Ãvcc3v0-sdregulator-fixed n �&†default”ÂÓù-ÆÀ-ÆÀ )vcc3v0_sdM?+vcca0v9-s3regulator-fixedù »  »  )vcca0v9_s3MÃ?vcca1v8-s3regulator-fixedùw@w@ )vcca1v8_s3MÃ?vbus-typecregulator-fixedùLK@LK@ )vbus_typec?Žgpio-keys gpio-keys ††default”Äreset ‘2 ÷ˆ £reset ©˜gpio-leds gpio-leds†default ”ÅÆÇled-lan ÷ˆ £green:lanled-sys ÷&  £red:power ´onled-wan ÷ˆ £green:wansdio-pwrseqmmc-pwrseq-simpleàC Öext_clock†default”È ñ& ?"vdd-5vregulator-fixed)vdd_5vÓç?˜ compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4mmc0mmc1mmc2cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesoperating-points-v2cpu-supplyphandleduration-usexit-latency-usentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usmin-residency-usrockchip,pmudevfreq-eventsclock-namesstatusinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-mapmax-link-speedmsi-mapphysphy-namesrangesresetsreset-namesnum-lanesvpcie0v9-supplyvpcie1v8-supplyvpcie3v3-supplyinterrupt-controllerpower-domainsrockchip,grfsnps,txpblassigned-clock-parentsassigned-clocksclock_in_outpinctrl-namespinctrl-0phy-handlephy-modephy-supplytx_delayrx_delayreset-assert-usreset-deassert-usreset-gpiosmax-frequencyfifo-depthbus-widthcap-sd-highspeedcap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr104assigned-clock-ratescap-mmc-highspeedcd-gpiosdisable-wpvmmc-supplyvqmmc-supplyarasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs200-1_8vdr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controller#msi-cellsaffinity#io-channel-cellsvref-supplyi2c-scl-rising-time-nsi2c-scl-falling-time-nsreg-shiftreg-io-widthdevice-wakeup-gpioshost-wakeup-gpiosshutdown-gpiosmax-speedvbat-supplyvddio-supplydmasdma-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplyfcs,suspend-voltage-selectorregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-nameregulator-ramp-delayvin-supplyregulator-off-in-suspendrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyregulator-on-in-suspendregulator-suspend-microvoltregulator-init-microvoltvbus-supply#pwm-cellsiommus#iommu-cells#dma-cellsarm,pl330-periph-burst#reset-cellsbt656-supplyaudio-supplysdmmc-supplygpio1830-supply#phy-cellsdrive-impedance-ohmrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiddc-i2c-busmali-supplygpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsstdout-pathenable-active-highgpioautorepeatdebounce-intervallabellinux,codedefault-state