Ð þí¶8«ä( 0«¬ &,firefly,rk3566-roc-pcrockchip,rk35667Firefly Station M2aliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000�/serial@fe650000‰/serial@fe660000‘/serial@fe670000™/serial@fe680000¡/serial@fe690000©/serial@fe6a0000±/serial@fe6b0000¹/serial@fe6c0000Á/serial@fe6d0000É/spi@fe610000Î/spi@fe620000Ó/spi@fe630000Ø/spi@fe640000Ý/mmc@fe2b0000â/mmc@fe310000ç/mmc@fe2c0000cpus cpu@0ìcpu,arm,cortex-a55øüpsci 4?cpu@100ìcpu,arm,cortex-a55øpsci 4?cpu@200ìcpu,arm,cortex-a55øpsci 4?cpu@300ìcpu,arm,cortex-a55øpsci 4? opp-table-0,operating-points-v2G?opp-408000000RQ– Y »  » Œ0gœ@opp-600000000R#ÃF Y »  » Œ0opp-816000000R0£, Y »  » Œ0xopp-1104000000RAÍ´ Y »  » Œ0opp-1416000000RTfr Y »  » Œ0opp-1608000000R_Ø" Yà˜à˜Œ0opp-1800000000RkIÒ Y��Œ0firmwarescmi ,arm,scmi-smc„‚� protocol@14ø•?opp-table-1,operating-points-v2?>opp-200000000R ëÂY –¨opp-300000000Rá£Y –¨opp-400000000RׄY –¨opp-600000000R#ÃFY –¨opp-700000000R)¹'Y » opp-800000000R/¯YB@pmu,arm,cortex-a55-pmu0¢äåæç­ psci ,arm,psci-1.0smctimer,arm,armv8-timer0¢   Àxin24m ,fixed-clock×n6çxin24m•?xin32k ,fixed-clock×€çxin32kú default•sram@10f000 ,mmio-sramøð ðsram@0,arm,scmi-shmemø?sata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahciøü@ü › œ �satapmaliverxoob ¢_%  *sata-phy4F  Tdisabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahciøü€ü   ¡ ¢satapmaliverxoob ¢`% *sata-phy4F  Tdisabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3øüÀ@ ¢©ü ¦ § ¥ref_clksuspend_clkbus_clk[otg cutmi_wideF l ”sTokay% *usb2-phyŒ “high-speedusb@fd000000,rockchip,rk3568-dwc3snps,dwc3øý@ ¢ªü © ª ¨ref_clksuspend_clkbus_clk[host % *usb2-phyusb3-phy cutmi_wideF l •sTokayinterrupt-controller@fd400000 ,arm,gic-v3 øý@ýF ¢ ¡¶ÇýAÑ(Ü?usb@fd800000 ,generic-ehciøý€ ¢‚ü ½ ¾ ¼%*usbTokayusb@fd840000 ,generic-ohciøý„ ¢ƒü ½ ¾ ¼%*usbTokayusb@fd880000 ,generic-ehciøýˆ ¢…ü ¿ À ¼%*usb Tdisabledusb@fd8c0000 ,generic-ohciøýŒ ¢†ü ¿ À ¼%*usb Tdisabledsyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfdøýÂ?¢io-domains&,rockchip,rk3568-pmu-io-voltage-domainTokayëù#1?M[syscon@fdc50000øýÅ ,rockchip,rk3566-pipe-grfsyscon?›syscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfdøýÆ?syscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconøýÈ?œsyscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconøýÉ?�syscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconøýÊ€?žsyscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconøýÊ€€?¡clock-controller@fdd00000,rockchip,rk3568-pmucruøýЕi?clock-controller@fdd20000,rockchip,rk3568-cruøýÒüxin24m•iv †G†Œ ë›? i2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2cøýÔ ¢.ü- i2cpclkúdefault Tokayregulator@1c ,tcs,tcs4525ø¨Åvdd_cpuÔ 5ìŒ0ü-??regulator-state-memJpmic@20,rockchip,rk809ø ¢çrk808-clkout1rk808-clkout2defaultúc„•’ ž ª ¶  Î Ú æ ò ?|regulatorsDCDC_REG1Åvdd_log-Ô¡ ì™pþ » qregulator-state-mem/ » DCDC_REG2Åvdd_gpuÔ » ì™pþ » qregulator-state-memJ/ » DCDC_REG3Åvcc_ddr-ÔÈàìÈàKregulator-state-memDCDC_REG4Åvdd_npuÔ » ì™pKregulator-state-memJDCDC_REG5Åvcc_1v8-Ôw@ìw@?regulator-state-mem/w@LDO_REG1Åvdda0v9_image-Ô » ì » regulator-state-mem/ » LDO_REG2 Åvdda_0v9-Ô » ì » regulator-state-mem/ » LDO_REG3 Åvdda0v9_pmu-Ô » ì » regulator-state-mem/ » LDO_REG4 Åvccio_acodec-Ô2Z ì2Z ?regulator-state-mem/2Z LDO_REG5 Åvccio_sd-Ôw@ì2Z ?regulator-state-mem/2Z LDO_REG6 Åvcc3v3_pmu-Ô2Z ì2Z ?regulator-state-mem/2Z LDO_REG7 Åvcca_1v8-Ôw@ìw@regulator-state-mem/w@LDO_REG8 Åvcca1v8_pmu-Ôw@ìw@?Pregulator-state-mem/w@LDO_REG9Åvcca1v8_image-Ôw@ìw@regulator-state-mem/w@SWITCH_REG1-Åvcc3v3?SWITCH_REG2 Åvcc3v3_sd-?Nserial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uartøýÕ ¢tü ,baudclkapb_pclkb!!ú"defaultgtTokaypwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwmøý×ü 0 pwmpclkú#default~ Tdisabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwmøý×ü 0 pwmpclkú$default~ Tdisabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwmøý× ü 0 pwmpclkú%default~ Tdisabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwmøý×0ü 0 pwmpclkú&default~ Tdisabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdøýÙpower-controller!,rockchip,rk3568-power-controller‰ ? power-domain@7øü  �'‰power-domain@8øü Ì Í �()*‰power-domain@9ø ü Ú Û Ü �+,-‰power-domain@10ø ü ñ ò�./0123‰power-domain@11ø ü í�4‰power-domain@13ü ø �5‰power-domain@14øü  �678‰power-domain@15øü �9:;<=‰gpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrostøýæ@$¢()' ¤jobmmugpuü gpubus >F  Tdisabled?Œmmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcøþ@ ¢d ü Á  Ž �biuciuciu-driveciu-sample´¿ðÑ€l ëÍreset Tdisabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20aøþ¢ ¤macirqeth_wake_irq@ü † ‰ ‰ Ç Ã Ä ‰ ÈWstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_refl ì Ístmmaceth›Ù?éú@ A Tokayv ‰ ‡ †) ‡ †B@input Mrgmii-idVdefaultúCDEFGH aq ‡N † œO¥$®Imdio,snps,dwmac-mdio ethernet-phy@0,ethernet-phy-ieee802.3-c22ø?Istmmac-axi-config¹ÃÓ??rx-queues-configã?@queue0tx-queues-configù?Aqueue0qos@fe128000,rockchip,rk3568-qossysconøþ€ ?'qos@fe138080,rockchip,rk3568-qossysconøþ€€ ?6qos@fe138100,rockchip,rk3568-qossysconøþ� ?7qos@fe138180,rockchip,rk3568-qossysconøþ�€ ?8qos@fe148000,rockchip,rk3568-qossysconøþ€ ?(qos@fe148080,rockchip,rk3568-qossysconøþ€€ ?)qos@fe148100,rockchip,rk3568-qossysconøþ� ?*qos@fe150000,rockchip,rk3568-qossysconøþ ?4qos@fe158000,rockchip,rk3568-qossysconøþ€ ?.qos@fe158100,rockchip,rk3568-qossysconøþ� ?/qos@fe158180,rockchip,rk3568-qossysconøþ�€ ?0qos@fe158200,rockchip,rk3568-qossysconøþ‚ ?1qos@fe158280,rockchip,rk3568-qossysconøþ‚€ ?2qos@fe158300,rockchip,rk3568-qossysconøþƒ ?3qos@fe180000,rockchip,rk3568-qossysconøþ qos@fe190000,rockchip,rk3568-qossysconøþ ?9qos@fe190280,rockchip,rk3568-qossysconøþ€ ?:qos@fe190300,rockchip,rk3568-qossysconøþ ?;qos@fe190380,rockchip,rk3568-qossysconøþ€ ?<qos@fe190400,rockchip,rk3568-qossysconøþ ?=qos@fe198000,rockchip,rk3568-qossysconøþ€ ?5qos@fe1a8000,rockchip,rk3568-qossysconøþ€ ?+qos@fe1a8080,rockchip,rk3568-qossysconøþ€€ ?,qos@fe1a8100,rockchip,rk3568-qossysconøþ� ?-mmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcøþ+@ ¢b ü ° ± Š ‹biuciuciu-driveciu-sample´¿ðÑ€l ÔÍresetTokay *3defaultúJKLM>LNXmmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcøþ,@ ¢c ü ² ³ Œ �biuciuciu-driveciu-sample´¿ðÑ€l ÖÍresetTokayerˆOL XPdefault úQRSspi@fe300000 ,rockchip,sfcøþ0@ ¢eü x vclk_sfchclk_sfcúTdefault Tdisabledmmc@fe310000,rockchip,rk3568-dwcmshcøþ1 ¢v { }† ëÂn6(ü | z y { }corebusaxiblocktimerTokay“¢LXspdif@fe460000,rockchip,rk3568-spdiføþF ¢f mclkhclkü _ \bU°txdefaultúVº Tdisabledi2s@fe410000,rockchip,rk3568-i2s-tdmøþA ¢5v E I†FÏqFÏqü G K :mclk_txmclk_rxhclkbUU°rxtxl R S Ítx-mrx-m›default0úWXYZ[\]^_`abº Tdisabledi2s@fe430000,rockchip,rk3568-i2s-tdmøþC ¢7ü S W <mclk_txmclk_rxhclkbUU°txrxl U V Ítx-mrx-m›º Tdisabledpdm@fe440000,rockchip,rk3568-pdmøþD ¢Lü Z Ypdm_clkpdm_hclkbU °rxúcdefghdefaultl XÍpdm-mº Tdisableddma-controller@fe530000,arm,pl330arm,primecelløþS@¢ Ëü   apb_pclkâ?!dma-controller@fe550000,arm,pl330arm,primecelløþU@¢Ëü   apb_pclkâ?Ui2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cøþZ ¢/ü H G i2cpclkúidefault Tokayi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2cøþ[ ¢0ü J I i2cpclkújdefault Tokayi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2cøþ\ ¢1ü L K i2cpclkúkdefault Tokayi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2cøþ] ¢2ü N M i2cpclkúldefault  Tdisabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2cøþ^ ¢3ü P O i2cpclkúmdefault Tokaywatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdtøþ` ¢•ü   tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spiøþa ¢gü R Qspiclkapb_pclkb!!°txrxdefault únop  Tdisabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spiøþb ¢hü T Sspiclkapb_pclkb!!°txrxdefault úqrs  Tdisabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spiøþc ¢iü V Uspiclkapb_pclkb!!°txrxdefault útuv  Tdisabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spiøþd ¢jü X Wspiclkapb_pclkb!!°txrxdefault úwxy  Tdisabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uartøþe ¢uü  baudclkapb_pclkb!!úz{defaultgtTokayíbluetooth,brcm,bcm43438-btü|lpo ý} } #}default ú~€2 >Pserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartøþf ¢vü #  baudclkapb_pclkb!!ú�defaultgtTokayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartøþg ¢wü ' $baudclkapb_pclkb!!ú‚defaultgt Tdisabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uartøþh ¢xü + (baudclkapb_pclkb!! úƒdefaultgt Tdisabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uartøþi ¢yü / ,baudclkapb_pclkb! ! ú„defaultgt Tdisabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartøþj ¢zü 3 0baudclkapb_pclkb! ! ú…defaultgt Tdisabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartøþk ¢{ü 7 4baudclkapb_pclkb!!ú†defaultgt Tdisabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartøþl ¢|ü ; 8baudclkapb_pclkb!!ú‡defaultgt Tdisabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartøþm ¢}ü ? <baudclkapb_pclkb!!úˆdefaultgt Tdisabledthermal-zonescpu-thermalKdaèo‰tripscpu_alert0p‹Ðópassive?Šcpu_alert1$ø‹Ðópassivecpu_crits‹Ð ócriticalcooling-mapsmap0–Š0›ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿgpu-thermalKaèo‰tripsgpu-thresholdp‹Ðópassivegpu-target$ø‹Ðópassive?‹gpu-crits‹Ð ócriticalcooling-mapsmap0–‹ ›Œÿÿÿÿÿÿÿÿtsadc@fe710000,rockchip,rk3568-tsadcøþq ¢sv  †f@ ®`ü  tsadcapb_pclkl � ‚ ×›ªsinitdefaultsleepú�ÁŽË�ÕTokay?‰saradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcøþr ¢]ü  saradcapb_pclkl € Ísaradc-apbë Tdisabledpwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmøþnü Z Y pwmpclkú�default~ Tdisabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmøþnü Z Y pwmpclkú�default~ Tdisabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmøþn ü Z Y pwmpclkú‘default~ Tdisabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmøþn0ü Z Y pwmpclkú’default~ Tdisabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmøþoü ] \ pwmpclkú“default~ Tdisabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmøþoü ] \ pwmpclkú”default~ Tdisabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmøþo ü ] \ pwmpclkú•default~ Tdisabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmøþo0ü ] \ pwmpclkú–default~ Tdisabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmøþpü ` _ pwmpclkú—default~ Tdisabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmøþpü ` _ pwmpclkú˜default~ Tdisabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmøþp ü ` _ pwmpclkú™default~ Tdisabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmøþp0ü ` _ pwmpclkúšdefault~ Tdisabledphy@fe830000,rockchip,rk3568-naneng-combphyøþƒü" }  refapbpipev"†õál Çý› œ %Tokay? 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vcc5v0-usb30-host-regulator,regulator-fixedÅvcc5v0_usb30_host  ldefaultú¯ÔLK@ìLK@??Ÿvcc5v0-usb-otg-regulator,regulator-fixedÅvcc5v0_usb_otg  ldefaultú°ÔLK@ìLK@??  interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3mmc0mmc1mmc2device_typeregclocks#cooling-cellsenable-methodoperating-points-v2cpu-supplyphandleopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendarm,smc-idshmem#clock-cellsinterruptsinterrupt-affinityarm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesrangesclock-namesphysphy-namesports-implementedpower-domainsstatusdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconmaximum-speedinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerpmuio1-supplypmuio2-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-always-onregulator-boot-onvin-supplyregulator-off-in-suspendrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyregulator-init-microvoltregulator-on-in-suspendregulator-suspend-microvoltregulator-initial-modedmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesfifo-depthmax-frequencyreset-namessnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsoassigned-clock-parentsclock_in_outphy-modephy-supplysnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delayphy-handlesnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usebus-widthcap-sd-highspeedcd-gpiosdisable-wpsd-uhs-sdr104vmmc-supplyvqmmc-supplycap-sdio-irqkeep-power-in-suspendmmc-pwrseqmmc-hs200-1_8vnon-removabledma-names#sound-dai-cellsarm,pl330-periph-burst#dma-cellsuart-has-rtsctsdevice-wakeup-gpioshost-wakeup-gpiosshutdown-gpiosvbat-supplyvddio-supplypolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cells#io-channel-cellsrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsstdout-pathlabeldefault-statelinux,default-triggerretain-state-suspendedreset-gpiosenable-active-high