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˜disabledphy@1c062000+À¨À¨À¸G46Npipe0óüpcie_1_pipe_clk^2interconnect@1380000Lqcom,sdm845-mem-noc+8rq^interconnect@14e0000Lqcom,sdm845-dc-noc+Nqinterconnect@1500000Lqcom,sdm845-config-noc+PP€q^:interconnect@1620000Lqcom,sdm845-system-noc+b€€q^vinterconnect@16e0000Lqcom,sdm845-aggre1-noc+nP€q^9interconnect@1700000Lqcom,sdm845-aggre2-noc+póq^Uinterconnect@1740000Lqcom,sdm845-mmss-noc+tÁq^µufshc@1d84000+Lqcom,sdm845-ufshcqcom,ufshcjedec,ufs-2.0 +Ø@%Ù€[stdice è ÈrÍufsphy+ 4ǵ4¼rst ({Ncore_clkbus_aggr_clkiface_clkcore_clk_uniproref_clktx_lane0_sync_clkrx_lane0_sync_clkrx_lane1_sync_clkice_core_clkHG4‚44�4‹#4Š4ˆ4‰4„H?úð€ ëÂ<4`ðÑ€xhÀᣠ˜disabled^sphy@1d87000Lqcom,sdm845-qmp-ufs-phy+ØpŒ / Nrefref_auxG4€4† 4µs¼ufsphy ˜disabledphy@1d87400P+ØtØvàØ|ÜØxØzàü^rdma-controller@1dc4000Lqcom,bam-v1.7.0+Ü@@ èG#Nbam_clkøMU0((((^tcrypto@1dfa000Lqcom,crypto-v5.4+ß `G4 4 #NifacebuscoreLttQrxtx0((((ipa@1e40000Lqcom,sdm845-ipa( ("0+äpäp à@À[ipa-regipa-sharedgsi8#7°uu(7ipagsiipa-clock-queryipa-setup-readyG# NcoreHþUUv :!memoryimemconfigqww*‚ipa-clock-enabled-validipa-clock-enabled ˜disabledhwlock@1f40000Lqcom,tcsr-mutex+ôn^syscon@1f60000Lqcom,sdm845-tcsrsyscon+ö^~pinctrl@3400000Lqcom,sdm845-pinctrl+@À èÐ|Œo„˜x—¤y²Q^xcci0-defaultÇgpio17gpio18Ìcci_i2cÕâ^¸cci0-sleepÇgpio17gpio18Ìcci_i2câñ^ºcci1-defaultÇgpio19gpio20Ìcci_i2cÕâ^¹cci1-sleepÇgpio19gpio20Ìcci_i2câñ^»qspi-clkpinmuxÇgpio95 Ìqspi_clkqspi-cs0pinmuxÇgpio90Ìqspi_csqspi-cs1pinmuxÇgpio89Ìqspi_csqspi-data01pinmux-dataÇgpio91gpio92 Ìqspi_dataqspi-data12pinmux-dataÇgpio93gpio94 Ìqspi_dataqup-i2c0-default^;pinmux Çgpio0gpio1Ìqup0qup-i2c1-default^@pinmuxÇgpio17gpio18Ìqup1qup-i2c2-default^CpinmuxÇgpio27gpio28Ìqup2qup-i2c3-default^FpinmuxÇgpio41gpio42Ìqup3qup-i2c4-default^IpinmuxÇgpio89gpio90Ìqup4qup-i2c5-default^LpinmuxÇgpio85gpio86Ìqup5qup-i2c6-default^OpinmuxÇgpio45gpio46Ìqup6qup-i2c7-default^RpinmuxÇgpio93gpio94Ìqup7qup-i2c8-default^VpinmuxÇgpio65gpio66Ìqup8qup-i2c9-default^Zpinmux Çgpio6gpio7Ìqup9qup-i2c10-default^]pinmuxÇgpio55gpio56Ìqup10qup-i2c11-default^`pinmuxÇgpio31gpio32Ìqup11qup-i2c12-default^cpinmuxÇgpio49gpio50Ìqup12qup-i2c13-default^fpinmuxÇgpio105gpio106Ìqup13qup-i2c14-default^ipinmuxÇgpio33gpio34Ìqup14qup-i2c15-default^lpinmuxÇgpio81gpio82Ìqup15qup-spi0-default^>pinmuxÇgpio0gpio1gpio2gpio3Ìqup0configÇgpio0gpio1gpio2gpio3âqup-spi1-default^ApinmuxÇgpio17gpio18gpio19gpio20Ìqup1qup-spi2-default^DpinmuxÇgpio27gpio28gpio29gpio30Ìqup2qup-spi3-default^GpinmuxÇgpio41gpio42gpio43gpio44Ìqup3qup-spi4-default^JpinmuxÇgpio89gpio90gpio91gpio92Ìqup4qup-spi5-default^MpinmuxÇgpio85gpio86gpio87gpio88Ìqup5qup-spi6-default^PpinmuxÇgpio45gpio46gpio47gpio48Ìqup6qup-spi7-default^SpinmuxÇgpio93gpio94gpio95gpio96Ìqup7qup-spi8-default^XpinmuxÇgpio65gpio66gpio67gpio68Ìqup8qup-spi9-default^[pinmuxÇgpio6gpio7gpio4gpio5Ìqup9qup-spi10-default^^pinmuxÇgpio55gpio56gpio53gpio54Ìqup10qup-spi11-default^apinmuxÇgpio31gpio32gpio33gpio34Ìqup11qup-spi12-default^dpinmuxÇgpio49gpio50gpio51gpio52Ìqup12qup-spi13-default^gpinmux Çgpio105gpio106gpio107gpio108Ìqup13qup-spi14-default^jpinmuxÇgpio33gpio34gpio31gpio32Ìqup14qup-spi15-default^mpinmuxÇgpio81gpio82gpio83gpio84Ìqup15qup-uart0-default^?pinmux Çgpio2gpio3Ìqup0qup-uart1-default^BpinmuxÇgpio19gpio20Ìqup1qup-uart2-default^EpinmuxÇgpio29gpio30Ìqup2qup-uart3-default^HpinmuxÇgpio43gpio44Ìqup3qup-uart4-default^KpinmuxÇgpio91gpio92Ìqup4qup-uart5-default^NpinmuxÇgpio87gpio88Ìqup5qup-uart6-default^QpinmuxÇgpio47gpio48Ìqup6qup-uart7-default^TpinmuxÇgpio95gpio96Ìqup7qup-uart8-default^YpinmuxÇgpio67gpio68Ìqup8qup-uart9-default^\pinmux Çgpio4gpio5Ìqup9qup-uart10-default^_pinmuxÇgpio53gpio54Ìqup10qup-uart11-default^bpinmuxÇgpio33gpio34Ìqup11qup-uart12-default^epinmuxÇgpio51gpio52Ìqup12qup-uart13-default^hpinmuxÇgpio107gpio108Ìqup13qup-uart14-default^kpinmuxÇgpio31gpio32Ìqup14qup-uart15-default^npinmuxÇgpio83gpio84Ìqup15quat_mi2s_sleepmuxÇgpio58gpio59ÌgpioconfigÇgpio58gpio59âñ quat_mi2s_activemuxÇgpio58gpio59 Ìqua_mi2sconfigÇgpio58gpio59âquat_mi2s_sd0_sleepmuxÇgpio60ÌgpioconfigÇgpio60âñ quat_mi2s_sd0_activemuxÇgpio60 Ìqua_mi2sconfigÇgpio60âquat_mi2s_sd1_sleepmuxÇgpio61ÌgpioconfigÇgpio61âñ quat_mi2s_sd1_activemuxÇgpio61 Ìqua_mi2sconfigÇgpio61âquat_mi2s_sd2_sleepmuxÇgpio62ÌgpioconfigÇgpio62âñ quat_mi2s_sd2_activemuxÇgpio62 Ìqua_mi2sconfigÇgpio62âquat_mi2s_sd3_sleepmuxÇgpio63ÌgpioconfigÇgpio63âñ quat_mi2s_sd3_activemuxÇgpio63 Ìqua_mi2sconfigÇgpio63âsdc2-default-state^¤clk Çsdc2_clkâcmd Çsdc2_cmdâ Õdata Çsdc2_dataâ Õremoteproc@4080000Lqcom,sdm845-mss-pil +H [qdsp6rmbL# zzzzz07wdogfatalreadyhandoverstop-ackshutdown-ack@G4$4'44%4(4&4@#2Nifacebusmemgpll0_msssnoc_aximnoc_axiprngxoh%q{‚stopµ|} ¼mss_restartpdc_reset&~0P@ 333 cxmxmss ˜disabledmbaZmpssZ€glink-edge èÁŸmodem¥µ' clock-controller@5090000Lqcom,sdm845-gpucc+ �óÇ•G#44 8Nbi_tcxogcc_gpu_gpll0_clk_srcgcc_gpu_gpll0_div_clk_src^Éstm@6002000 Larm,coresight-stmarm,primecell + ([stm-basestm-stimulus-baseG% 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interrupt-parent#address-cells#size-cellsqcom,msm-idqcom,board-idmodelcompatiblei2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8i2c9i2c10i2c11i2c12i2c13i2c14i2c15spi0spi1spi2spi3spi4spi5spi6spi7spi8spi9spi10spi11spi12spi13spi14spi15serial0serial1stdout-pathdevice_typeregrangesno-maphwlocksqcom,client-idqcom,vmidphandlerecord-sizeconsole-sizeftrace-sizepmsg-sizeecc-sizeenable-methodcapacity-dmips-mhzdynamic-power-coefficientqcom,freq-domainoperating-points-v2interconnectspower-domainspower-domain-names#cooling-cellsnext-level-cachecpuentry-methodidle-state-namearm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uslocal-timer-stopopp-sharedopp-hzopp-peak-kBpsinterrupts#clock-cellsclock-frequencyclock-output-namesinterrupts-extendedinterrupt-namesclocksclock-namesmemory-regionqcom,qmpqcom,smem-statesqcom,smem-state-namesstatuslabelqcom,remote-pidmboxesqcom,glink-channelsqcom,domainqcom,intentsqcom,protection-domain#sound-dai-cellsiommusqcom,non-secure-domainqcom,smemqcom,local-pidqcom,entry-name#qcom,smem-state-cellsinterrupt-controller#interrupt-cells#power-domain-cellsdomain-idle-statesdma-ranges#reset-cellsprotected-clocksbitsrequired-opps#dma-cellsdma-channelsdma-channel-maskinterconnect-namespinctrl-namespinctrl-0dmasdma-namesreg-nameslinux,pci-domainbus-rangenum-lanesinterrupt-map-maskinterrupt-mapiommu-mapresetsreset-namesphysphy-namesassigned-clocksassigned-clock-rates#phy-cells#interconnect-cellsqcom,bcm-voterslanes-per-directionfreq-table-hzqcom,eeqcom,controlled-remotely#hwlock-cellsgpio-controller#gpio-cellsgpio-rangeswakeup-parentgpio-reserved-rangespinsfunctionbias-pull-updrive-strengthbias-pull-downbias-disableinput-enableoutput-highqcom,halt-regsremote-endpointarm,scatter-gatherarm,coresight-loses-context-with-cpuvmmc-supplyvqmmc-supplycd-gpiosbus-widthno-sdiono-emmcqcom,apps-ch-pipesqcom,ea-pcslim-ifc-devqcom,micbias1-microvoltqcom,micbias2-microvoltqcom,micbias3-microvoltqcom,micbias4-microvoltqcom,dout-portsqcom,din-portsqcom,ports-sinterval-lowqcom,ports-offset1qcom,ports-offset2cpusqcom,lmh-temp-arm-millicelsiusqcom,lmh-temp-low-millicelsiusqcom,lmh-temp-high-millicelsiusnvmem-cellsvdd-supplyvdda-pll-supplyvdda-phy-dpdm-supplyqcom,select-utmi-as-pipe-clksnps,dis_u2_susphy_quirksnps,dis_enblslpm_quirkdr_modemaximum-speedpinctrl-1assigned-clock-parentsqcom,gmuopp-level#iommu-cells#global-interruptsqcom,pdc-ranges#qcom,sensors#thermal-sensor-cellsqcom,channelcell-indexmode-bootloadermode-recoverydebouncelinux,codeio-channelsio-channel-names#io-channel-cells#pwm-cells#mbox-cellsqcom,tcs-offsetqcom,drv-idqcom,tcs-configqcom,pmic-idvdd-s1-supplyvdd-s2-supplyvdd-s3-supplyvdd-s4-supplyvdd-s5-supplyvdd-s6-supplyvdd-s7-supplyvdd-s8-supplyvdd-s9-supplyvdd-s10-supplyvdd-s11-supplyvdd-s12-supplyvdd-s13-supplyvdd-l1-l27-supplyvdd-l2-l8-l17-supplyvdd-l3-l11-supplyvdd-l4-l5-supplyvdd-l6-supplyvdd-l7-l12-l14-l15-supplyvdd-l9-supplyvdd-l10-l23-l25-supplyvdd-l13-l19-l21-supplyvdd-l16-l28-supplyvdd-l18-l22-supplyvdd-l20-l24-supplyvdd-l26-supplyvin-lvs-1-2-supplyregulator-min-microvoltregulator-max-microvoltregulator-initial-moderegulator-always-onmsi-controller#msi-cellsnum-channelsqcom,num-eesframe-number#freq-domain-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresisdebounce-intervalgpio-key,wakeupregulator-nameregulator-boot-onvin-supply