Ð þím›8g(‡fÜ)tronsmart,orion-r68-metarockchip,rk3368 +7Rockchip Orion R68aliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff660000Q/i2c@ff140000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/serial@ff180000m/serial@ff190000u/serial@ff690000}/serial@ff1b0000…/serial@ff1c0000�/spi@ff110000’/spi@ff120000—/spi@ff130000œ/mmc@ff0c0000¡/mmc@ff0f0000cpus+cpu-mapcluster0core0¦core1¦core2¦core3¦cluster1core0¦core1¦core2¦core3¦ cpu@0ªcpuarm,cortex-a53¶ºpsciÈ×cpu@1ªcpuarm,cortex-a53¶ºpsciÈ×cpu@2ªcpuarm,cortex-a53¶ºpsciÈ×cpu@3ªcpuarm,cortex-a53¶ºpsciÈ× cpu@100ªcpuarm,cortex-a53¶ºpsciÈ×cpu@101ªcpuarm,cortex-a53¶ºpsciÈ×cpu@102ªcpuarm,cortex-a53¶ºpsciÈ×cpu@103ªcpuarm,cortex-a53¶ºpsciÈ×arm-pmuarm,armv8-pmuv3`ßpqrstuvw ê psci arm,psci-0.2Ásmctimerarm,armv8-timer0ß ÿÿ ÿ ÿoscillator fixed-clockýn6 xin24m ×Fmmc@ff0c00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc¶ÿ @-úð€ ; È D r vBbiuciuciu-driveciu-sampleN ß Y €`resetlokaysýúð€}ŽÈ default® ¸Ämmc@ff0d00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc¶ÿ @-ðÑ€ ; É E s wBbiuciuciu-driveciu-sampleN ß!Y �`reset ldisabledmmc@ff0f00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc¶ÿ@-ðÑ€ ; Ë G u yBbiuciuciu-driveciu-sampleN ß#Y ƒ`resetlokaysÑãîý  default ®saradc@ff100000rockchip,saradc¶ÿ ß$; I [Bsaradcapb_pclkY W `saradc-apblokay,spi@ff110000(rockchip,rk3368-spirockchip,rk3066-spi¶ÿ; A RBspiclkapb_pclk ß, default®+ ldisabledspi@ff120000(rockchip,rk3368-spirockchip,rk3066-spi¶ÿ; B SBspiclkapb_pclk ß- default®+ ldisabledspi@ff130000(rockchip,rk3368-spirockchip,rk3066-spi¶ÿ; C TBspiclkapb_pclk ß) default® !+ ldisabledi2c@ff140000(rockchip,rk3368-i2crockchip,rk3288-i2c¶ÿ ß>+Bi2c; N default®" ldisabledi2c@ff150000(rockchip,rk3368-i2crockchip,rk3288-i2c¶ÿ ß?+Bi2c; O default®# ldisabledi2c@ff160000(rockchip,rk3368-i2crockchip,rk3288-i2c¶ÿ ß@+Bi2c; P default®$ ldisabledi2c@ff170000(rockchip,rk3368-i2crockchip,rk3288-i2c¶ÿ ßA+Bi2c; Q default®% ldisabledserial@ff180000&rockchip,rk3368-uartsnps,dw-apb-uart¶ÿýn6; M UBbaudclkapb_pclk ß78B ldisabledserial@ff190000&rockchip,rk3368-uartsnps,dw-apb-uart¶ÿýn6; N VBbaudclkapb_pclk ß88B ldisabledserial@ff1b0000&rockchip,rk3368-uartsnps,dw-apb-uart¶ÿýn6; P XBbaudclkapb_pclk ß:8B ldisabledserial@ff1c0000&rockchip,rk3368-uartsnps,dw-apb-uart¶ÿýn6; Q YBbaudclkapb_pclk ß;8Blokay default®&dma-controller@ff250000arm,pl330arm,primecell¶ÿ%@ßOZu; à Bapb_pclkthermal-zonescpu-thermalŒd¢ˆ°'tripscpu_alert0À$øÌбpassive×(cpu_alert1À8€Ìбpassive×)cpu_critÀsÌÐ ±criticalcooling-mapsmap0×(0Üÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿmap1×)0Üÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿgpu-thermalŒd¢ˆ°'tripsgpu_alert0À8€Ìбpassive×*gpu_critÀÁ8ÌÐ ±criticalcooling-mapsmap0×*0Üÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿtsadc@ff280000rockchip,rk3368-tsadc¶ÿ( ß%; H ZBtsadcapb_pclkY Ÿ `tsadc-apb initdefaultsleep®+ë,õ+ÿs ldisabled×'ethernet@ff290000rockchip,rk3368-gmac¶ÿ) ß,macirq<-8;  f g c € Å ]MBstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_maclokayI Y.pinput}/ˆrgmii default®0 ‘1 ¡ ·'B@Ì0Õusb@ff500000 generic-ehci¶ÿP ß; Âlokayusb@ff5800002rockchip,rk3368-usbrockchip,rk3066-usbsnps,dwc2¶ÿX ß; ÁBotgÞotgæø€€@@ lokaydma-controller@ff600000arm,pl330arm,primecell¶ÿ`@ßOZu;  Bapb_pclk×Gi2c@ff650000(rockchip,rk3368-i2crockchip,rk3288-i2c¶ÿe; LBi2c ß< default®2+lokaysyr827@40silergy,syr827¶@3vdd_cpuB,^ ß4vã`Ž@£·É3rtc@51haoyu,hym8563¶Q  xin32ki2c@ff660000(rockchip,rk3368-i2crockchip,rk3288-i2c¶ÿf ß=+Bi2c; M default®4 ldisabledpwm@ff680000(rockchip,rk3368-pwmrockchip,rk3288-pwm¶ÿhÔ default®5; _ ldisabledpwm@ff680010(rockchip,rk3368-pwmrockchip,rk3288-pwm¶ÿhÔ default®6; _ ldisabledpwm@ff680020(rockchip,rk3368-pwmrockchip,rk3288-pwm¶ÿh Ô; _ ldisabledpwm@ff680030(rockchip,rk3368-pwmrockchip,rk3288-pwm¶ÿh0Ô default®7; _ ldisabledserial@ff690000&rockchip,rk3368-uartsnps,dw-apb-uart¶ÿi; O WBbaudclkapb_pclk ß9 default®88Blokaymbox@ff6b0000rockchip,rk3368-mailbox¶ÿk0ß’“”•; E Bpclk_mailboxß ldisabledpower-management@ff730000&rockchip,rk3368-pmusysconsimple-mfd¶ÿspower-controller!rockchip,rk3368-power-controllerë+×Jpower-domain@12¶ ð; Ê Í Ì È Æ Ç ¾ Ô Õ Ö Ù Ñ Û c h g n o r s f d d h i l k j n m$ÿ9:;<=>?@Aëpower-domain@14¶ ; Ð Ü o p ÿBCDëpower-domain@16¶; Á À @ÿEësyscon@ff738000)rockchip,rk3368-pmugrfsysconsimple-mfd¶ÿs€×Kio-domains&rockchip,rk3368-pmu-io-voltage-domain ldisabledreboot-modesyscon-reboot-mode RBÃRBÃ'RBà 7RBÃclock-controller@ff760000rockchip,rk3368-cru¶ÿv;FBxin24m<- C× syscon@ff770000&rockchip,rk3368-grfsysconsimple-mfd¶ÿw×-io-domains"rockchip,rk3368-io-voltage-domain ldisabledwatchdog@ff800000 rockchip,rk3368-wdtsnps,dw-wdt¶ÿ€; p ßOlokaytimer@ff810000,rockchip,rk3368-timerrockchip,rk3288-timer¶ÿ�  ßB; a U Bpclktimerspdif@ff880000rockchip,rk3368-spdif¶ÿˆ ß6; S Ð BmclkhclkPGUtx default®H_ ldisabledi2s-2ch@ff890000(rockchip,rk3368-i2srockchip,rk3066-i2s¶ÿ‰ ß(Bi2s_clki2s_hclk; T ÎPGGUtxrx_ ldisabledi2s-8ch@ff898000(rockchip,rk3368-i2srockchip,rk3066-i2s¶ÿ‰€ ß5Bi2s_clki2s_hclk; R ÏPGGUtxrx default®I_ ldisablediommu@ff900800rockchip,iommu¶ÿ� ß; Ê Ô BaclkifacepJ ~ ldisablediommu@ff914000rockchip,iommu ¶ÿ‘@ÿ‘P ß; Í Õ Baclkiface~pJ ‹ ldisablediommu@ff930300rockchip,iommu¶ÿ“ ß; Æ Ñ BaclkifacepJ ~ ldisablediommu@ff9a0440rockchip,iommu ¶ÿš@@ÿš€@ ß ; Ð Ü Baclkiface~ ldisablediommu@ff9a0800rockchip,iommu¶ÿšß  ; Ð Ü Baclkiface~ ldisabledqos@ffad0000rockchip,rk3368-qossyscon¶ÿ­ ×9qos@ffad0080rockchip,rk3368-qossyscon¶ÿ­€ ×:qos@ffad0100rockchip,rk3368-qossyscon¶ÿ­ ×;qos@ffad0180rockchip,rk3368-qossyscon¶ÿ­€ ×<qos@ffad0200rockchip,rk3368-qossyscon¶ÿ­ ×=qos@ffad0280rockchip,rk3368-qossyscon¶ÿ­€ ×>qos@ffad0300rockchip,rk3368-qossyscon¶ÿ­ ×?qos@ffad0380rockchip,rk3368-qossyscon¶ÿ­€ ×@qos@ffad0400rockchip,rk3368-qossyscon¶ÿ­ ×Aqos@ffae0000rockchip,rk3368-qossyscon¶ÿ® ×Bqos@ffae0100rockchip,rk3368-qossyscon¶ÿ® ×Cqos@ffae0180rockchip,rk3368-qossyscon¶ÿ®€ ×Dqos@ffaf0000rockchip,rk3368-qossyscon¶ÿ¯ ×Eefuse@ffb00000rockchip,rk3368-efuse¶ÿ° +; q Bpclk_efusecpu-leakage@17¶temp-adjust@1f¶interrupt-controller@ffb71000 arm,gic-400¦»@¶ÿ·ÿ· ÿ·@ ÿ·`  ß ÿ×pinctrlrockchip,rk3368-pinctrl<-ÌK+Ùgpio@ff750000rockchip,gpio-bank¶ÿu; @ ßQàð¦»×Ugpio@ff780000rockchip,gpio-bank¶ÿx; A ßRàð¦»gpio@ff790000rockchip,gpio-bank¶ÿy; B ßSàð¦»×Sgpio@ff7a0000rockchip,gpio-bank¶ÿz; C ßTàð¦»×1pcfg-pull-upü×Npcfg-pull-down ×Qpcfg-pull-none×Opcfg-pull-none-12ma% ×Pemmcemmc-clk4L×emmc-cmd4M×emmc-pwr4Nemmc-bus14Nemmc-bus4@4NNNNemmc-bus8€4MMMMMMMM×emmc-reset4O×Rgmacrgmii-pinsð4OOOP P PPP POOOOOO×0rmii-pins 4OOOP P POOOOi2c0i2c0-xfer 4OO×2i2c1i2c1-xfer 4OO×4i2c2i2c2-xfer 4 OO×"i2c3i2c3-xfer 4OO×#i2c4i2c4-xfer 4OO×$i2c5i2c5-xfer 4OO×%i2si2s-8ch-bus�4 O OOOOOOOO×Ipwm0pwm0-pin4O×5pwm1pwm1-pin4O×6pwm3pwm3-pin4O×7sdio0sdio0-bus14Nsdio0-bus4@4NNNNsdio0-cmd4Nsdio0-clk4Osdio0-cd4Nsdio0-wp4Nsdio0-pwr4Nsdio0-bkpwr4Nsdio0-int4Nsdmmcsdmmc-clk4 L× sdmmc-cmd4 M× sdmmc-cd4 M× sdmmc-bus14Msdmmc-bus4@4MMMM×spdifspdif-tx4O×Hspi0spi0-clk4N×spi0-cs04N×spi0-cs14Nspi0-tx4N×spi0-rx4N×spi1spi1-clk4N×spi1-cs04N×spi1-cs14Nspi1-rx4N×spi1-tx4N×spi2spi2-clk4 N×spi2-cs04 N×!spi2-rx4 N× spi2-tx4 N×tsadcotp-pin4O×+otp-out4O×,uart0uart0-xfer 4NOuart0-cts4Ouart0-rts4Ouart1uart1-xfer 4NOuart1-cts4Ouart1-rts4Ouart2uart2-xfer 4NO×8uart3uart3-xfer 4NOuart3-cts4Ouart3-rts4Ouart4uart4-xfer 4NO×&uart4-cts4Ouart4-rts4Opcfg-pull-none-drv-8ma%×Lpcfg-pull-up-drv-8maü%×Mkeyspwr-key4Q×Tledsstby-pwren4 O×Wled-ctl4O×Vusbhost-vbus-drv4O×XchosenBserial2:115200n8memoryªmemory¶€emmc-pwrseqmmc-pwrseq-emmc®R default NS×external-gmac-clock fixed-clock ýsY@  ext_gmac×.gpio-keys gpio-keys default®Tkey-powerZ TU hGPIO Powerntgpio-leds gpio-ledsled-0 T1horion:red:led default®Vyonled-1 TU horion:blue:led default®Wyoffvcc18-regulatorregulator-fixed3vcc_18^w@vw@£·É3×vcc-host-regulatorregulator-fixed œU default®X 3vcc_host£·É3vcc-io-regulatorregulator-fixed3vcc_io^2Z v2Z £·É3×Yvcc-lan-regulatorregulator-fixed3vcc_lan^2Z v2Z £·ÉY×/vcc-sd-regulatorregulator-fixed3vcc_sd œ1 ^w@v2Z ÉY×vcc-sys-regulatorregulator-fixed3vcc_sys^LK@vLK@£·×3vcc-io-sd-regulatorregulator-fixed 3vccio_sd^w@v2Z £·ÉY×vccio-wl-regulatorregulator-fixed 3vccio_wl^2Z v2Z £·ÉYvdd-10-regulatorregulator-fixed3vdd_10^B@vB@£·É3 compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4spi0spi1spi2mmc0mmc1cpudevice_typeregenable-method#cooling-cellsphandleinterruptsinterrupt-affinityclock-frequencyclock-output-names#clock-cellsmax-frequencyclocksclock-namesfifo-depthresetsreset-namesstatusbus-widthcap-sd-highspeedcard-detect-delaypinctrl-namespinctrl-0vmmc-supplyvqmmc-supplycap-mmc-highspeedmmc-pwrseqmmc-hs200-1_2vmmc-hs200-1_8vnon-removable#io-channel-cellsvref-supplyreg-shiftreg-io-width#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-tempinterrupt-namesrockchip,grfassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaydr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizefcs,suspend-voltage-selectorregulator-nameregulator-enable-ramp-delayregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-always-onregulator-boot-onvin-supply#pwm-cells#mbox-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsdmasdma-names#sound-dai-cellspower-domains#iommu-cellsrockchip,disable-mmu-resetinterrupt-controller#interrupt-cellsrockchip,pmurangesgpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthrockchip,pinsstdout-pathreset-gpioswakeup-sourcelabellinux,codedefault-state