Ð þíæ58ÚÈ( mÚ�#radxa,rock-4c-plusrockchip,rk3399 +7Radxa ROCK 4C+aliases=/ethernet@fe300000G/i2c@ff3c0000L/i2c@ff110000Q/i2c@ff120000V/i2c@ff130000[/i2c@ff3d0000`/i2c@ff140000e/i2c@ff150000j/i2c@ff160000o/i2c@ff3e0000t/serial@ff180000|/serial@ff190000„/serial@ff1a0000Œ/serial@ff1b0000”/serial@ff370000œ/mmc@fe320000¡/mmc@fe330000cpus+cpu-mapcluster0core0¦core1¦core2¦core3¦cluster1core0¦core1¦cpu@0ªcpuarm,cortex-a53¶ºpsciÈåÛâñd  / :cpu@1ªcpuarm,cortex-a53¶ºpsciÈåÛâñd  / :cpu@2ªcpuarm,cortex-a53¶ºpsciÈåÛâñd  / :cpu@3ªcpuarm,cortex-a53¶ºpsciÈåÛâñd  / :cpu@100ªcpuarm,cortex-a72¶ºpsciÈÛ âñ´  /:thermal-idleâB'Nôcpu@101ªcpuarm,cortex-a72¶ºpsciÈÛ âñ´  /:thermal-idleâB'Nôidle-states^pscicpu-sleeparm,idle-statek|“xNú¤„: cluster-sleeparm,idle-statek|“�Nô¤Ð: display-subsystemrockchip,display-subsystemµmemory-controllerrockchip,rk3399-dmc»ÈÛ¨×dmc_clk ãdisabledpmu_a53arm,cortex-a53-pmuêpmu_a72arm,cortex-a72-pmuêpsci arm,psci-1.0Ásmctimerarm,armv8-timer@ê   õxin24m fixed-clock n6xin24m/:�pcie@f8000000rockchip,rk3399-pcie ¶øýê ÛÊË+µ,ºusbãokaydebug@fe430000&arm,coresight-cpu-debugarm,primecell¶þCÛM ×apb_pclk¦debug@fe432000&arm,coresight-cpu-debugarm,primecell¶þC ÛM ×apb_pclk¦debug@fe434000&arm,coresight-cpu-debugarm,primecell¶þC@ÛM ×apb_pclk¦debug@fe436000&arm,coresight-cpu-debugarm,primecell¶þC`ÛM ×apb_pclk¦debug@fe610000&arm,coresight-cpu-debugarm,primecell¶þaÛL ×apb_pclk¦debug@fe710000&arm,coresight-cpu-debugarm,primecell¶þqÛL ×apb_pclk¦usb@fe800000rockchip,rk3399-dwc3+Ä0Û�ƒöøôùG×ref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clkË% Òusb3-otgãokayÔ)usb@fe800000 snps,dwc3¶þ€êiÛ�öƒ×refbus_earlysuspendÛhostµ-.ºusb2-phyusb3-phy ãutmi_wideì%>_óãokayusb@fe900000rockchip,rk3399-dwc3+Ä0Û‚„÷øôùG×ref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clkË& Òusb3-otgãokayusb@fe900000 snps,dwc3¶þ�ênÛ‚÷„×refbus_earlysuspendÛhostµ/0ºusb2-phyusb3-phy ãutmi_wideì%>_óãokaydp@fec00000rockchip,rk3399-cdn-dp¶þÀê r¡Dõá ë Ûru¡o×core-clkpclkspdifgrfµ12ó ËHJýÒspdifdptxapbcore� ãdisabledportsport+endpoint@0¶’3:£endpoint@1¶’4:�interrupt-controller@fee00000 arm,gic-v3F+ÄÞP¶þàþð ÿðÿñÿòê :interrupt-controller@fee20000arm,gic-v3-its¢±¶þâ:ppi-partitionsinterrupt-partition-0¼:interrupt-partition-1¼:saradc@ff100000rockchip,rk3399-saradc¶ÿê>ÅÛPe×saradcapb_pclkËÔ Òsaradc-apbãokay×5i2c@ff110000rockchip,rk3399-i2c¶ÿAD ëÂÛAU ×i2cpclkê;adefaulto6+ ãdisabledi2c@ff120000rockchip,rk3399-i2c¶ÿBD ëÂÛBV ×i2cpclkê#adefaulto7+ ãdisabledi2c@ff130000rockchip,rk3399-i2c¶ÿCD ëÂÛCW ×i2cpclkê"adefaulto8+ãokayãÂú:«i2c@ff140000rockchip,rk3399-i2c¶ÿDD ëÂÛDX ×i2cpclkê&adefaulto9+ ãdisabledi2c@ff150000rockchip,rk3399-i2c¶ÿED ëÂÛEY ×i2cpclkê%adefaulto:+ ãdisabledi2c@ff160000rockchip,rk3399-i2c¶ÿFD ëÂÛFZ ×i2cpclkê$adefaulto;+ ãdisabledserial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uart¶ÿÛQ`×baudclkapb_pclkêcadefault o<=>ãokaybluetoothbrcm,bcm4345c5Û?×lpo )@ =" O" ^ã`adefault oABChDt5serial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uart¶ÿÛRa×baudclkapb_pclkêbadefaultoE ãdisabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uart¶ÿÛSb×baudclkapb_pclkêdadefaultoFãokayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uart¶ÿÛTc×baudclkapb_pclkêeadefaultoG ãdisabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spi¶ÿÛG[×spiclkapb_pclkêD�H H †txrxadefaultoIJKL+ ãdisabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spi¶ÿÛH\×spiclkapb_pclkê5�H H †txrxadefaultoMNOP+ ãdisabledspi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spi¶ÿÛI]×spiclkapb_pclkê4�HH†txrxadefaultoQRST+ ãdisabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spi¶ÿÛJ^×spiclkapb_pclkêC�HH†txrxadefaultoUVWX+ ãdisabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi¶ÿ ÛK_×spiclkapb_pclkê„�YY †txrxadefaultoZ[\]ó+ ãdisabledthermal-zonescpu-thermal�d¦è´^tripscpu_alert0ÄpÐбpassive:_cpu_alert1Ä$øÐбpassive:`cpu_critÄsÐÐ ±criticalcooling-mapsmap0Û_àÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿmap1Û`Hàÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿgpu-thermal�d¦è´^tripsgpu_alert0Ä$øÐбpassive:agpu_critÄsÐÐ ±criticalcooling-mapsmap0Ûa àbÿÿÿÿÿÿÿÿtsadc@ff260000rockchip,rk3399-tsadc¶ÿ&êaOD q°ÛOd×tsadcapb_pclkËè Òtsadc-apbïsainitdefaultsleepocdc ãdisabled:^qos@ffa58000rockchip,rk3399-qossyscon¶ÿ¥€ :lqos@ffa5c000rockchip,rk3399-qossyscon¶ÿ¥À :mqos@ffa60080rockchip,rk3399-qossyscon¶ÿ¦€ qos@ffa60100rockchip,rk3399-qossyscon¶ÿ¦ qos@ffa60180rockchip,rk3399-qossyscon¶ÿ¦€ qos@ffa70000rockchip,rk3399-qossyscon¶ÿ§ :pqos@ffa70080rockchip,rk3399-qossyscon¶ÿ§€ :qqos@ffa74000rockchip,rk3399-qossyscon¶ÿ§@ :nqos@ffa76000rockchip,rk3399-qossyscon¶ÿ§` :oqos@ffa90000rockchip,rk3399-qossyscon¶ÿ© :rqos@ffa98000rockchip,rk3399-qossyscon¶ÿ©€ :eqos@ffaa0000rockchip,rk3399-qossyscon¶ÿª :sqos@ffaa0080rockchip,rk3399-qossyscon¶ÿª€ :tqos@ffaa8000rockchip,rk3399-qossyscon¶ÿª€ :uqos@ffaa8080rockchip,rk3399-qossyscon¶ÿª€€ :vqos@ffab0000rockchip,rk3399-qossyscon¶ÿ« :fqos@ffab0080rockchip,rk3399-qossyscon¶ÿ«€ :gqos@ffab8000rockchip,rk3399-qossyscon¶ÿ«€ :hqos@ffac0000rockchip,rk3399-qossyscon¶ÿ¬ :iqos@ffac0080rockchip,rk3399-qossyscon¶ÿ¬€ :jqos@ffac8000rockchip,rk3399-qossyscon¶ÿ¬€ :wqos@ffac8080rockchip,rk3399-qossyscon¶ÿ¬€€ :xqos@ffad0000rockchip,rk3399-qossyscon¶ÿ­ :yqos@ffad8080rockchip,rk3399-qossyscon¶ÿ­€€ qos@ffae0000rockchip,rk3399-qossyscon¶ÿ® :kpower-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd¶ÿ1power-controller!rockchip,rk3399-power-controller0+:power-domain@34¶"ÛáÝDe0power-domain@33¶!ÛÜåDfg0power-domain@31¶ÛëêDh0power-domain@32¶  Ûí쟞Dij0power-domain@35¶#ÛÐDk0power-domain@25¶Ûl0power-domain@23¶ÛðDl0power-domain@22¶ÛÕfDm0power-domain@27¶ÛÎLDn0power-domain@28¶ÛîDo0power-domain@8¶Û~}0power-domain@9¶ Û€0power-domain@24¶ÛôDpq0power-domain@15¶0+power-domain@21¶ÛÞçrDr0power-domain@19¶ÛåßDst0power-domain@20¶ÛæàDuv0power-domain@16¶0+power-domain@17¶ÛÙÙDwx0power-domain@18¶ÛÛÛDy0syscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd¶ÿ2:io-domains&rockchip,rk3399-pmu-io-voltage-domainãokayKzspi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi¶ÿ5Û{{×spiclkapb_pclkê<adefaulto|}~+ ãdisabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart¶ÿ7Û{{"×baudclkapb_pclkêfadefaulto€ ãdisabledi2c@ff3c0000rockchip,rk3399-i2c¶ÿ<{ D ëÂÛ{ { ×i2cpclkê9adefaulto�+ãokayúã´ €pmic@20rockchip,rk809¶  ‚ê/rk808-clkout1rk808-clkout2adefaultoƒZ{‰„•„¡„­„¹…Å…Ñ„ÝDé„:?regulatorsDCDC_REG1õ  q°3™pK bvdd_centerregulator-state-memqŠ » DCDC_REG2õ  q°3™p¦qK bvdd_cpu_l: regulator-state-memqDCDC_REG3õ bvcc_ddrKregulator-state-mem»DCDC_REG4õ 2Z 32Z K bvcc3v3_sys:Dregulator-state-mem»Š2Z DCDC_REG5õ 2Z 32Z  bvcc_buck5_s3:…regulator-state-mem»Š2Z LDO_REG1õ  » 3 »  bvcc_0v9_s3regulator-state-memqLDO_REG2õ w@3w@ bvcc_1v8_s3:5regulator-state-mem»Šw@LDO_REG3õ  » 3 »  bvcc_0v9_s0:ªregulator-state-mem»Š » LDO_REG4õ w@3w@ bvcc_1v8_s0:‘regulator-state-memqLDO_REG5õ -ÆÀ3-ÆÀ bvcc_mipiregulator-state-memqLDO_REG6õ ã`3ã` bvcc_1v5_s0regulator-state-memqLDO_REG7õ -ÆÀ3-ÆÀ bvcc_3v0_s0:zregulator-state-memqLDO_REG8õ w@32Z  bvcc_sdio_s0:'regulator-state-memqLDO_REG9õ 2Z 32Z bvcc_camregulator-state-memqSWITCH_REG1õ bvcc5v0_host0_s0:Äregulator-state-mem»SWITCH_REG2õ blcd_3v3regulator-state-memqregulator@40silergy,syr827¶@Ó ðfan53555-rego† ‚ bvdd_cpu_b ß43ã`¦èõ  „:regulator-state-memqregulator@41silergy,syr828¶AÓ ðfan53555-rego‡ ‚bvdd_gpu ß43ã`¦èõ  „K:·regulator-state-memqi2c@ff3d0000rockchip,rk3399-i2c¶ÿ={ D ëÂÛ{ { ×i2cpclkê8adefaultoˆ+ ãdisabledi2c@ff3e0000rockchip,rk3399-i2c¶ÿ>{ D ëÂÛ{ { ×i2cpclkê:adefaulto‰+ ãdisabledpwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwm¶ÿB adefaultoŠÛ{ ãdisabledpwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwm¶ÿB adefaulto‹Û{ ãdisabledpwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwm¶ÿB  adefaultoŒÛ{ ãdisabledpwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwm¶ÿB0 adefaulto�Û{ ãdisableddfi@ff630000¶ÿc@rockchip,rk3399-dfi»êƒÛy ×pclk_ddr_mon ãdisabled:video-codec@ff650000rockchip,rk3399-vpu¶ÿe êrq mvepuvdpuÛëê ×aclkhclk &Žóiommu@ff650800rockchip,iommu¶ÿe@êsÛëê ×aclkiface -ó:Žvideo-codec@ff660000rockchip,rk3399-vdec¶ÿf€êt Ûí쟞×axiahbcabaccore &�ó iommu@ff660480rockchip,iommu ¶ÿf€@ÿfÀ@êuÛíì ×aclkifaceó  -:�iommu@ff670800rockchip,iommu¶ÿg@ê*ÛáÝ ×aclkiface - ãdisabledrga@ff680000rockchip,rk3399-rga¶ÿhê7ÛÜåm×aclkhclksclkËjgi Òcoreaxiahbó!efuse@ff690000rockchip,rk3399-efuse¶ÿi€+Û} ×pclk_efusecpu-id@7¶cpu-leakage@17¶gpu-leakage@18¶center-leakage@19¶cpu-leakage@1a¶logic-leakage@1b¶wafer-info@1c¶dma-controller@ff6d0000arm,pl330arm,primecell¶ÿm@ ê : EÛÓ ×apb_pclk:Ydma-controller@ff6e0000arm,pl330arm,primecell¶ÿn@ ê : EÛÔ ×apb_pclk:Hclock-controller@ff750000rockchip,rk3399-pmucru¶ÿuÛ�×xin24m/ \{D(Jñ:{clock-controller@ff760000rockchip,rk3399-cru¶ÿvÛ�×xin24m/ \ˆÀÀ@ÂÁBÉÂCãÞxíDD#g¸€/¯;šÊðÑ€xhÀ<4`õáõáúð€#ÃFõáúð€ׄׄ ë ëÂׄ:syscon@ff770000&rockchip,rk3399-grfsysconsimple-mfd¶ÿw+:io-domains"rockchip,rk3399-io-voltage-domainãokay i‘ vz ƒz “'mipi-dphy-rx0rockchip,rk3399-mipi-dphy-rx0Ûw¥o×dphy-refdphy-cfggrfó   ãdisabled:¥usb2phy@e450rockchip,rk3399-usb2phy¶äPÛ{×phyclk/clk_usbphy0_480mãokay:)host-port  ê mlinestateãokayM’:*otg-port  0êghjmotg-bvalidotg-idlinestateãokay:-usb2phy@e460rockchip,rk3399-usb2phy¶ä`Û|×phyclk/clk_usbphy1_480mãokay:+host-port  ê mlinestateãokayM’:,otg-port  0êlmomotg-bvalidotg-idlinestateãokay:/phy@f780rockchip,rk3399-emmc-phy¶÷€$Û“×emmcclk «2  ãokay:(pcie-phyrockchip,rk3399-pcie-phyÛŠ×refclk  Ë‡Òphy ãdisabled:phy@ff7c0000rockchip,rk3399-typec-phy¶ÿ|Û~}×tcpdcoretcpdphy-ref~Dúð€óË•”LÒuphyuphy-pipeuphy-tcphyãokaydp-port  :1usb3-port  :.phy@ff800000rockchip,rk3399-typec-phy¶ÿ€Û€×tcpdcoretcpdphy-ref€Dúð€ó Ë�œMÒuphyuphy-pipeuphy-tcphyãokaydp-port  :2usb3-port  :0watchdog@ff848000 rockchip,rk3399-wdtsnps,dw-wdt¶ÿ„€Û|êxrktimer@ff850000rockchip,rk3399-timer¶ÿ…êQÛhZ ×pclktimerspdif@ff870000rockchip,rk3399-spdif¶ÿ‡êB�Y†tx ×mclkhclkÛU×adefaulto”ó� ãdisabledi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2s¶ÿˆê'�YY†txrx×i2s_clki2s_hclkÛVÔabclk_onbclk_offo•–ó� ãdisabledi2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s¶ÿ‰ê(�YY†txrx×i2s_clki2s_hclkÛWÕadefaulto—ó� ãdisabledi2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s¶ÿŠê)�YY†txrx×i2s_clki2s_hclkÛXÖó�ãokay:¨vop@ff8f0000rockchip,rk3399-vop-lit ¶ÿ� ÿ� êwÛÛDׄõáÛÛµÛ×aclk_vopdclk_vophclk_vop &˜óË Òaxiahbdclkãokayport+:endpoint@0¶’™:°endpoint@1¶’š:µendpoint@2¶’›:®endpoint@3¶’œ:²endpoint@4¶’�:4iommu@ff8f3f00rockchip,iommu¶ÿ�?êwÛÛÛ ×aclkifaceó -ãokay:˜vop@ff900000rockchip,rk3399-vop-big ¶ÿ� ÿ� êvÙÙDׄõáÛÙ´Ù×aclk_vopdclk_vophclk_vop &žóË Òaxiahbdclkãokayport+:endpoint@0¶’Ÿ:´endpoint@1¶’ :¯endpoint@2¶’¡:­endpoint@3¶’¢:±endpoint@4¶’£:3iommu@ff903f00rockchip,iommu¶ÿ�?êvÛÙÙ ×aclkifaceó -ãokay:žisp0@ff910000rockchip,rk3399-cif-isp¶ÿ‘@ê+Ûnéã×ispaclkhclk &¤µ¥ºdphyó ãdisabledports+port@0¶+iommu@ff914000rockchip,iommu ¶ÿ‘@ÿ‘Pê+Ûéã ×aclkiface -ó ¿:¤isp1@ff920000rockchip,rk3399-cif-isp¶ÿ’@ê,Ûoêä×ispaclkhclk &¦µ§ºdphyó ãdisabledports+port@0¶+iommu@ff924000rockchip,iommu ¶ÿ’@ÿ’Pê,Ûêä ×aclkiface -ó ¿:¦hdmi-soundsimple-audio-card Úi2s ó hdmi-soundãokaysimple-audio-card,cpu $¨simple-audio-card,codec $©hdmi@ff940000rockchip,rk3399-dw-hdmi¶ÿ”ê(Ûtqpo×iahbisfrcecgrfrefó�ãokay .ª >‘ N«adefaulto¬:©ports+port@0¶+endpoint@0¶’­:¡endpoint@1¶’®:›port@1¶mipi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi¶ÿ–€ê- Û¢p£o×refpclkphy_cfggrfóËûÒapb+ ãdisabledports+port@0¶+endpoint@0¶’¯: endpoint@1¶’°:™mipi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi¶ÿ–€€ê. Û¢q¤o×refpclkphy_cfggrfóËüÒapb+   ãdisabled:§ports+port@0¶+endpoint@0¶’±:¢endpoint@1¶’²:œedp@ff970000rockchip,rk3399-edp¶ÿ—€ê Ûjlo ×dppclkgrfadefaulto³óËÒdp ãdisabledports+port@0¶+endpoint@0¶’´:Ÿendpoint@1¶’µ:šgpu@ff9a0000#rockchip,rk3399-maliarm,mali-t860¶ÿš0ê mjobmmugpuÛÐâó#ãokay¶ Z·:bpinctrlrockchip,rk3399-pinctrl»+Ägpio@ff720000rockchip,gpio-bank¶ÿrÛ{ê f vÞF:"gpio@ff730000rockchip,gpio-bank¶ÿsÛ{ê f vÞF:‚gpio@ff780000rockchip,gpio-bank¶ÿxÛPê f vÞF:@gpio@ff788000rockchip,gpio-bank¶ÿx€ÛQê f vÞF:gpio@ff790000rockchip,gpio-bank¶ÿyÛRê f vÞFpcfg-pull-up ‚:»pcfg-pull-down �:¾pcfg-pull-none ž:¸pcfg-pull-none-12ma ž « :ºpcfg-pull-none-13ma ž « :¹pcfg-pull-none-18ma ž «:½pcfg-pull-none-20ma ž «pcfg-pull-up-2ma ‚ «pcfg-pull-up-8ma ‚ «:¼pcfg-pull-up-18ma ‚ «pcfg-pull-up-20ma ‚ «pcfg-pull-down-4ma � «pcfg-pull-down-8ma � «pcfg-pull-down-12ma � « pcfg-pull-down-18ma � «pcfg-pull-down-20ma � «pcfg-output-high ºpcfg-output-low Æpcfg-input-enable Ñpcfg-input-pull-up Ñ ‚pcfg-input-pull-down Ñ �clockclk-32k Þ¸cifcif-clkin Þ ¸cif-clkouta Þ ¸edpedp-hpd Þ¸:³gmacrgmii-pinsð Þ¹¸ ¸ ¹ ¸ ¸¸¸¸¹¹¸¸¹¹:rmii-pins  Þ ¸ ¹ ¸ ¸ ¸¸¸¸¹¹i2c0i2c0-xfer Þ¸¸:�i2c1i2c1-xfer Þ¸¸:6i2c2i2c2-xfer Þºº:7i2c3i2c3-xfer Þ¸¸:8i2c4i2c4-xfer Þ ¸ ¸:ˆi2c5i2c5-xfer Þ ¸ ¸:9i2c6i2c6-xfer Þ ¸ ¸::i2c7i2c7-xfer Þ¸¸:;i2c8i2c8-xfer Þ¸¸:‰i2s0i2s0-2ch-bus` Þ¸¸¸¸¸¸i2s0-2ch-bus-bclk-off` Þ¸¸¸¸¸¸i2s0-8ch-bus� Þ¸¸¸¸¸¸¸¸¸:•i2s0-8ch-bus-bclk-off� Þ¸¸¸¸¸¸¸¸¸:–i2s1i2s1-2ch-busP Þ¸¸¸¸¸:—i2s1-2ch-bus-bclk-offP Þ¸¸¸¸¸sdio0sdio0-bus1 Þ»sdio0-bus4@ Þ»»»»:sdio0-cmd Þ»: sdio0-clk Þ¸:!sdio0-cd Þ»sdio0-pwr Þ»sdio0-bkpwr Þ»sdio0-wp Þ»sdio0-int Þ»sdmmcsdmmc-bus1 Þ»sdmmc-bus4@ Þ¼ ¼ ¼ ¼:&sdmmc-clk Þ ½:$sdmmc-cmd Þ ¼:%sdmmc-cd Þ»sdmmc-wp Þ»suspendap-pwroff Þ¸ddrio-pwroff Þ¸spdifspdif-bus Þ¸:”spdif-bus-1 Þ¸spi0spi0-clk Þ»:Ispi0-cs0 Þ»:Lspi0-cs1 Þ»spi0-tx Þ»:Jspi0-rx Þ»:Kspi1spi1-clk Þ »:Mspi1-cs0 Þ »:Pspi1-rx Þ»:Ospi1-tx Þ»:Nspi2spi2-clk Þ »:Qspi2-cs0 Þ »:Tspi2-rx Þ »:Sspi2-tx Þ »:Rspi3spi3-clk Þ»:|spi3-cs0 Þ»:spi3-rx Þ»:~spi3-tx Þ»:}spi4spi4-clk Þ»:Uspi4-cs0 Þ»:Xspi4-rx Þ»:Wspi4-tx Þ»:Vspi5spi5-clk Þ»:Zspi5-cs0 Þ»:]spi5-rx Þ»:\spi5-tx Þ»:[testclktest-clkout0 Þ¸test-clkout1 Þ¸test-clkout2 Þ¸tsadcotp-pin Þ¸:cotp-out Þ¸:duart0uart0-xfer Þ»¸:<uart0-cts Þ¸:=uart0-rts Þ¸:>uart1uart1-xfer Þ » ¸:Euart2auart2a-xfer Þ» ¸uart2buart2b-xfer Þ»¸uart2cuart2c-xfer Þ»¸:Fuart3uart3-xfer Þ»¸:Guart3-cts Þ¸uart3-rts Þ¸uart4uart4-xfer Þ»¸:€uarthdcpuarthdcp-xfer Þ»¸pwm0pwm0-pin Þ¸:Špwm0-pin-pull-down Þ¾vop0-pwm-pin Þ¸vop1-pwm-pin Þ¸pwm1pwm1-pin Þ¸:‹pwm1-pin-pull-down Þ¾pwm2pwm2-pin Þ¸:Œpwm2-pin-pull-down Þ¾pwm3apwm3a-pin Þ¸:�pwm3bpwm3b-pin Þ¸hdmihdmi-i2c-xfer Þ¸¸hdmi-cec Þ¸:¬pciepci-clkreqn-cpm Þ¸pci-clkreqnb-cpm Þ¸btbt-enable-h Þ ¸:Cbt-host-wake-l Þ¸:Abt-wake-l Þ¸:Bledsuser-led1 Þ¸:¿user-led2 Þ¸:Àpmicpmic-int-l Þ»:ƒvsel1-gpio Þ¾:†vsel2-gpio Þ¾:‡usb-typecvcc5v0-typec-en Þ»:Åusb2vcc5v0-host-en Þ»:Ãwifiwifi-enable-h Þ ¸:Áwifi-host-wake-l Þ¸:#opp-table-0operating-points-v2 ì: opp00 ÷Q– þ Yø YøÐ œ@opp01 ÷#ÃF þ Yø YøÐopp02 ÷0£, þ »  » Ðopp03 ÷<Ü þà˜à˜Ðopp-table-1operating-points-v2 ì: opp00 ÷Q– þ Yø YøÐ œ@opp01 ÷#ÃF þ Yø YøÐopp02 ÷0£, þ Yø YøÐopp03 ÷<Ü þHHÐopp04 ÷G†Œ þB@B@Ðopp05 ÷Tfr þg8g8Ðopp06 ÷ZJ þŒ0Œ0Ðopp-table-2operating-points-v2:¶opp00 ÷ ë þ Yø YøŒ0opp01 ÷ᣠþ Yø YøŒ0opp02 ÷ׄ þ Yø YøŒ0opp03 ÷#ÃF þà˜à˜Œ0chosen serial2:1500000n8external-gmac-clock fixed-clock sY@ clkin_gmac/:leds gpio-ledsadefaulto¿Àled-0 )power 2 ‹ 8default-onled-1 )status 2 ‹ 8heartbeatsdio-pwrseqmmc-pwrseq-simpleÛ? ×ext_clockadefaultoÁ N" :vcc-3v3-regulatorregulator-fixedbvcc_3v3õ 2Z 32Z  D:Âvcc3v3-phy1-regulatorregulator-fixed bvcc3v3_phy1õ 2Z 32Z  Â:vcc5v0-host-regulatorregulator-fixed Z „adefaultoà bvcc5v0_host1õ  Ä:’vcc5v0-sys-regulatorregulator-fixed bvcc5v0_sysõ LK@3LK@:„vcc5v0-typec-regulatorregulator-fixed Z „‚adefaultoÅ bvcc5v0_typecõ  „vdd-log-regulatorregulator-fixedbvdd_logõ ~ð3~ð „ compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4mmc0mmc1cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesoperating-points-v2cpu-supplyphandleduration-usexit-latency-usentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usmin-residency-usportsrockchip,pmudevfreq-eventsclock-namesstatusinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-mapmax-link-speedmsi-mapphysphy-namesrangesresetsreset-namesinterrupt-controllerpower-domainsrockchip,grfsnps,txpblassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modepinctrl-namespinctrl-0snps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaymax-frequencyfifo-depthbus-widthcap-sdio-irqcap-sd-highspeedkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr104assigned-clock-ratescap-mmc-highspeedcard-detect-delaydisable-wpcd-gpiosvqmmc-supplyarasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs200-1_8vextcondr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controller#msi-cellsaffinity#io-channel-cellsvref-supplyi2c-scl-rising-time-nsi2c-scl-falling-time-nsreg-shiftreg-io-widthdevice-wakeup-gpioshost-wakeup-gpiosshutdown-gpiosmax-speedvbat-supplyvddio-supplydmasdma-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cells#power-domain-cellspm_qospmu1830-supplyrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-initial-moderegulator-nameregulator-off-in-suspendregulator-suspend-microvoltregulator-ramp-delayregulator-on-in-suspendfcs,suspend-voltage-selectorregulator-compatiblevsel-gpiosvin-supply#pwm-cellsiommus#iommu-cells#dma-cellsarm,pl330-periph-burst#reset-cellsaudio-supplybt656-supplygpio1830-supplysdmmc-supply#phy-cellsdrive-impedance-ohmrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiavdd-0v9-supplyavdd-1v8-supplyddc-i2c-busmali-supplygpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsstdout-pathfunctioncolorlinux,default-triggerreset-gpiosenable-active-high