Ð þíÙl8Í0( <Ìø ",pine64,quartz64-arockchip,rk35667Pine64 RK3566 Quartz64-A Boardaliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000�/serial@fe650000‰/serial@fe660000‘/serial@fe670000™/serial@fe680000¡/serial@fe690000©/serial@fe6a0000±/serial@fe6b0000¹/serial@fe6c0000Á/serial@fe6d0000É/spi@fe610000Î/spi@fe620000Ó/spi@fe630000Ø/spi@fe640000Ý/ethernet@fe010000ç/mmc@fe2b0000ì/mmc@fe310000cpus cpu@0ñcpu,arm,cortex-a55ýpsci%9D cpu@100ñcpu,arm,cortex-a55ýpsci%9D cpu@200ñcpu,arm,cortex-a55ýpsci%9D cpu@300ñcpu,arm,cortex-a55ýpsci%9D opp-table-0,operating-points-v2LDopp-408000000WQ– ^ »  » Œ0lœ@opp-600000000W#ÃF ^ »  » Œ0opp-816000000W0£, ^ »  » Œ0}opp-1104000000WAÍ´ ^ »  » Œ0opp-1416000000WTfr ^ »  » Œ0opp-1608000000W_Ø" ^à˜à˜Œ0opp-1800000000WkIÒ ^��Œ0display-subsystem,rockchip,display-subsystem‰firmwarescmi ,arm,scmi-smc�‚š protocol@14ý Dopp-table-1,operating-points-v2DCopp-200000000W ëÂ^ –¨opp-300000000Wá£^ –¨opp-400000000Wׄ^ –¨opp-600000000W#ÃF^ –¨opp-700000000W)¹'^ » opp-800000000W/¯^B@hdmi-sound,simple-audio-card­HDMIÄi2sÝ÷okaysimple-audio-card,codecþsimple-audio-card,cpuþpmu,arm,cortex-a55-pmu0äåæç psci ,arm,psci-1.0smctimer,arm,armv8-timer0   &xin24m ,fixed-clock=n6Mxin24m Dxin32k ,fixed-clock=€Mxin32k` jdefault sram@10f000 ,mmio-sramýð xðsram@0,arm,scmi-shmemýDsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahciýü@›œ�satapmaliverxoob _‹ �sata-phyš¬ ÷disabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahciýü€ ¡¢satapmaliverxoob `‹ �sata-phyš¬ ÷disabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3ýüÀ@ ©¦§¥ref_clksuspend_clkbus_clkºhost Âutmi_wide¬Ë”Ò÷okay‹ �usb2-phyë òhigh-speedusb@fd000000,rockchip,rk3568-dwc3snps,dwc3ýý@ ª©ª¨ref_clksuspend_clkbus_clkºhost ‹�usb2-phyusb3-phy Âutmi_wide¬Ë•Ò÷okayinterrupt-controller@fd400000 ,arm,gic-v3 ýý@ýF  &ýA0(;Dusb@fd800000 ,generic-ehciýý€ ‚½¾¼‹�usb÷okayusb@fd840000 ,generic-ohciýý„ ƒ½¾¼‹�usb÷okayusb@fd880000 ,generic-ehciýýˆ …¿À¼‹�usb÷okayusb@fd8c0000 ,generic-ohciýýŒ †¿À¼‹�usb÷okaysyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfdýýÂD·io-domains&,rockchip,rk3568-pmu-io-voltage-domain÷okayJXft‚�ž¬ºsyscon@fdc50000ýýÅ ,rockchip,rk3566-pipe-grfsysconD°syscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfdýýÆDsyscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconýýÈD±syscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconýýÉD²syscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconýýÊ€D³syscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconýýÊ€€D¶clock-controller@fdd00000,rockchip,rk3568-pmucruýýРÈDclock-controller@fdd20000,rockchip,rk3568-cruýýÒxin24m ÈÕåG†Œ ëÂúDi2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2cýýÔ .- i2cpclk` jdefault ÷okayregulator@1c ,tcs,tcs4525ý$vdd_cpu3 5KŒ0cüxŒž!Dregulator-state-mem©pmic@20,rockchip,rk817ý "ÕH–mclkHMrk808-clkout1rk808-clkout2 jdefault`#$Ùú !%!1!=!I!U!a!m!y%DŽregulatorsDCDC_REG1xŒ3¡ K™p… » cqž $vdd_logicregulator-state-memµÍ » DCDC_REG2xŒ3¡ K™p… » cqž$vdd_gpuDDregulator-state-mem©DCDC_REG3xŒž$vcc_ddrregulator-state-memµDCDC_REG4xŒ32Z K2Z ž$vcc_3v3Dregulator-state-mem©LDO_REG1xŒ3w@Kw@ $vcca1v8_pmuD“regulator-state-memµÍw@LDO_REG2xŒ3 » K »  $vdda_0v9DYregulator-state-mem©LDO_REG3xŒ3 » K »  $vdda0v9_pmuregulator-state-memµÍ » LDO_REG4xŒ32Z K2Z  $vccio_acodecDregulator-state-mem©LDO_REG5xŒ3w@K2Z  $vccio_sdDregulator-state-mem©LDO_REG6xŒ32Z K2Z  $vcc3v3_pmuDregulator-state-memµÍ2Z LDO_REG7xŒ3w@Kw@$vcc_1v8Dregulator-state-mem©LDO_REG8xŒ3w@Kw@ $vcc1v8_dvpDregulator-state-mem©LDO_REG9xŒ3*¹€K*¹€ $vcc2v8_dvpregulator-state-mem©BOOSTxŒ3LK@KLK@$boostD%regulator-state-mem©OTG_SWITCH $otg_switchregulator-state-mem©serial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uartýýÕ t ,baudclkapb_pclké&&`'jdefaultîû÷okaypwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwmýý× 0 pwmpclk`(jdefault ÷disabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwmýý× 0 pwmpclk`)jdefault ÷disabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwmýý×  0 pwmpclk`*jdefault ÷disabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwmýý×0 0 pwmpclk`+jdefault ÷disabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdýýÙpower-controller!,rockchip,rk3568-power-controller Dpower-domain@7ý$,power-domain@8ýÌÍ $-./power-domain@9ý ÚÛÜ $012power-domain@10ý ñò$345678power-domain@11ý í$9power-domain@13ý $:power-domain@14ý $;<=power-domain@15ý$>?@ABgpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrostýýæ@$()' +jobmmugpugpubus%C¬÷okay;DD¡video-codec@fdea0400,rockchip,rk3568-vpuýýê ‹+vdpuîï aclkhclkGE¬ iommu@fdea0800,rockchip,rk3568-iommuýýê@ Š aclkifaceîï¬ NDEvideo-codec@fdee0000,rockchip,rk3568-vepuýýî @ýþ aclkhclkGF¬ iommu@fdee0800,rockchip,rk3568-iommuýýî@ ?ýþ aclkiface¬ NDFmmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcýþ@ d ÁÂŽ�biuciuciu-driveciu-sample[fðÑ€Ëëtreset ÷disabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20aýþ +macirqeth_wake_irq@†‰‰ÇÃĉÈWstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_refËì tstmmacethú€G�¡H´IÇ÷okayÕ‰‡†Â‡†JÐinputÝèrgmiijdefault`KLMNOP ñ" N † ,05>Qmdio,snps,dwmac-mdio ethernet-phy@0,ethernet-phy-ieee802.3-c22ýDQstmmac-axi-configIScDGrx-queues-configsDHqueue0tx-queues-config‰DIqueue0vop@fe040000 ýþ0þ@Ÿvopgamma-lut ”(ÝÞßàá%aclkhclkdclk_vp0dclk_vp1dclk_vp2GR¬ ú÷okay,rockchip,rk3566-vopÕßàÂports Dport@0ý endpoint@2ý©SDZport@1ý port@2ý iommu@fe043e00,rockchip,rk3568-iommu ýþ>þ? ”ÝÞ aclkifaceN¬ ÷okayDRdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsiýþ D pclkhclkèÚ�dphy‹T¬ tapbËú ÷disabledports port@0ýport@1ýdsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsiýþ E pclkhclkéÚ�dphy‹U¬ tapbËú ÷disabledports port@0ýport@1ýhdmi@fe0a0000,rockchip,rk3568-dw-hdmiýþ  -(æç“(Úiahbisfrcecrefjdefault `VWX¬ îúú÷okay¹YÉDports port@0ýendpoint©ZDSport@1ýendpoint©[DÂqos@fe128000,rockchip,rk3568-qossysconýþ€ D,qos@fe138080,rockchip,rk3568-qossysconýþ€€ D;qos@fe138100,rockchip,rk3568-qossysconýþ� D<qos@fe138180,rockchip,rk3568-qossysconýþ�€ D=qos@fe148000,rockchip,rk3568-qossysconýþ€ D-qos@fe148080,rockchip,rk3568-qossysconýþ€€ D.qos@fe148100,rockchip,rk3568-qossysconýþ� D/qos@fe150000,rockchip,rk3568-qossysconýþ D9qos@fe158000,rockchip,rk3568-qossysconýþ€ D3qos@fe158100,rockchip,rk3568-qossysconýþ� D4qos@fe158180,rockchip,rk3568-qossysconýþ�€ D5qos@fe158200,rockchip,rk3568-qossysconýþ‚ D6qos@fe158280,rockchip,rk3568-qossysconýþ‚€ D7qos@fe158300,rockchip,rk3568-qossysconýþƒ D8qos@fe180000,rockchip,rk3568-qossysconýþ qos@fe190000,rockchip,rk3568-qossysconýþ D>qos@fe190280,rockchip,rk3568-qossysconýþ€ D?qos@fe190300,rockchip,rk3568-qossysconýþ D@qos@fe190380,rockchip,rk3568-qossysconýþ€ DAqos@fe190400,rockchip,rk3568-qossysconýþ DBqos@fe198000,rockchip,rk3568-qossysconýþ€ D:qos@fe1a8000,rockchip,rk3568-qossysconýþ€ D0qos@fe1a8080,rockchip,rk3568-qossysconýþ€€ D1qos@fe1a8100,rockchip,rk3568-qossysconýþ� D2pcie@fe260000,rockchip,rk3568-pcie0ýÀ@þ&ôŸdbiapbconfig<KJIHG+syspmcmsglegacyerrÙ(�‚ƒ„…$aclk_mstaclk_slvaclk_dbipclkauxñpciã`ö\\\\$3BJ‹ �pcie-phy¬Txôôô ô à@Ë¡tpipe ÷okayjdefault`] T^ `_legacy-interrupt-controller HD\mmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcýþ+@ b °±Š‹biuciuciu-driveciu-sample[fðÑ€ËÔtreset÷okaypz ‹"”jdefault``abcŸ­d¹mmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcýþ,@ c ²³Œ�biuciuciu-driveciu-sample[fðÑ€ËÖtreset÷okaypzÆÓéeôjdefault `fghŸ­i¹spi@fe300000 ,rockchip,sfcýþ0@ exvclk_sfchclk_sfc`jjdefault ÷disabled flash@0,jedec,spi-norý n6  %mmc@fe310000,rockchip,rk3568-dwcmshcýþ1 Õ{}å ëÂn6(|zy{}corebusaxiblocktimer÷okayp 6ô­¹i2s@fe400000,rockchip,rk3568-i2s-tdmýþ@ 4Õ=AåFÏqFÏq?C9mclk_txmclk_rxhclkék EtxËPQ ttx-mrx-múú÷okayDi2s@fe410000,rockchip,rk3568-i2s-tdmýþA 5ÕEIåFÏqFÏqGK:mclk_txmclk_rxhclkékk ErxtxËRS ttx-mrx-mújdefault`lmnoú÷okay ODÅi2s@fe420000,rockchip,rk3568-i2s-tdmýþB 6ÕMåFÏqOO;mclk_txmclk_rxhclkékk EtxrxËTtmújdefault`pqrsú ÷disabledi2s@fe430000,rockchip,rk3568-i2s-tdmýþC 7SW<mclk_txmclk_rxhclkékk EtxrxËUV ttx-mrx-múú ÷disabledpdm@fe440000,rockchip,rk3568-pdmýþD LZYpdm_clkpdm_hclkék  Erx`tuvwxyjdefaultËXtpdm-mú ÷disabledspdif@fe460000,rockchip,rk3568-spdifýþF f mclkhclk_\ék Etxjdefault`zú÷okayDÇdma-controller@fe530000,arm,pl330arm,primecellýþS@  j  apb_pclk �D&dma-controller@fe550000,arm,pl330arm,primecellýþU@ j  apb_pclk �Dki2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþZ /HG i2cpclk`{jdefault  ÷disabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþ[ 0JI i2cpclk`|jdefault  ÷disabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþ\ 1LK i2cpclk`}jdefault ÷okayi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþ] 2NM i2cpclk`~jdefault  ÷disabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþ^ 3PO i2cpclk`jdefault  ÷disabledwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdtýþ` • tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spiýþa gRQspiclkapb_pclké&& Etxrxjdefault `€�‚  ÷disabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spiýþb hTSspiclkapb_pclké&& Etxrxjdefault`ƒ„  ÷disabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spiýþc iVUspiclkapb_pclké&& Etxrxjdefault `…†‡  ÷disabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spiýþd jXWspiclkapb_pclké&& Etxrxjdefault `ˆ‰Š  ÷disabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uartýþe ubaudclkapb_pclké&& `‹Œ�jdefaultîû÷okay Œbluetooth,brcm,bcm43438-btŽlpo œ� ®� Â�jdefault `�‘’ Ñ! Ý“ ê-ÆÀserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartýþf v# baudclkapb_pclké&&`”jdefaultîû÷okayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartýþg w'$baudclkapb_pclké&&`•jdefaultîû ÷disabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uartýþh x+(baudclkapb_pclké&& `–jdefaultîû ÷disabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uartýþi y/,baudclkapb_pclké& & `—jdefaultîû ÷disabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþj z30baudclkapb_pclké& & `˜jdefaultîû ÷disabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþk {74baudclkapb_pclké&&`™jdefaultîû ÷disabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþl |;8baudclkapb_pclké&&`šjdefaultîû ÷disabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþm }?<baudclkapb_pclké&&`›jdefaultîû ÷disabledthermal-zonescpu-thermal ôd è œtripscpu_alert0 (p 4ÐøpassiveD�cpu_alert1 ($ø 4Ðøpassivecpu_crit (s 4Ð øcriticalcpu_hot (ÖØ 4ÐøactiveDžcooling-mapsmap0 ?�0 D ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿmap1 ?ž DŸÿÿÿÿÿÿÿÿgpu-thermal ô è œtripsgpu-threshold (p 4Ðøpassivegpu-target ($ø 4ÐøpassiveD gpu-crit (s 4Ð øcriticalcooling-mapsmap0 ?  D¡ÿÿÿÿÿÿÿÿtsadc@fe710000,rockchip,rk3568-tsadcýþq sÕåf@ ®`tsadcapb_pclkË�‚×ú Ssjinitdefaultsleep`¢ j£ t¢ ~÷okay ” «Dœsaradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcýþr ]saradcapb_pclkË€ tsaradc-apb Æ ÷disabledpwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþnZY pwmpclk`¤jdefault ÷disabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþnZY pwmpclk`¥jdefault ÷disabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþn ZY pwmpclk`¦jdefault ÷disabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþn0ZY pwmpclk`§jdefault ÷disabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo]\ pwmpclk`¨jdefault ÷disabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo]\ pwmpclk`©jdefault ÷disabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo ]\ pwmpclk`ªjdefault ÷disabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo0]\ pwmpclk`«jdefault ÷disabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp`_ pwmpclk`¬jdefault ÷disabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp`_ pwmpclk`­jdefault ÷disabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp `_ pwmpclk`®jdefault ÷disabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp0`_ pwmpclk`¯jdefault ÷disabledphy@fe830000,rockchip,rk3568-naneng-combphyýþƒ"} refapbpipeÕ"åõáËÇ ذ ê± ÷okayDphy@fe840000,rockchip,rk3568-naneng-combphyýþ„%~ refapbpipeÕ%åõáËÉ ذ ê² ÷okayDphy@fe870000,rockchip,rk3568-csi-dphyýþ‡ypclk ˺tapbú ÷disabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphyýþ… refpclkz ¬ tapbË» ÷disabledDTmipi-dphy@fe860000,rockchip,rk3568-dsi-dphyýþ† refpclk{ ¬ tapb˼ ÷disabledDUusb2phy@fe8a0000,rockchip,rk3568-usb2phyýþŠphyclkMclk_usbphy0_480m ‡ ³ ÷okayDhost-port ÷okayÝ´Dotg-port ÷okayݵDusb2phy@fe8b0000,rockchip,rk3568-usb2phyýþ‹phyclkMclk_usbphy1_480m ˆ ¶ ÷okayhost-port ÷okayÝ´Dotg-port ÷okayÝ´Dpinctrl,rockchip,rk3568-pinctrlú · xgpio@fdd60000,rockchip,gpio-bankýýÖ !.  ( 8D"gpio@fe740000,rockchip,gpio-bankýþt "cd ( 8D^gpio@fe750000,rockchip,gpio-bankýþu #ef ( 8D�gpio@fe760000,rockchip,gpio-bankýþv $gh ( 8gpio@fe770000,rockchip,gpio-bankýþw %ij ( 8DËpcfg-pull-up DDºpcfg-pull-down QDÀpcfg-pull-none `D¸pcfg-pull-none-drv-level-1 ` mD¼pcfg-pull-none-drv-level-2 ` mD»pcfg-pull-none-drv-level-3 ` mD¿pcfg-pull-up-drv-level-1 D mD¾pcfg-pull-up-drv-level-2 D mD¹pcfg-pull-none-smt ` |D½acodecaudiopwmbt656bt1120camcan0can1can2cifclk32kclk32k-out0 ‘¸D cpuebcedpdpemmceth0eth1flashfspifspi-pins` ‘¸¸¸¸¸¸Djgmac0gmac1gmac1m0-miim ‘¸¸DKgmac1m0-clkinout ‘¸DOgmac1m0-rx-bus20 ‘ ¸ ¸ ¸DMgmac1m0-tx-bus20 ‘ »»¸DLgmac1m0-rgmii-clk ‘¸¼DNgmac1m0-rgmii-bus@ ‘¸¸»»DPgpuhdmitxhdmitxm0-cec ‘¸DXhdmitx-scl ‘¸DVhdmitx-sda ‘¸DWi2c0i2c0-xfer ‘ ½ ½D i2c1i2c1-xfer ‘ ½ ½D{i2c2i2c2m0-xfer ‘ ½½D|i2c3i2c3m0-xfer ‘½½D}i2c4i2c4m0-xfer ‘ ½ ½D~i2c5i2c5m0-xfer ‘ ½ ½Di2s1i2s1m0-lrcktx ‘¸Dmi2s1m0-mclk ‘¸D$i2s1m0-sclktx ‘¸Dli2s1m0-sdi0 ‘ ¸Dni2s1m0-sdo0 ‘¸Doi2s2i2s2m0-lrcktx ‘¸Dqi2s2m0-sclktx ‘¸Dpi2s2m0-sdi ‘¸Dri2s2m0-sdo ‘¸Dsi2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk ‘¸Dtpdmm0-clk1 ‘¸Dupdmm0-sdi0 ‘ ¸Dvpdmm0-sdi1 ‘ ¸Dwpdmm0-sdi2 ‘ ¸Dxpdmm0-sdi3 ‘¸Dypmicpmic-int-l ‘ºD#pmupwm0pwm0m0-pins ‘¸D(pwm1pwm1m0-pins ‘¸D)pwm2pwm2m0-pins ‘¸D*pwm3pwm3-pins ‘¸D+pwm4pwm4-pins ‘¸D¤pwm5pwm5-pins ‘¸D¥pwm6pwm6-pins ‘¸D¦pwm7pwm7-pins ‘¸D§pwm8pwm8m0-pins ‘ ¸D¨pwm9pwm9m0-pins ‘ ¸D©pwm10pwm10m0-pins ‘ ¸Dªpwm11pwm11m0-pins ‘¸D«pwm12pwm12m0-pins ‘¸D¬pwm13pwm13m0-pins ‘¸D­pwm14pwm14m0-pins ‘¸D®pwm15pwm15m0-pins ‘¸D¯refclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ ‘¹¹¹¹D`sdmmc0-clk ‘¹Dasdmmc0-cmd ‘¹Dbsdmmc0-det ‘ºDcsdmmc1sdmmc1-bus4@ ‘¹¹¹¹Dfsdmmc1-clk ‘¹Dhsdmmc1-cmd ‘¹Dgsdmmc2spdifspdifm0-tx ‘¸Dzspi0spi0m0-pins0 ‘ ¸¸¸D‚spi0m0-cs0 ‘¸D€spi0m0-cs1 ‘¸D�spi1spi1m1-pins0 ‘¸¸¸D„spi1m1-cs0 ‘¸Dƒspi2spi2m0-pins0 ‘¸¸¸D‡spi2m0-cs0 ‘¸D…spi2m0-cs1 ‘¸D†spi3spi3m0-pins0 ‘ ¸¸ ¸DŠspi3m0-cs0 ‘¸Dˆspi3m0-cs1 ‘¸D‰tsadctsadc-shutorg ‘¸D£tsadc-pin ‘¸D¢uart0uart0-xfer ‘ººD'uart1uart1m0-xfer ‘ º ºD‹uart1m0-ctsn ‘¸DŒuart1m0-rtsn ‘ ¸D�uart2uart2m0-xfer ‘ººD”uart3uart3m0-xfer ‘ººD•uart4uart4m0-xfer ‘ººD–uart5uart5m0-xfer ‘ººD—uart6uart6m0-xfer ‘ººD˜uart7uart7m0-xfer ‘ººD™uart8uart8m0-xfer ‘ººDšuart9uart9m0-xfer ‘ººD›vopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2btbt-enable-h ‘¸D’bt-host-wake-l ‘ÀD�bt-wake-l ‘¸D‘fanfan-en-h ‘¸DÁledswork-led-enable-h ‘¸DÃdiy-led-enable-h ‘¸DÄpciepcie-enable-h ‘¸DÊpcie-reset-h ‘ ¸D]usb2vcc5v0-usb20-host-en ‘ ¸DÌsdio-pwrseqwifi-enable-h ‘¸DÆvcc_sdvcc-sd-h ‘¸DÎchosen Ÿserial2:1500000n8external-gmac1-clock ,fixed-clock=sY@ Mgmac1_clkin DJgpio_fan ,gpio-fan Z" «”jdefault`ÁDŸhdmi-con,hdmi-connectorøaportendpoint©ÂD[leds ,gpio-ledsled-work ¾work-led Äoff Z"jdefault`à Òled-diy ¾diy-led Äon Z" éheartbeatjdefault`Ä Òrk817-sound,simple-audio-cardÄi2s ­Analog RK817Ýsimple-audio-card,cpuþÅsimple-audio-card,codecþŽsdio-pwrseq,mmc-pwrseq-simpleŽ ext_clockjdefault`Æ ÿd LK@ T�Despdif-dit,linux,spdif-ditúDÈspdif-sound,simple-audio-card­SPDIFsimple-audio-card,cpuþÇsimple-audio-card,codecþÈvcc12v_dcin,regulator-fixed $vcc12v_dcinxŒ3·K·DÉvbus,regulator-fixed$vbusxŒ3LK@KLK@žÉDÏvcc3v3-pcie-p-regulator,regulator-fixed ) ü"jdefault`Ê$vcc3v3_pcie_p32Z K2Z žD_vcc5v0_usb,regulator-fixed $vcc5v0_usbxŒ3LK@KLK@žÉDÍvcc5v0_usb20_host,regulator-fixed ) üË jdefault`Ì$vcc5v0_usb20_host3LK@KLK@žÍD´vcc5v0_usb20_otg,regulator-fixed ) üË $vcc5v0_usb20_otg3LK@KLK@ž%Dµvcc3v3_sd,regulator-fixed ü"jdefault`ÎŒ $vcc3v3_sd32Z K2Z žDdvcc_sys,regulator-fixed$vcc_sysxŒ3C#€KC#€žÏD!vcc_wl,regulator-fixed$vcc_wlxŒ32Z K2Z ž!Di interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3ethernet0mmc0mmc1device_typeregclocks#cooling-cellsenable-methodoperating-points-v2cpu-supplyphandleopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityarm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesrangesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconmaximum-speedinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerpmuio1-supplypmuio2-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-always-onregulator-boot-onvin-supplyregulator-off-in-suspendassigned-clock-parentsrockchip,system-power-controller#sound-dai-cellswakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyregulator-init-microvoltregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsfifo-depthmax-frequencyreset-namessnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsoclock_in_outphy-supplyphy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delayphy-handlesnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpointavdd-0v9-supplyavdd-1v8-supplybus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesreset-gpiosvpcie3v3-supplybus-widthcap-sd-highspeedcd-gpiosdisable-wpsd-uhs-sdr104vmmc-supplyvqmmc-supplycap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablespi-max-frequencyspi-rx-bus-widthspi-tx-bus-widthmmc-hs200-1_8vdma-namesrockchip,trcm-sync-tx-onlyarm,pl330-periph-burst#dma-cellsuart-has-rtsctshost-wakeup-gpiosdevice-wakeup-gpiosshutdown-gpiosvbat-supplyvddio-supplymax-speedpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsstdout-pathgpio-fan,speed-maplabeldefault-stateretain-state-suspendedlinux,default-triggerpost-power-on-delay-mspower-off-delay-usenable-active-high