Ð þíçˆ8Ûô( ”Û¼ *,rockchip,rk3568-odroid-m1rockchip,rk35687Hardkernel ODROID-M1aliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fe5c0000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fdd40000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fe650000�/serial@fdd50000‰/serial@fe660000‘/serial@fe670000™/serial@fe680000¡/serial@fe690000©/serial@fe6a0000±/serial@fe6b0000¹/serial@fe6c0000Á/serial@fe6d0000É/spi@fe610000Î/spi@fe620000Ó/spi@fe630000Ø/spi@fe640000Ý/ethernet@fe2a0000ç/mmc@fe310000ì/mmc@fe2b0000cpus cpu@0ñcpu,arm,cortex-a55ýpsci%9D cpu@100ñcpu,arm,cortex-a55ýpsci%9D cpu@200ñcpu,arm,cortex-a55ýpsci%9D cpu@300ñcpu,arm,cortex-a55ýpsci%9D opp-table-0,operating-points-v2LDopp-408000000WQ– ^ »  » Œ0lœ@opp-600000000W#ÃF ^ »  » Œ0opp-816000000W0£, ^ »  » Œ0}opp-1104000000WAÍ´ ^ »  » Œ0opp-1416000000WTfr ^ »  » Œ0opp-1608000000W_Ø" ^à˜à˜Œ0opp-1800000000WkIÒ ^��Œ0opp-1992000000Wv»‚ ^Œ0Œ0Œ0display-subsystem,rockchip,display-subsystem‰firmwarescmi ,arm,scmi-smc�‚š protocol@14ý Dopp-table-1,operating-points-v2DDopp-200000000W ëÂ^ –¨opp-300000000Wá£^ –¨opp-400000000Wׄ^ –¨opp-600000000W#ÃF^ –¨opp-700000000W)¹'^ » opp-800000000W/¯^B@hdmi-sound,simple-audio-card­HDMIÄi2sÝ÷okaysimple-audio-card,codecþsimple-audio-card,cpuþpmu,arm,cortex-a55-pmu0äåæç psci ,arm,psci-1.0smctimer,arm,armv8-timer0   &xin24m ,fixed-clock=n6Mxin24m Dxin32k ,fixed-clock=€Mxin32k` jdefault sram@10f000 ,mmio-sramýð xðsram@0,arm,scmi-shmemýDsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahciýü@›œ�satapmaliverxoob _‹ �sata-phyš¬ ÷disabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahciýü€ ¡¢satapmaliverxoob `‹ �sata-phyš¬÷okayusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3ýüÀ@ ©¦§¥ref_clksuspend_clkbus_clkºhost Âutmi_wide¬Ë”Ò÷okay ‹�usb2-phyusb3-phyusb@fd000000,rockchip,rk3568-dwc3snps,dwc3ýý@ ª©ª¨ref_clksuspend_clkbus_clkºhost ‹�usb2-phyusb3-phy Âutmi_wide¬Ë•Ò÷okayinterrupt-controller@fd400000 ,arm,gic-v3 ýý@ýF  ëýA(&Dusb@fd800000 ,generic-ehciýý€ ‚½¾¼‹�usb÷okayusb@fd840000 ,generic-ohciýý„ ƒ½¾¼‹�usb÷okayusb@fd880000 ,generic-ehciýýˆ …¿À¼‹�usb÷okayusb@fd8c0000 ,generic-ohciýýŒ †¿À¼‹�usb÷okaysyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfdýýÂD®io-domains&,rockchip,rk3568-pmu-io-voltage-domain÷okay5CQ_m{‰—¥syscon@fdc50000ýýÅ ,rockchip,rk3568-pipe-grfsysconD§syscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfdýýÆDsyscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconýýÈD¨syscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconýýÉDªsyscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconýýÊ€D«syscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconýýÊ€€D­clock-controller@fdd00000,rockchip,rk3568-pmucruýýР³Dclock-controller@fdd20000,rockchip,rk3568-cruýýÒxin24m ³ÀÐG†Œ ëÂåDi2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2cýýÔ .- i2cpclk`jdefault ÷okayregulator@1c ,tcs,tcs4525ýòvdd_cpu2D 5\Œ0tü‰ Dregulator-state-mem”pmic@20,rockchip,rk809ý !ÀH­– mclkHjdefault`"#Äåö    & 2 > J V bDÏregulatorsDCDC_REG1 vdd_logic2p » ‰D¡ \™ptqregulator-state-mem”DCDC_REG2vdd_gpup » ‰D¡ \™ptqDEregulator-state-mem”DCDC_REG3vcc_ddr2‰regulator-state-mem DCDC_REG4vdd_npup » ‰D¡ \™ptqregulator-state-mem”DCDC_REG5vcc_1v82Dw@\w@Dregulator-state-mem”LDO_REG1vdda0v9_imageD » \ » DRregulator-state-mem”LDO_REG2 vdda_0v92D » \ » regulator-state-mem”LDO_REG3 vdda0v9_pmu2D » \ » regulator-state-mem ¸ » LDO_REG4 vccio_acodec2D2Z \2Z Dregulator-state-mem”LDO_REG5 vccio_sdDw@\2Z Dregulator-state-mem”LDO_REG6 vcc3v3_pmu2D2Z \2Z Dregulator-state-mem ¸2Z LDO_REG7 vcca_1v82Dw@\w@Dšregulator-state-mem”LDO_REG8 vcca1v8_pmu2Dw@\w@regulator-state-mem ¸w@LDO_REG9vcca1v8_imageDw@\w@DSregulator-state-mem”SWITCH_REG1vcc_3v32Dregulator-state-mem”SWITCH_REG2 vcc3v3_sdD[regulator-state-mem”serial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uartýýÕ t ,baudclkapb_pclkÔ$$`%jdefaultÙæ ÷disabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwmýý× 0 pwmpclk`&jdefaultð ÷disabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwmýý× 0 pwmpclk`'jdefaultð ÷disabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwmýý×  0 pwmpclk`(jdefaultð ÷disabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwmýý×0 0 pwmpclk`)jdefaultð ÷disabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdýýÙpower-controller!,rockchip,rk3568-power-controllerû Dpower-domain@7ý*ûpower-domain@8ýÌÍ +,-ûpower-domain@9ý ÚÛÜ ./0ûpower-domain@10ý ñò123456ûpower-domain@11ý í7ûpower-domain@13ý 8ûpower-domain@14ý 9:;ûpower-domain@15ý <=>?@ABCûgpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrostýýæ@$()' jobmmugpugpubus%D¬÷okay&ED—video-codec@fdea0400,rockchip,rk3568-vpuýýê ‹vdpuîï aclkhclk2F¬ iommu@fdea0800,rockchip,rk3568-iommuýýê@ Š aclkifaceîï¬ 9DFvideo-codec@fdee0000,rockchip,rk3568-vepuýýî @ýþ aclkhclk2G¬ iommu@fdee0800,rockchip,rk3568-iommuýýî@ ?ýþ aclkiface¬ 9DGmmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcýþ@ d ÁÂŽ�biuciuciu-driveciu-sampleFQðÑ€Ëë_reset ÷disabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20aýþ macirqeth_wake_irq@†‰‰ÇÃĉÈWstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_refËì _stmmacethåkH{ŒIŸJ² ÷disabledmdio,snps,dwmac-mdio stmmac-axi-config»ÅÕDHrx-queues-configåDIqueue0tx-queues-configûDJqueue0vop@fe040000 ýþ0þ@vopgamma-lut ”(ÝÞßàá%aclkhclkdclk_vp0dclk_vp1dclk_vp22K¬ å÷okay,rockchip,rk3568-vopÀßà­ports Dport@0ý endpoint@2ýLDTport@1ý port@2ý iommu@fe043e00,rockchip,rk3568-iommu ýþ>þ? ”ÝÞ aclkiface9¬ ÷okayDKdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsiýþ D pclkhclkèÚ�dphy‹M¬ _apbËå ÷disabledports port@0ýport@1ýdsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsiýþ E pclkhclkéÚ�dphy‹N¬ _apbËå ÷disabledports port@0ýport@1ýhdmi@fe0a0000,rockchip,rk3568-dw-hdmiýþ  -(æç“(Úiahbisfrcecrefjdefault `OPQ¬ Ùåå÷okay+R;SDports port@0ýendpointTDLport@1ýendpointUDÉqos@fe128000,rockchip,rk3568-qossysconýþ€ D*qos@fe138080,rockchip,rk3568-qossysconýþ€€ D9qos@fe138100,rockchip,rk3568-qossysconýþ� D:qos@fe138180,rockchip,rk3568-qossysconýþ�€ D;qos@fe148000,rockchip,rk3568-qossysconýþ€ D+qos@fe148080,rockchip,rk3568-qossysconýþ€€ D,qos@fe148100,rockchip,rk3568-qossysconýþ� D-qos@fe150000,rockchip,rk3568-qossysconýþ D7qos@fe158000,rockchip,rk3568-qossysconýþ€ D1qos@fe158100,rockchip,rk3568-qossysconýþ� D2qos@fe158180,rockchip,rk3568-qossysconýþ�€ D3qos@fe158200,rockchip,rk3568-qossysconýþ‚ D4qos@fe158280,rockchip,rk3568-qossysconýþ‚€ D5qos@fe158300,rockchip,rk3568-qossysconýþƒ D6qos@fe180000,rockchip,rk3568-qossysconýþ qos@fe190000,rockchip,rk3568-qossysconýþ D<qos@fe190280,rockchip,rk3568-qossysconýþ€ D@qos@fe190300,rockchip,rk3568-qossysconýþ DAqos@fe190380,rockchip,rk3568-qossysconýþ€ DBqos@fe190400,rockchip,rk3568-qossysconýþ DCqos@fe198000,rockchip,rk3568-qossysconýþ€ D8qos@fe1a8000,rockchip,rk3568-qossysconýþ€ D.qos@fe1a8080,rockchip,rk3568-qossysconýþ€€ D/qos@fe1a8100,rockchip,rk3568-qossysconýþ� D0pcie@fe260000,rockchip,rk3568-pcie0ýÀ@þ&ôdbiapbconfig<KJIHGsyspmcmsglegacyerrK(�‚ƒ„…$aclk_mstaclk_slvaclk_dbipclkauxñpciU`hVVVVv‡–¥´¼‹ �pcie-phy¬Txôôô ô à@Ë¡_pipe  ÷disabledlegacy-interrupt-controllerë HDVmmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcýþ+@ b °±Š‹biuciuciu-driveciu-sampleFQðÑ€ËÔ_reset÷okayÆÐ á!êjdefault`WXYZõ[mmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcýþ,@ c ²³Œ�biuciuciu-driveciu-sampleFQðÑ€ËÖ_reset ÷disabledspi@fe300000 ,rockchip,sfcýþ0@ exvclk_sfchclk_sfc`\jdefault÷okay flash@0,jedec,spi-norýõá->partitions,fixed-partitions partition@0OSPLýpartition@e0000 OU-Boot Envýpartition@100000OU-Bootý partition@300000Osplashý0partition@400000 OFilesystemý@Àmmc@fe310000,rockchip,rk3568-dwcmshcýþ1 À{}Ð ëÂn6(|zy{}corebusaxiblocktimer÷okayÆQ ëÂUjdefault`]^_`ai2s@fe400000,rockchip,rk3568-i2s-tdmýþ@ 4À=AÐFÏqFÏq?C9mclk_txmclk_rxhclkÔbctxËPQ _tx-mrx-måå÷okayDi2s@fe410000,rockchip,rk3568-i2s-tdmýþA 5ÀEIÐFÏqFÏqGK:mclk_txmclk_rxhclkÔbbcrxtxËRS _tx-mrx-måjdefault0`cdefghijklmnå÷okaymDÎi2s@fe420000,rockchip,rk3568-i2s-tdmýþB 6ÀMÐFÏqOO;mclk_txmclk_rxhclkÔbbctxrxËT_måjdefault`opqrå ÷disabledi2s@fe430000,rockchip,rk3568-i2s-tdmýþC 7SW<mclk_txmclk_rxhclkÔbbctxrxËUV _tx-mrx-måå ÷disabledpdm@fe440000,rockchip,rk3568-pdmýþD LZYpdm_clkpdm_hclkÔb crx`stuvwxjdefaultËX_pdm-må ÷disabledspdif@fe460000,rockchip,rk3568-spdifýþF f mclkhclk_\Ôbctxjdefault`yå ÷disableddma-controller@fe530000,arm,pl330arm,primecellýþS@ ˆ  apb_pclkŸD$dma-controller@fe550000,arm,pl330arm,primecellýþU@ˆ  apb_pclkŸDbi2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþZ /HG i2cpclk`zjdefault  ÷disabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþ[ 0JI i2cpclk`{jdefault  ÷disabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþ\ 1LK i2cpclk`|jdefault  ÷disabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþ] 2NM i2cpclk`}jdefault  ÷disabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþ^ 3PO i2cpclk`~jdefault  ÷disabledwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdtýþ` • tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spiýþa gRQspiclkapb_pclkÔ$$ctxrxjdefault `€�  ÷disabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spiýþb hTSspiclkapb_pclkÔ$$ctxrxjdefault `‚ƒ„  ÷disabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spiýþc iVUspiclkapb_pclkÔ$$ctxrxjdefault `…†‡  ÷disabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spiýþd jXWspiclkapb_pclkÔ$$ctxrxjdefault `ˆ‰Š  ÷disabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uartýþe ubaudclkapb_pclkÔ$$`‹jdefaultÙæ ÷disabledserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartýþf v# baudclkapb_pclkÔ$$`ŒjdefaultÙæ÷okayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartýþg w'$baudclkapb_pclkÔ$$`�jdefaultÙæ ÷disabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uartýþh x+(baudclkapb_pclkÔ$$ `ŽjdefaultÙæ ÷disabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uartýþi y/,baudclkapb_pclkÔ$ $ `�jdefaultÙæ ÷disabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþj z30baudclkapb_pclkÔ$ $ `�jdefaultÙæ ÷disabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþk {74baudclkapb_pclkÔ$$`‘jdefaultÙæ ÷disabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþl |;8baudclkapb_pclkÔ$$`’jdefaultÙæ ÷disabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþm }?<baudclkapb_pclkÔ$$`“jdefaultÙæ ÷disabledthermal-zonescpu-thermalªdÀèΔtripscpu_alert0ÞpêÐøpassiveD•cpu_alert1Þ$øêÐøpassivecpu_critÞsêÐ øcriticalcooling-mapsmap0õ•0ú ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿgpu-thermalªÀèΔtripsgpu-thresholdÞpêÐøpassivegpu-targetÞ$øêÐøpassiveD–gpu-critÞsêÐ øcriticalcooling-mapsmap0õ– ú—ÿÿÿÿÿÿÿÿtsadc@fe710000,rockchip,rk3568-tsadcýþq sÀÐf@ ®`tsadcapb_pclkË�‚×å sjinitdefaultsleep`˜ ™ *˜ 4÷okay J aD”saradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcýþr ]saradcapb_pclkË€ _saradc-apb |÷okay Žšpwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþnZY pwmpclk`›jdefaultð ÷disabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþnZY pwmpclk`œjdefaultð ÷disabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþn ZY pwmpclk`�jdefaultð ÷disabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþn0ZY pwmpclk`žjdefaultð ÷disabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo]\ pwmpclk`Ÿjdefaultð ÷disabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo]\ pwmpclk` jdefaultð ÷disabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo ]\ pwmpclk`¡jdefaultð ÷disabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo0]\ pwmpclk`¢jdefaultð ÷disabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp`_ pwmpclk`£jdefaultð ÷disabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp`_ pwmpclk`¤jdefaultð ÷disabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp `_ pwmpclk`¥jdefaultð ÷disabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp0`_ pwmpclk`¦jdefaultð ÷disabledphy@fe830000,rockchip,rk3568-naneng-combphyýþƒ"} refapbpipeÀ"ÐõáËÇ š§ ¬¨ Â÷okay Í©Dphy@fe840000,rockchip,rk3568-naneng-combphyýþ„%~ refapbpipeÀ%ÐõáËÉ š§ ¬ª Â÷okayDphy@fe870000,rockchip,rk3568-csi-dphyýþ‡ypclk Â˺_apbå ÷disabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphyýþ… refpclkz ¬ _apbË» ÷disabledDMmipi-dphy@fe860000,rockchip,rk3568-dsi-dphyýþ† refpclk{ ¬ _apb˼ ÷disabledDNusb2phy@fe8a0000,rockchip,rk3568-usb2phyýþŠphyclkMclk_usbphy0_480m ‡ Ø« ÷okayhost-port Â÷okay ͬDotg-port Â÷okay Í©Dusb2phy@fe8b0000,rockchip,rk3568-usb2phyýþ‹phyclkMclk_usbphy1_480m ˆ Ø­ ÷okayhost-port Â÷okay ͬDotg-port Â÷okay ͬDpinctrl,rockchip,rk3568-pinctrlå è® xgpio@fdd60000,rockchip,gpio-bankýýÖ !.  õ ëD!gpio@fe740000,rockchip,gpio-bankýþt "cd õ ëgpio@fe750000,rockchip,gpio-bankýþu #ef õ ëD¼gpio@fe760000,rockchip,gpio-bankýþv $gh õ ëDÇgpio@fe770000,rockchip,gpio-bankýþw %ij õ ëDÐpcfg-pull-up D±pcfg-pull-none D¯pcfg-pull-none-drv-level-1  +D³pcfg-pull-none-drv-level-2  +D²pcfg-pull-none-drv-level-3  +D¶pcfg-pull-up-drv-level-1  +Dµpcfg-pull-up-drv-level-2  +D°pcfg-pull-none-smt  :D´acodecaudiopwmbt656bt1120camcan0can1can2cifclk32kclk32k-out0 O¯D cpuebcedpdpemmcemmc-rstnout O¯Daemmc-bus8€ O ° °°°°°°°D]emmc-clk O°D^emmc-cmd O°D_emmc-datastrobe O¯D`eth0eth1flashfspifspi-dual-io-pins@ O¯¯¯¯D\gmac0gmac0-miim O¯¯DÂgmac0-rx-bus20 O¯¯¯DÄgmac0-tx-bus20 O ² ² ¯DÃgmac0-rgmii-clk O¯³DÅgmac0-rgmii-bus@ O¯¯²²DÆgmac1gpuhdmitxhdmitxm0-cec O¯DQhdmitx-scl O¯DOhdmitx-sda O¯DPi2c0i2c0-xfer O ´ ´Di2c1i2c1-xfer O ´ ´Dzi2c2i2c2m0-xfer O ´´D{i2c3i2c3m0-xfer O´´D|i2c4i2c4m0-xfer O ´ ´D}i2c5i2c5m0-xfer O ´ ´D~i2s1i2s1m0-lrckrx O¯Dfi2s1m0-lrcktx O¯Dei2s1m0-mclk O¯D#i2s1m0-sclkrx O¯Ddi2s1m0-sclktx O¯Dci2s1m0-sdi0 O ¯Dgi2s1m0-sdi1 O ¯Dhi2s1m0-sdi2 O ¯Dii2s1m0-sdi3 O¯Dji2s1m0-sdo0 O¯Dki2s1m0-sdo1 O¯Dli2s1m0-sdo2 O ¯Dmi2s1m0-sdo3 O ¯Dni2s2i2s2m0-lrcktx O¯Dpi2s2m0-sclktx O¯Doi2s2m0-sdi O¯Dqi2s2m0-sdo O¯Dri2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk O¯Dspdmm0-clk1 O¯Dtpdmm0-sdi0 O ¯Dupdmm0-sdi1 O ¯Dvpdmm0-sdi2 O ¯Dwpdmm0-sdi3 O¯Dxpmicpmic-int-l O±D"pmupwm0pwm0m0-pins O¯D&pwm1pwm1m0-pins O¯D'pwm2pwm2m0-pins O¯D(pwm3pwm3-pins O¯D)pwm4pwm4-pins O¯D›pwm5pwm5-pins O¯Dœpwm6pwm6-pins O¯D�pwm7pwm7-pins O¯Džpwm8pwm8m0-pins O ¯DŸpwm9pwm9m0-pins O ¯D pwm10pwm10m0-pins O ¯D¡pwm11pwm11m0-pins O¯D¢pwm12pwm12m0-pins O¯D£pwm13pwm13m0-pins O¯D¤pwm14pwm14m0-pins O¯D¥pwm15pwm15m0-pins O¯D¦refclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ O°°°°DWsdmmc0-clk O°DXsdmmc0-cmd O°DYsdmmc0-det O±DZsdmmc1sdmmc2spdifspdifm0-tx O¯Dyspi0spi0m0-pins0 O ¯¯¯D�spi0m0-cs0 O¯Dspi0m0-cs1 O¯D€spi1spi1m0-pins0 O ¯¯¯D„spi1m0-cs0 O¯D‚spi1m0-cs1 O¯Dƒspi2spi2m0-pins0 O¯¯¯D‡spi2m0-cs0 O¯D…spi2m0-cs1 O¯D†spi3spi3m0-pins0 O ¯¯ ¯DŠspi3m0-cs0 O¯Dˆspi3m0-cs1 O¯D‰tsadctsadc-shutorg O¯D™tsadc-pin O¯D˜uart0uart0-xfer O±±D%uart1uart1m0-xfer O ± ±D‹uart2uart2m0-xfer O±±DŒuart3uart3m0-xfer O±±D�uart4uart4m0-xfer O±±DŽuart5uart5m0-xfer O±±D�uart6uart6m0-xfer O±±D�uart7uart7m0-xfer O±±D‘uart8uart8m0-xfer O±±D’uart9uart9m0-xfer O±±D“vopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2ir-receiverir-receiver-pin O¯DÊledsled-power-pin O¯DËled-work-pin O¯DÌpciepcie-reset-pin O¯D»vcc3v3-pcie-en-pin O¯DÑrk809hp-det-pin O¯DÍusbvcc5v0-usb-host-en-pin O¯DÓvcc5v0-usb-dr-en-pin O¯DÕsata@fc000000',rockchip,rk3568-dwc-ahcisnps,dwc-ahciýü–—˜satapmaliverxoob ^‹ �sata-phyš¬ ÷disabledsyscon@fdc70000$,rockchip,rk3568-pipe-phy-grfsysconýýÇDÈqos@fe190080,rockchip,rk3568-qossysconýþ€ D=qos@fe190100,rockchip,rk3568-qossysconýþ D>qos@fe190200,rockchip,rk3568-qossysconýþ D?syscon@fdcb8000%,rockchip,rk3568-pcie3-phy-grfsysconýýË€D·phy@fe8c0000,rockchip,rk3568-pcie3-phyýþŒ Â&'wrefclk_mrefclk_npclk˾_phy ]·÷okayD¹pcie@fe270000,rockchip,rk3568-pcie K(ˆ‰Š‹Œ$aclk_mstaclk_slvaclk_dbipclkauxñpci< Ÿž�œsyspmcmsglegacyerrU`h¸¸¸¸v‡–¥´¼‹¹ �pcie-phy¬0ýÀ@@þ'òTxòòò ò à@@@dbiapbconfig˱_pipe ÷disabledlegacy-interrupt-controllerë �D¸pcie@fe280000,rockchip,rk3568-pcie K(��‘’“$aclk_mstaclk_slvaclk_dbipclkauxñpci<¥¤£¢¡syspmcmsglegacyerrU`hººººv‡–¥´ ¼‹¹ �pcie-phy¬0ýÀ€@þ(ðTxððð ð à€€@dbiapbconfigËÁ_pipe÷okayjdefault`» n¼ z½legacy-interrupt-controllerë ¢Dºethernet@fe2a0000&,rockchip,rk3568-gmacsnps,dwmac-4.20aýþ*macirqeth_wake_irq@‚……¸´µ…¹Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_refË× _stmmacethåk¾{Œ¿ŸÀ²÷okayÀ…‚­ƒÐsY@ Šoutput —Á ¢rgmii Í jdefault`ÂÃÄÅÆ «O ´-mdio,snps,dwmac-mdio ethernet-phy@0,ethernet-phy-ieee802.3-c22ý ½N  ͆  nÇDÁstmmac-axi-config»ÅÕD¾rx-queues-configåD¿queue0tx-queues-configûDÀqueue0phy@fe820000,rockchip,rk3568-naneng-combphyýþ‚| refapbpipeÀÐõáËÅ š§ ¬È Â÷okay ͬDchosen ßserial2:1500000n8dc-12v-regulator,regulator-fixeddc_12v2D·\·DÒhdmi-con,hdmi-connectorøaportendpointÉDUir-receiver,gpio-ir-receiver ä!jdefault`Êleds ,gpio-ledsled-0 ä! ëpower ô úkeep default-onjdefault`Ëled-1 ä! ëheartbeat ô heartbeatjdefault`Ìrk809-sound,simple-audio-cardjdefault`Í ­Analog RK817Äi2s !Ý%