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pwmpclkžÆ¨default— 6disabledpwm@febd0030(rockchip,rk3588-pwmrockchip,rk3328-pwm þ½00LK pwmpclkžÇ¨default— 6disabledpwm@febe0000(rockchip,rk3588-pwmrockchip,rk3328-pwm þ¾0ON pwmpclkžÈ¨default—6okaypwm@febe0010(rockchip,rk3588-pwmrockchip,rk3328-pwm þ¾0ON pwmpclkžÉ¨default—6okaypwm@febe0020(rockchip,rk3588-pwmrockchip,rk3328-pwm þ¾ 0ON pwmpclkžÊ¨default— 6disabledpwm@febe0030(rockchip,rk3588-pwmrockchip,rk3328-pwm þ¾00ON pwmpclkžË¨default— 6disabledpwm@febf0000(rockchip,rk3588-pwmrockchip,rk3328-pwm þ¿0RQ pwmpclkžÌ¨default— 6disabledpwm@febf0010(rockchip,rk3588-pwmrockchip,rk3328-pwm þ¿0RQ pwmpclkžÍ¨default— 6disabledpwm@febf0020(rockchip,rk3588-pwmrockchip,rk3328-pwm þ¿ 0RQ pwmpclkžÎ¨default—6okaypwm@febf0030(rockchip,rk3588-pwmrockchip,rk3328-pwm þ¿00RQ pwmpclkžÏ¨default— 6disabledthermal-zonespackage-thermal C Y gÐtripspackage-crit wÁ8 ƒ criticalbigcore0-thermal Cd Y gÐtripsbigcore0-alert wL ƒÐpassiveÑbigcore0-crit wÁ8 ƒ criticalcooling-mapsmap0 ŽÑ “ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿbigcore2-thermal Cd Y gÐtripsbigcore2-alert wL ƒÐpassiveÒbigcore2-crit wÁ8 ƒ criticalcooling-mapsmap0 ŽÒ “ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿlittlecore-thermal Cd Y gÐtripslittlecore-alert wL ƒÐpassiveÓlittlecore-crit wÁ8 ƒ criticalcooling-mapsmap0 ŽÓ0 “ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿcenter-thermal C Y gÐtripscenter-crit wÁ8 ƒ criticalgpu-thermal Cd Y gÐtripsgpu-alert wL ƒÐpassiveÔgpu-crit wÁ8 ƒ criticalcooling-mapsmap0 ŽÔ “Õÿÿÿÿÿÿÿÿnpu-thermal C Y gÐtripsnpu-crit wÁ8 ƒ criticaltsadc@fec00000rockchip,rk3588-tsadc þÀ×�0ž�tsadcapb_pclk7žG„€uVWotsadc-apbtsadc ¢ÔÀ ¹ ÐžÖ ëרdefaultsleep õ6okayÐadc@fec10000rockchip,rk3588-saradc þÁ׎ 0‘�saradcapb_pclkuU osaradc-apb6okay Øi2c@fec80000(rockchip,rk3588-i2crockchip,rk3399-i2c þÈ0ˆ€ i2cpclk×CžÙ¨default+6okayâ @rtc@51haoyu,hym8563 Q½òhym8563 ±×¨defaultžÚ )typec-portc@22 fcs,fusb302 " ±×¨defaultžÛ 7+connectorusb-c-connector Cdual MUSB-C Ssource ^�È jsource 7+ports+port@0 endpoint8Üéport@1 endpoint8Ý%port@2 endpoint8Þêi2c@fec90000(rockchip,rk3588-i2crockchip,rk3399-i2c þÉ0‰� i2cpclk×Džß¨default+6okayâ @audio-codec@1brealtek,rt5616 71G»€01mclki2c@feca0000(rockchip,rk3588-i2crockchip,rk3399-i2c þÊ0Š‚ i2cpclk×Ežà¨default+6okayspi@fecb0000(rockchip,rk3588-spirockchip,rk3066-spi þË×J0›–spiclkapb_pclkqp pvtxrxßžáâ¨default+ 6disabledefuse@fecc0000rockchip,rk3588-otp þÌ 0Œ‹��otpapb_pclkphyarbu§¦¨ ootpapbarb+cpu-code@2 id@7 cpu-leakage@17 cpu-leakage@18 cpu-leakage@19 log-leakage@1a gpu-leakage@1b cpu-version@1c  ynpu-leakage@28 (codec-leakage@29 )dma-controller@fed10000arm,pl330arm,primecell þÑ@ ×Z[½0p apb_pclkÔpphy@fed60000rockchip,rk3588-hdptx-phy þÖ 0 Trefapb{8u#cde!""ophyapbinitcmnlaneroplllcpll‘ã 6disabledphy@fed80000rockchip,rk3588-usbdp-phy þØ{0¡lVärefclkimmortalpclkutmi(u   oinitcmnlanepcs_apbpma_apb ~å ‘æ ¢ç ¸è6okay È Ô çv õv$port+endpoint@0 8éÜendpoint@1 8êÞphy@fee00000rockchip,rk3588-naneng-combphy þà0¨vW refapbpipe7¨Gõá{u<Cophyapb . ë6okayyphy@fee20000rockchip,rk3588-naneng-combphy þâ0ªxW refapbpipe7ªGõá{u>Eophyapb . ì6okay*sram@ff001000 mmio-sram ÿðÿð+pinctrlrockchip,rk3588-pinctrl‘í+îgpio@fd8a0000rockchip,gpio-bank ýŠ×0qr É +î ¯ Ù/µ 7MicroSD detect [SDMMC_DET_L]Pin 10 [UART0_RX_M0]Pin 08 [UART0_TX_M0/PWM4_M0]Pin 32 [PWM5_M1]USB3 Type-C [CC_INT_L]IR receiver [PWM3_IR_M0]User Button±gpio@fec20000rockchip,gpio-bank þÂ×0st É +î ¯ Ù/­ 7Pin 27 [UART6_RX_M1]Pin 28 [UART6_TX_M1]USB2 Type-A [USB2_PWREN]Pin 15Pin 26Pin 21 [SPI0_MISO_M2]Pin 19 [SPI0_MOSI_M2/UART4_RX_M2]Pin 23 [SPI0_CLK_M2/UART4_TX_M2]Pin 24 [SPI0_CS0_M2/UART7_RX_M2]Pin 22 [SPI0_CS1_M0/UART7_TX_M2]CSI-Pin 14 [MIPI_CAM2_CLKOUT]Headphone detect [HP_DET_L]USB3 Type-C [TYPEC5V_PWREN_H]5V Fan [PWM1_M1]HDMI-in detect [HDMIIRX_DET_L]Pin 05 [I2C8_SCL_M2]Pin 03 [I2C8_SDA_M2]gpio@fec30000rockchip,gpio-bank þÃ×0uv É +î@ ¯ Ù/ù 7SPI NOR Flash [FSPI_D0_M1]SPI NOR Flash [FSPI_D1_M1]SPI NOR Flash [FSPI_D2_M1]SPI NOR Flash [FSPI_D3_M1]SPI NOR Flash [FSPI_CLK_M1]SPI NOR Flash [FSPI_CSN0_M1]CSI-Pin 11 [MIPI_CAM2_RESET_L]CSI-Pin 12 [MIPI_CAM2_PDN_L] gpio@fec40000rockchip,gpio-bank þÄ×0wx É +î` ¯ Ù/å 7Pin 35 [SPI4_MISO_M1/PWM10_M0]Pin 38 [SPI4_MOSI_M1]Pin 40 [SPI4_CLK_M1/UART8_TX_M1]Pin 36 [SPI4_CS0_M1/UART8_RX_M1]Pin 37 [SPI4_CS1_M1]USB3-A #2 [USB3_2_PWREN]DSI-Pin 12 [LCD_RST]Buzzer [PWM8_M0]Pin 33 [PWM9_M0]DSI-Pin 10 [PWM2_M1/LCD_BL]Pin 07Pin 16Pin 18Pin 29 [UART3_TX_M1/PWM12_M0]Pin 31 [UART3_RX_M1/PWM13_M0]Pin 12DSI-Pin 08 [TP_INT_L]DSI-Pin 14 [TP_RST_L]Pin 11 [PWM14_M0]Pin 13 [PWM15_IR_M0]DSI-Pin 06 [I2C5_SCL_M0_TP]DSI-Pin 05 [I2C5_SDA_M0_TP]gpio@fec50000rockchip,gpio-bank þÅ×0yz É +î€ ¯ Ù/Ô 7M.2 M-Key Slot4 [M2_D_PERST_L]USB3-A #1 [USB3_TYPEC1_PWREN]M.2 M-Key Slot3 [M2_C_PERST_L]M.2 M-Key Slot2 [M2_B_PERST_L]M.2 M-Key Slot1 [M2_A_CLKREQ_L]M.2 M-Key Slot1 [M2_A_PERST_L]vpcfg-pull-up Gópcfg-pull-down Tñpcfg-pull-none cïpcfg-pull-none-drv-level-2 c põpcfg-pull-up-drv-level-1 G pôpcfg-pull-up-drv-level-2 G pðpcfg-pull-none-smt c òauddsmbt1120can0can1can2cifclk32kcpuddrphych0ddrphych1ddrphych2ddrphych3dp0dp1emmcemmc-rstnout ”ï†emmc-bus8€ ”ðððððððð‡emmc-clk ”ðˆemmc-cmd ”ð‰emmc-data-strobe ”ñŠeth1fspigmac1gpuhdmii2c0i2c0m2-xfer ”òò/i2c1i2c1m0-xfer ” ò ò¥i2c2i2c2m0-xfer ” ò ò¦i2c3i2c3m0-xfer ” ò ò§i2c4i2c4m0-xfer ” ò ò¨i2c5i2c5m0-xfer ” ò ò©i2c6i2c6m0-xfer ” ò òÙi2c7i2c7m0-xfer ” ò òßi2c8i2c8m2-xfer ” ò òài2s0i2s0-lrck ”ï�i2s0-mclk ”ïŽi2s0-sclk ”ï�i2s0-sdi0 ”ï�i2s0-sdo0 ”ï‘i2s1i2s1m0-lrck ”ï’i2s1m0-sclk ”ï“i2s1m0-sdi0 ”ï”i2s1m0-sdi1 ”ï•i2s1m0-sdi2 ”ï–i2s1m0-sdi3 ”ï—i2s1m0-sdo0 ” ï˜i2s1m0-sdo1 ” ï™i2s1m0-sdo2 ” ïši2s1m0-sdo3 ” ï›i2s2i2s2m1-lrck ”ï�i2s2m1-sclk ” ïži2s2m1-sdi ” ïŸi2s2m1-sdo ” ï i2s3i2s3-lrck ”ï¡i2s3-sclk ”ï¢i2s3-sdi ”ï£i2s3-sdo ”ï¤jtaglitcpumcumipinpupcie20x1pcie30phypcie30x1pcie30x2pcie30x4pdm0pdm1pmicpmic-pinsp ”óïïïïïï²pmupwm0pwm0m0-pins ”ï3pwm1pwm1m1-pins ” ï4pwm2pwm2m1-pins ” ï5pwm3pwm3m0-pins ”ï6pwm4pwm4m1-pins ” ïÄpwm5pwm5m1-pins ” ïÅpwm6pwm6m0-pins ” ïÆpwm7pwm7m0-pins ” ïÇpwm8pwm8m0-pins ” ïÈpwm9pwm9m0-pins ” ïÉpwm10pwm10m0-pins ” ïÊpwm11pwm11m0-pins ” ïËpwm12pwm12m0-pins ” ïÌpwm13pwm13m0-pins ” ïÍpwm14pwm14m0-pins ” ïÎpwm15pwm15m0-pins ” ïÏrefclksatasata0sata1sata2sdiosdiom1-pins` ”ïóóóóó…sdmmcsdmmc-bus4@ ”ðððð‚sdmmc-clk ”ðsdmmc-cmd ”ð€sdmmc-det ”ó�sd-s0-pwr ”óspdif0spdif1spi0spi0m2-pins0 ” ô ô ô«spi0m2-cs0 ” ôªspi1spi1m1-pins0 ”ôôô®spi1m1-cs0 ”ô¬spi1m1-cs1 ”ô­spi2spi2m2-pins0 ”ô ôô°spi2m2-cs0 ” ô¯spi3spi3m1-pins0 ”ô ôôºspi3m1-cs0 ”ô¸spi3m1-cs1 ”ô¹spi4spi4m1-pins0 ”ôôôâspi4m1-cs0 ”ôátsadctsadc-shut-org ”ïÖuart0uart0m0-xfer ”óó2uart1uart1m1-xfer ” ó ó»uart2uart2m0-xfer ” ó ó¼uart3uart3m1-xfer ” ó ó½uart4uart4m2-xfer ” ó ó¾uart5uart5m1-xfer ” ó ó¿uart6uart6m1-xfer ” ó óÀuart7uart7m2-xfer ” ó óÁuart8uart8m1-xfer ” ó óÂuart9uart9m1-xfer ” ó óÃvopbt656gpio-functsadc-gpio-func ”ï×eth0gmac0gpio-ledsled-sys-pin ”ï led-usr-pin ”ïhym8563rtc-int ”óÚpciepcie2-2-rst ”ïzpcie2-0-rst ” ïpcie2-1-rst ”ïupcie3x2-rst ” ïþpcie3x4-rst ”ïûaudioheadphone-detect ”ïgpio-keykey1-pin ”óusbvcc-5v0-host20-en ”ïvcc-5v0-host30p1-en ”ïvcc-5v0-host30p2-en ”ïusb-typecusbc0-int ”óÛtypec-5v-pwr-en ”ïusb@fc400000rockchip,rk3588-dwc3snps,dwc3 ü@@×Ý0—–•ref_clksuspend_clkbus_clkUhost ]ö÷busb2-phyusb3-phy lutmi_wide( uS|Äå6okaysyscon@fd5b8000%rockchip,rk3588-pcie3-phy-grfsyscon ý[€ syscon@fd5c0000$rockchip,rk3588-pipe-phy-grfsyscon ý\ syscon@fd5cc000$rockchip,rk3588-usbdpphy-grfsyscon ý\À@ syscon@fd5d4000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd ý]@@+usb2phy@4000rockchip,rk3588-usb2phy @½0 phyclk òusb480m_phy1׊unophyapb6okayotg-port{6okay†øöi2s@fddc8000rockchip,rk3588-i2s-tdm ýÜ€×¼0ññîmclk_txmclk_rxhclk7ïýqpvtx( uºotx-m 6disabledi2s@fddf4000rockchip,rk3588-i2s-tdm ýß@׺099?mclk_txmclk_rxhclk76ýqpvtx( uÚotx-m6okayi2s@fddf8000rockchip,rk3588-i2s-tdm ý߀×»0++'mclk_txmclk_rxhclk7(ýqpvrx( uÇorx-m6okayi2s@fde00000rockchip,rk3588-i2s-tdm ýà×¾0&&"mclk_txmclk_rxhclk7#ýqpvrx( uîorx-m 6disabledpcie@fe150000*rockchip,rk3588-pcierockchip,rk3568-pcie+%00@E;JOt)aclk_mstaclk_slvaclk_dbipclkauxpipeÿpciP×syspmcmsglegacyerr/@`Sùùùùar�ú‰]t bpcie-phy( "Tððð ð à@ @0 @@þðÄdbiapbconfigu&+ opwrpipe6okay¨defaultžû “vŸülegacy-interrupt-controller¯/ ×ùpcie-ep@fe150000rockchip,rk3588-pcie-epP @ @þ @ @0Ädbidbi2apbaddr_spaceatu00@E;JOt)aclk_mstaclk_slvaclk_dbipclkauxpipe�× +syspmcmsglegacyerrdma0dma1dma2dma3r‰]t bpcie-phy( "u&+ opwrpipe 6disabledpcie@fe160000*rockchip,rk3588-pcierockchip,rk3568-pcie+%00AF<KPu)aclk_mstaclk_slvaclk_dbipclkauxpipeÿpciP×ÿþsyspmcmsglegacyerr/@`Sýýýýar�ú‰]t bpcie-phy( "Tñññ ñ à@ @@0 @@@þñÄdbiapbconfigu', opwrpipe6okay¨defaultžþ “v Ÿÿlegacy-interrupt-controller¯/ ×ÿýpcie@fe170000*rockchip,rk3588-pcierockchip,rk3568-pcie% /00BG=LQ¯)aclk_mstaclk_slvaclk_dbipclkauxpipeÿpciP×óòñðïsyspmcmsglegacyerr/@`Sar� s ‰]t bpcie-phy( "Tòòò ò à@ €@0 @€@þòÄdbiapbconfigu(- opwrpipe+6okay¨defaultž “v Ÿlegacy-interrupt-controller¯/ ×ðethernet@fe1b0000&rockchip,rk3588-gmacsnps,dwmac-4.20a þ ×ãâmacirqeth_wake_irq(067X]40stmmacethclk_mac_refpclk_macaclk_macptp_ref( !u# ostmmaceth‘lÄ.Õåö  6disabledmdiosnps,dwmac-mdio+stmmac-axi-config%/?rx-queues-configOqueue0queue1tx-queues-configequeue0queue1sata@fe220000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci þ"×(0c`fUpsatapmaliverxoobrefasic{+ 6disabledsata-port@0 �@] bsata-phyš © phy@fed90000rockchip,rk3588-usbdp-phy þÙ{0¡mWrefclkimmortalpclkutmi(uoinitcmnlanepcs_apbpma_apb ~ ‘æ ¢  ¸è6okay÷phy@fee10000rockchip,rk3588-naneng-combphy þá0©wW refapbpipe7©Gõá{u=Dophyapb .  6okayphy@fee80000rockchip,rk3588-pcie3-phy þè{0ypclkuHophy . ¢ 6okay ³topp-table-cluster0operating-points-v2 ¾ opp-1008000000 É<Ü Ð L¸ L¸~ð Þœ@opp-1200000000 ÉG†Œ Ð ß4 ß4~ð Þœ@opp-1416000000 ÉTfr Ð ¢„ ¢„~ð Þœ@ ïopp-1608000000 É_Ø" Ð øP øP~ð Þœ@opp-1800000000 ÉkIÒ Ð~ð~ð~ð Þœ@opp-table-cluster1operating-points-v2 ¾opp-1200000000 ÉG†Œ Ð L¸ L¸B@ Þœ@opp-1416000000 ÉTfr Ð  B@ Þœ@opp-1608000000 É_Ø" Ð ¢„ ¢„B@ Þœ@opp-1800000000 ÉkIÒ Ð øP øPB@ Þœ@opp-2016000000 Éx)¸ ÐHHB@ Þœ@opp-2208000000 Ƀ›h ÐllB@ Þœ@opp-2400000000 É�  ÐB@B@B@ Þœ@opp-table-cluster2operating-points-v2 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õHeadphonesHPOLHeadphonesHPORMIC1Microphone JackMicrophone Jackmicbias10HeadphoneHeadphonesMicrophoneMicrophone Jacksimple-audio-card,cpu)simple-audio-card,codec)pwm-beeper pwm-beeper3>ôH¡ pwm-fanpwm-fanïM2Px Ü\HÃPgpio-keys gpio-keys¨defaultžbutton-userg2 ™± MUser Button h )ir-receivergpio-ir-receiver ™±regulator-vcc-12v-dcinregulator-fixed Óvcc_12v_dcinâö· ·regulator-vcc-3v3-m2-aregulator-fixed Óvcc_3v3_m2_aâö2Z  2Z Müregulator-vcc-3v3-m2-bregulator-fixed Óvcc_3v3_m2_bâö2Z  2Z Mregulator-vcc-3v3-m2-cregulator-fixed Óvcc_3v3_m2_câö2Z  2Z Mÿregulator-vcc-3v3-m2-dregulator-fixed Óvcc_3v3_m2_dâö2Z  2Z Mwregulator-vcc-5v0-sysregulator-fixed Óvcc_5v0_sysâöLK@ LK@Mregulator-vcc-5v0-host-20regulator-fixedy ™¨defaultžÓvcc_5v0_host_20LK@ LK@M,regulator-vcc-5v0-host-30-p1regulator-fixedy ™v¨defaultžÓvcc_5v0_host_30_p1LK@ LK@Møregulator-vcc-5v0-host-30-p2regulator-fixedy ™¨defaultžÓvcc_5v0_host_30_p2LK@ LK@M-regulator-vbus-5v0-typecregulator-fixedy ™¨defaultžÓvbus_5v0_typecLK@ LK@M+ compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3spi4mmc0mmc1cpudevice_typeregenable-methodcapacity-dmips-mhzclocksassigned-clocksassigned-clock-ratescpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachedynamic-power-coefficient#cooling-cellsoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedportsarm,smc-idshmem#clock-cells#reset-cellsinterruptsclock-frequencyclock-output-namesinterrupt-namesrangesclock-namespower-domainsstatusmali-supplysram-supplydr_modephysphy-namesphy_typeresetssnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,dis-u2-freeclk-exists-quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirkusb-role-switchremote-endpointsnps,dis_rxdet_inp3_quirk#iommu-cellsreset-names#phy-cellsphy-supplyrockchip,grfpinctrl-0pinctrl-namesfcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspenddmasdma-namesreg-shiftreg-io-width#pwm-cells#power-domain-cellspm_qosiommusreg-namesrockchip,vop-grfrockchip,vo1-grfrockchip,pmuassigned-clock-parents#sound-dai-cellsbus-range#interrupt-cellsinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapnum-lanesreset-gpiosvpcie3v3-supplyinterrupt-controllerrockchip,php-grfsnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,wr_osr_lmtsnps,rd_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useports-implementedhba-port-capsnps,rx-ts-maxsnps,tx-ts-maxfifo-depthmax-frequencybus-widthcap-sd-highspeeddisable-wpno-mmcno-sdiosd-uhs-sdr104vmmc-supplyvqmmc-supplymmc-hs400-1_8vmmc-hs400-enhanced-strobeno-sdnon-removablerockchip,trcm-sync-tx-onlymbi-aliasmbi-rangesmsi-controller#msi-cellsaffinityarm,pl330-periph-burst#dma-cellsnum-csspi-max-frequencysystem-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvcc13-supplyvcc14-supplyvcca-supplygpio-controller#gpio-cellspinsfunctionregulator-enable-ramp-delayregulator-suspend-microvoltregulator-on-in-suspendpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polaritypinctrl-1#thermal-sensor-cells#io-channel-cellsvref-supplywakeup-sourcevbus-supplydata-rolelabelpower-rolesource-pdostry-power-rolebitsrockchip,u2phy-grfrockchip,usb-grfrockchip,usbdpphy-grfrockchip,vo-grfmode-switchorientation-switchsbu1-dc-gpiossbu2-dc-gpiosrockchip,pipe-grfrockchip,pipe-phy-grfgpio-rangesgpio-line-namesbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsrockchip,phy-grfdata-lanesopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendstdout-pathcolorlinux,default-triggerio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallinux,codepress-threshold-microvoltsimple-audio-card,formatsimple-audio-card,hp-det-gpiosimple-audio-card,mclk-fssimple-audio-card,namesimple-audio-card,routingsimple-audio-card,widgetssound-daiamp-supplybeeper-hzpwmscooling-levelsfan-supplydebounce-intervalenable-active-high