P8B<(B(xunlong,orangepi-5-plusrockchip,rk3588 +7Xunlong Orange Pi 5 Plusaliases=/pinctrl/gpio@fd8a0000C/pinctrl/gpio@fec20000I/pinctrl/gpio@fec30000O/pinctrl/gpio@fec40000U/pinctrl/gpio@fec50000[/i2c@fd880000`/i2c@fea90000e/i2c@feaa0000j/i2c@feab0000o/i2c@feac0000t/i2c@fead0000y/i2c@fec80000~/i2c@fec90000/i2c@feca0000/serial@fd890000/serial@feb40000/serial@feb50000/serial@feb60000/serial@feb70000/serial@feb80000/serial@feb90000/serial@feba0000/serial@febb0000/serial@febc0000/spi@feb00000/spi@feb10000/spi@feb20000/spi@feb30000/spi@fecb0000/mmc@fe2e0000/mmc@fe2c0000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cluster2core0core1 cpu@0cpuarm,cortex-a55 psci0 7 G0,\ ly@@  cpu@100cpuarm,cortex-a55 psci0 \ ly@@ cpu@200cpuarm,cortex-a55 psci0 \ ly@@ cpu@300cpuarm,cortex-a55 psci0 \ ly@@ cpu@400cpuarm,cortex-a76 psci0 7 G0,\ ly@@cpu@500cpuarm,cortex-a76 psci0 \ ly@@cpu@600cpuarm,cortex-a76 psci0 7 G0,\ ly@@cpu@700cpuarm,cortex-a76 psci0 \ ly@@ idle-states%pscicpu-sleeparm,idle-state2CZdkx{ l2-cache-l0cachen{@ l2-cache-l1cachen{@l2-cache-l2cachen{@l2-cache-l3cachen{@l2-cache-b0cachen{@l2-cache-b1cachen{@l2-cache-b2cachen{@l2-cache-b3cachen{@l3-cachecachen0{@display-subsystemrockchip,display-subsystemfirmwareopteelinaro,optee-tzsmcscmi arm,scmi-smc+protocol@14  protocol@16 pmu-a55arm,cortex-a55-pmupmu-a76arm,cortex-a76-pmupsci arm,psci-1.0smcclock-0 fixed-clock)׫splltimerarm,armv8-timerP    %sec-physphysvirthyp-physhyp-virtclock-1 fixed-clockn6xin24mclock-2 fixed-clockxin32ksram@10f000 mmio-sram +sram@0arm,scmi-shmem gpu@fb000000*rockchip,rk3588-maliarm,mali-valhall-csf 7 G 0corecoregroupstacks 0\]^ jobmmugpu(  6disabled!usb@fc000000rockchip,rk3588-dwc3snps,dwc3 @0ref_clksuspend_clkbus_clk=otg E"#Jusb2-phyusb3-phy Tutmi_wide( ]Rd| 6disabledusb@fc800000"rockchip,rk3588-ehcigeneric-ehci 0$E%Jusb( 6okayusb@fc840000"rockchip,rk3588-ohcigeneric-ohci 0$E%Jusb( 6okayusb@fc880000"rockchip,rk3588-ehcigeneric-ehci 0&E'Jusb( 6okayusb@fc8c0000"rockchip,rk3588-ohcigeneric-ohci 0&E'Jusb( 6okayusb@fcd00000rockchip,rk3588-dwc3snps,dwc3 @(0jihkr&ref_clksuspend_clkbus_clkutmipipe=hostE( Jusb3-phy Tutmi_wide]4d 6disablediommu@fc900000 arm,smmu-v3 @qsvoeventqgerrorpriqcmdq-sync* 6disablediommu@fcb00000 arm,smmu-v3 @}{eventqgerrorpriqcmdq-sync* 6disabledsyscon@fd58a000)rockchip,rk3588-pmugrfsysconsimple-mfd Xmsyscon@fd58c000rockchip,rk3588-sys-grfsyscon Xhsyscon@fd5a4000rockchip,rk3588-vop-grfsyscon Z@ isyscon@fd5a6000rockchip,rk3588-vo0-grfsyscon Z` 0syscon@fd5a8000rockchip,rk3588-vo1-grfsyscon Z@0jsyscon@fd5ac000rockchip,rk3588-usb-grfsyscon Z@syscon@fd5b0000rockchip,rk3588-php-grfsyscon [*syscon@fd5bc000$rockchip,rk3588-pipe-phy-grfsyscon [syscon@fd5c4000$rockchip,rk3588-pipe-phy-grfsyscon \@syscon@fd5c8000$rockchip,rk3588-usbdpphy-grfsyscon \@syscon@fd5d0000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd ]@+usb2phy@0rockchip,rk3588-usb2phy 0phyclk usb480m_phy0]m7phyapb 6disabledotg-portC 6disabled"syscon@fd5d8000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd ]@+usb2phy@8000rockchip,rk3588-usb2phy 0phyclk usb480m_phy2]o7phyapb6okay$host-portC6okayN)%syscon@fd5dc000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd ]@+usb2phy@c000rockchip,rk3588-usb2phy 0phyclk usb480m_phy3]p 7phyapb6okay&host-portC6okayN)'syscon@fd5e0000$rockchip,rk3588-hdptxphy-grfsyscon ^syscon@fd5f0000rockchip,rk3588-iocsyscon _sram@fd600000 mmio-sram ``+clock-controller@fd7c0000rockchip,rk3588-cru |7]q@GA.2Fq)׫ׄe/ׄ eZ р Y*i2c@fd880000(rockchip,rk3588-i2crockchip,rk3399-i2c =0ts i2cpclkf+pdefault+6okayregulator@42rockchip,rk8602 B~vdd_cpu_big0_s0dp,regulator-state-mem regulator@43 rockchip,rk8603rockchip,rk8602 C~vdd_cpu_big1_s0dp,regulator-state-mem serial@fd890000&rockchip,rk3588-uartsnps,dw-apb-uart K0baudclkapb_pclk9-->txrxf.pdefaultHR 6disabledpwm@fd8b0000(rockchip,rk3588-pwmrockchip,rk3328-pwm 0 pwmpclkf/pdefault_ 6disabledpwm@fd8b0010(rockchip,rk3588-pwmrockchip,rk3328-pwm 0 pwmpclkf0pdefault_ 6disabledpwm@fd8b0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 0 pwmpclkf1pdefault_6okaypwm@fd8b0030(rockchip,rk3588-pwmrockchip,rk3328-pwm 00 pwmpclkf2pdefault_6okaypower-management@fd8d8000&rockchip,rk3588-pmusysconsimple-mfd kpower-controller!rockchip,rk3588-power-controllerj+6okay power-domain@8 j+power-domain@9  0!#" ~345j+power-domain@10 0!#"~6jpower-domain@11 0!#"~7jpower-domain@12 0~89:;jpower-domain@13 +jpower-domain@14 (0~<jpower-domain@15  0~=jpower-domain@16 0 ~>?@+jpower-domain@17  0 ~ABCjpower-domain@21 0 ~DEFGHIJK+jpower-domain@23 0CA~Ljpower-domain@14  0~<jpower-domain@15 0~=jpower-domain@22 0~Mjpower-domain@24 0[Z]~NO+jpower-domain@25 80Z~Pjpower-domain@26 80Q~QRjpower-domain@27 00~STUV+jpower-domain@28  0~WXjpower-domain@29 (0~YZjpower-domain@30 0z{~[jpower-domain@31 @0W~\]^_jpower-domain@33 !0WZ[jpower-domain@34 "0WZ[jpower-domain@37 %02~`jpower-domain@38 &045jpower-domain@40 (~ajvideo-codec@fdb50000+rockchip,rk3588-vpu121rockchip,rk3568-vpu wvdpu0 aclkhclkb( iommu@fdb50800,rockchip,rk3588-iommurockchip,rk3568-iommu @v aclkiface0( *brga@fdb80000(rockchip,rk3588-rgarockchip,rk3288-rga t0aclkhclksclk]rqp 7coreaxiahb( video-codec@fdba0000rockchip,rk3588-vepu121 z0 aclkhclkc( iommu@fdba0800,rockchip,rk3588-iommurockchip,rk3568-iommu @y0 aclkiface( *cvideo-codec@fdba4000rockchip,rk3588-vepu121 @|0 aclkhclkd( iommu@fdba4800,rockchip,rk3588-iommurockchip,rk3568-iommu H@{0 aclkiface( *dvideo-codec@fdba8000rockchip,rk3588-vepu121 ~0 aclkhclke( iommu@fdba8800,rockchip,rk3588-iommurockchip,rk3568-iommu @}0 aclkiface( *evideo-codec@fdbac000rockchip,rk3588-vepu121 0 aclkhclkf( iommu@fdbac800,rockchip,rk3588-iommurockchip,rk3568-iommu @0 aclkiface( *fvideo-codec@fdc70000rockchip,rk3588-av1-vpu lvdpu7ACGׄׄ0AC aclkhclk(  ]vop@fdd90000rockchip,rk3588-vop  BPvopgamma-lut80]\abcd[7aclkhclkdclk_vp0dclk_vp1dclk_vp2dclk_vp3pclk_vopg( Yhijk 6disabledports+port@0+ port@1+ port@2+ port@3+ iommu@fdd97e00,rockchip,rk3588-iommurockchip,rk3568-iommu  ~0]\ aclkiface*(  6disabledgi2s@fddc0000rockchip,rk3588-i2s-tdm 0mclk_txmclk_rxhclk79l>tx( ]7tx-m 6disabledi2s@fddf0000rockchip,rk3588-i2s-tdm 0445mclk_txmclk_rxhclk719l>tx( ]7tx-m 6disabledi2s@fddfc000rockchip,rk3588-i2s-tdm 000,mclk_txmclk_rxhclk7-9l>rx( ]7rx-m 6disabledqos@fdf35000rockchip,rk3588-qossyscon P 8qos@fdf35200rockchip,rk3588-qossyscon R 9qos@fdf35400rockchip,rk3588-qossyscon T :qos@fdf35600rockchip,rk3588-qossyscon V ;qos@fdf36000rockchip,rk3588-qossyscon ` [qos@fdf39000rockchip,rk3588-qossyscon `qos@fdf3d800rockchip,rk3588-qossyscon aqos@fdf3e000rockchip,rk3588-qossyscon ]qos@fdf3e200rockchip,rk3588-qossyscon \qos@fdf3e400rockchip,rk3588-qossyscon ^qos@fdf3e600rockchip,rk3588-qossyscon _qos@fdf40000rockchip,rk3588-qossyscon Yqos@fdf40200rockchip,rk3588-qossyscon  Zqos@fdf40400rockchip,rk3588-qossyscon  Sqos@fdf40500rockchip,rk3588-qossyscon  Tqos@fdf40600rockchip,rk3588-qossyscon  Uqos@fdf40800rockchip,rk3588-qossyscon  Vqos@fdf41000rockchip,rk3588-qossyscon  Wqos@fdf41100rockchip,rk3588-qossyscon  Xqos@fdf60000rockchip,rk3588-qossyscon >qos@fdf60200rockchip,rk3588-qossyscon  ?qos@fdf60400rockchip,rk3588-qossyscon  @qos@fdf61000rockchip,rk3588-qossyscon  Aqos@fdf61200rockchip,rk3588-qossyscon  Bqos@fdf61400rockchip,rk3588-qossyscon  Cqos@fdf62000rockchip,rk3588-qossyscon <qos@fdf63000rockchip,rk3588-qossyscon 0 =qos@fdf64000rockchip,rk3588-qossyscon @ Lqos@fdf66000rockchip,rk3588-qossyscon ` Dqos@fdf66200rockchip,rk3588-qossyscon b Eqos@fdf66400rockchip,rk3588-qossyscon d Fqos@fdf66600rockchip,rk3588-qossyscon f Gqos@fdf66800rockchip,rk3588-qossyscon h Hqos@fdf66a00rockchip,rk3588-qossyscon j Iqos@fdf66c00rockchip,rk3588-qossyscon l Jqos@fdf66e00rockchip,rk3588-qossyscon n Kqos@fdf67000rockchip,rk3588-qossyscon p Mqos@fdf67200rockchip,rk3588-qossyscon r qos@fdf70000rockchip,rk3588-qossyscon 6qos@fdf71000rockchip,rk3588-qossyscon  7qos@fdf72000rockchip,rk3588-qossyscon 3qos@fdf72200rockchip,rk3588-qossyscon " 4qos@fdf72400rockchip,rk3588-qossyscon $ 5qos@fdf80000rockchip,rk3588-qossyscon Pqos@fdf81000rockchip,rk3588-qossyscon  Qqos@fdf81200rockchip,rk3588-qossyscon  Rqos@fdf82000rockchip,rk3588-qossyscon Nqos@fdf82200rockchip,rk3588-qossyscon " Odfi@fe060000 rockchip,rk3588-dfi@&0:mpcie@fe180000*rockchip,rk3588-pcierockchip,rk3568-pcie0?00CH>MR)aclk_mstaclk_slvaclk_dbipclkauxpipepciPsyspmcmsglegacyerr`nnnn):I0o0QE( Jpcie-phy( "T @ @0 @@dbiapbconfig]). 7pwrpipe+6okay [p gqlegacy-interrupt-controllerw npcie@fe190000*rockchip,rk3588-pcierockchip,rk3568-pcie@O00DI?NSs)aclk_mstaclk_slvaclk_dbipclkauxpipepciPsyspmcmsglegacyerr`rrrr):I@o@QEs Jpcie-phy( "T @ @0 A@dbiapbconfig]*/ 7pwrpipe+6okay [tgqlegacy-interrupt-controllerw rethernet@fe1c0000&rockchip,rk3588-gmacsnps,dwmac-4.20a  macirqeth_wake_irq(067Y^50stmmacethclk_mac_refpclk_macaclk_macptp_ref( !]$ 7stmmacethYh*uvw 6disabledmdiosnps,dwmac-mdio+stmmac-axi-configurx-queues-configvqueue0queue1tx-queues-config-wqueue0queue1sata@fe210000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci !(0b_eTosatapmaliverxoobrefasicC+ 6disabledsata-port@0 U@Es Jsata-phyb q sata@fe230000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci #(0dagVqsatapmaliverxoobrefasicC+ 6disabledsata-port@0 U@E( Jsata-phyb q spi@fe2b0000 rockchip,sfc +@0/0clk_sfchclk_sfc+6okaypdefaultfxflash@0jedec,spi-nor mmc@fe2c00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc ,@ 0  biuciuciu-driveciu-sampleрpdefaultfyz{|( (6okay }~ mmc@fe2d00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc -@ 0biuciuciu-driveciu-sample pdefaultf( % 6disabledmmc@fe2e0000rockchip,rk3588-dwcmshc .7-., G n6 (0,*+-.corebusaxiblocktimer fpdefault(]7corebusaxiblocktimer6okay .=i2s@fe470000rockchip,rk3588-i2s-tdm G0+/(mclk_txmclk_rxhclk7)-9-->txrx( &]*+ 7tx-mrx-mWpdefaultf6okayi2s@fe480000rockchip,rk3588-i2s-tdm H0y}umclk_txmclk_rxhclk9-->txrx]^_ 7tx-mrx-mWpdefault(f 6disabledi2s@fe490000(rockchip,rk3588-i2srockchip,rk3066-i2s I0i2s_clki2s_hclk79>txrx( &pdefaultf6okayi2s@fe4a0000(rockchip,rk3588-i2srockchip,rk3066-i2s J0%i2s_clki2s_hclk7"9>txrx( &pdefaultf 6disabledinterrupt-controller@fe600000 arm,gic-v3  `h wra|8+msi-controller@fe640000arm,gic-v3-its domsi-controller@fe660000arm,gic-v3-its fppi-partitionsinterrupt-partition-0interrupt-partition-1 dma-controller@fea10000arm,pl330arm,primecell @ VW0n apb_pclk-dma-controller@fea30000arm,pl330arm,primecell @ XY0o apb_pclki2c@fea90000(rockchip,rk3588-i2crockchip,rk3399-i2c 0{ i2cpclk>fpdefault+ 6disabledi2c@feaa0000(rockchip,rk3588-i2crockchip,rk3399-i2c 0| i2cpclk?fpdefault+ 6disabledi2c@feab0000(rockchip,rk3588-i2crockchip,rk3399-i2c 0} i2cpclk@fpdefault+ 6disabledi2c@feac0000(rockchip,rk3588-i2crockchip,rk3399-i2c 0~ i2cpclkAfpdefault+ 6disabledi2c@fead0000(rockchip,rk3588-i2crockchip,rk3399-i2c 0 i2cpclkBfpdefault+ 6disabledtimer@feae0000,rockchip,rk3588-timerrockchip,rk3288-timer !0TW pclktimerwatchdog@feaf0000 rockchip,rk3588-wdtsnps,dw-wdt 0dc tclkpclk;spi@feb00000(rockchip,rk3588-spirockchip,rk3066-spi F0spiclkapb_pclk9-->txrx fpdefault+ 6disabledspi@feb10000(rockchip,rk3588-spirockchip,rk3066-spi G0spiclkapb_pclk9-->txrx fpdefault+ 6disabledspi@feb20000(rockchip,rk3588-spirockchip,rk3066-spi H0spiclkapb_pclk9>txrxfpdefault+6okay7G pmic@0rockchip,rk806  }pdefaultfB@,, , , , ', 3, ?, K, W, d q, ~  ,  dvs1-null-pins gpio_pwrctrl1 pin_fun0dvs2-null-pins gpio_pwrctrl2 pin_fun0dvs3-null-pins gpio_pwrctrl3 pin_fun0regulatorsdcdc-reg1 vdd_gpu_s0 dp~0regulator-state-mem dcdc-reg2vdd_cpu_lit_s0dp~0regulator-state-mem dcdc-reg3 vdd_log_s0 L 0regulator-state-mem  qdcdc-reg4 vdd_vdenc_s0dp 0regulator-state-mem dcdc-reg5 vdd_ddr_s0 L 0regulator-state-mem  Pdcdc-reg6 vdd2_ddr_s3regulator-state-mem dcdc-reg7vdd_2v0_pldo_s30regulator-state-mem  dcdc-reg8 vcc_3v3_s32Z2Z~regulator-state-mem  2Zdcdc-reg9 vddq_ddr_s0regulator-state-mem dcdc-reg10 vcc_1v8_s3w@w@regulator-state-mem  w@pldo-reg1 avcc_1v8_s0w@w@regulator-state-mem  w@pldo-reg2 vcc_1v8_s0w@w@regulator-state-mem  w@pldo-reg3 avdd_1v2_s0OOregulator-state-mem pldo-reg4 vcc_3v3_s02Z2Z0regulator-state-mem pldo-reg5 vccio_sd_s0w@2Z0regulator-state-mem pldo-reg6 pldo6_s3w@w@regulator-state-mem  w@nldo-reg1 vdd_0v75_s3 q qregulator-state-mem  qnldo-reg2vdd_ddr_pll_s0 P Pregulator-state-mem  Pnldo-reg3 avdd_0v75_s0  regulator-state-mem nldo-reg4 vdd_0v85_s0 P Pregulator-state-mem nldo-reg5 vdd_0v75_s0 q qregulator-state-mem spi@feb30000(rockchip,rk3588-spirockchip,rk3066-spi I0spiclkapb_pclk9>txrx fpdefault+ 6disabledserial@feb40000&rockchip,rk3588-uartsnps,dw-apb-uart L0baudclkapb_pclk9-- >txrxfpdefaultRH 6disabledserial@feb50000&rockchip,rk3588-uartsnps,dw-apb-uart M0baudclkapb_pclk9- - >txrxfpdefaultRH6okayserial@feb60000&rockchip,rk3588-uartsnps,dw-apb-uart N0baudclkapb_pclk9- - >txrxfpdefaultRH 6disabledserial@feb70000&rockchip,rk3588-uartsnps,dw-apb-uart O0baudclkapb_pclk9 >txrxfpdefaultRH 6disabledserial@feb80000&rockchip,rk3588-uartsnps,dw-apb-uart P0baudclkapb_pclk9 >txrxfpdefaultRH 6disabledserial@feb90000&rockchip,rk3588-uartsnps,dw-apb-uart Q0baudclkapb_pclk9 >txrxfpdefaultRH 6disabledserial@feba0000&rockchip,rk3588-uartsnps,dw-apb-uart R0baudclkapb_pclk9ll>txrxfpdefaultRH 6disabledserial@febb0000&rockchip,rk3588-uartsnps,dw-apb-uart S0baudclkapb_pclk9l l >txrxfpdefaultRH 6disabledserial@febc0000&rockchip,rk3588-uartsnps,dw-apb-uart T0baudclkapb_pclk9l l >txrxfpdefaultRH6okaypwm@febd0000(rockchip,rk3588-pwmrockchip,rk3328-pwm 0LK pwmpclkfpdefault_ 6disabledpwm@febd0010(rockchip,rk3588-pwmrockchip,rk3328-pwm 0LK pwmpclkfpdefault_ 6disabledpwm@febd0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 0LK pwmpclkfpdefault_ 6disabledpwm@febd0030(rockchip,rk3588-pwmrockchip,rk3328-pwm 00LK pwmpclkfpdefault_ 6disabledpwm@febe0000(rockchip,rk3588-pwmrockchip,rk3328-pwm 0ON pwmpclkfpdefault_ 6disabledpwm@febe0010(rockchip,rk3588-pwmrockchip,rk3328-pwm 0ON pwmpclkfpdefault_ 6disabledpwm@febe0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 0ON pwmpclkfpdefault_ 6disabledpwm@febe0030(rockchip,rk3588-pwmrockchip,rk3328-pwm 00ON pwmpclkfpdefault_ 6disabledpwm@febf0000(rockchip,rk3588-pwmrockchip,rk3328-pwm 0RQ pwmpclkfpdefault_ 6disabledpwm@febf0010(rockchip,rk3588-pwmrockchip,rk3328-pwm 0RQ pwmpclkfpdefault_ 6disabledpwm@febf0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 0RQ pwmpclkfpdefault_ 6disabledpwm@febf0030(rockchip,rk3588-pwmrockchip,rk3328-pwm 00RQ pwmpclkfpdefault_ 6disabledthermal-zonespackage-thermal  4 Btripspackage-crit R8 ^ criticalbigcore0-thermal d 4 Btripsbigcore0-alert RL ^passivebigcore0-crit R8 ^ criticalcooling-mapsmap0 i nbigcore2-thermal d 4 Btripsbigcore2-alert RL ^passivebigcore2-crit R8 ^ criticalcooling-mapsmap0 i n littlecore-thermal d 4 Btripslittlecore-alert RL ^passivelittlecore-crit R8 ^ criticalcooling-mapsmap0 i0 ncenter-thermal  4 Btripscenter-crit R8 ^ criticalgpu-thermal d 4 Btripsgpu-alert RL ^passivegpu-crit R8 ^ criticalcooling-mapsmap0 i nnpu-thermal  4 Btripsnpu-crit R8 ^ criticaltsadc@fec00000rockchip,rk3588-tsadc 0tsadcapb_pclk7G]VW7tsadc-apbtsadc }  f pdefaultsleep 6okayadc@fec10000rockchip,rk3588-saradc  0saradcapb_pclk]U 7saradc-apb6okay i2c@fec80000(rockchip,rk3588-i2crockchip,rk3399-i2c 0 i2cpclkCfpdefault+6okayrtc@51haoyu,hym8563 Q }hym8563pdefaultf i2c@fec90000(rockchip,rk3588-i2crockchip,rk3399-i2c 0 i2cpclkDfpdefault+6okayaudio-codec@11everest,es8388 01   * +71Gi2c@feca0000(rockchip,rk3588-i2crockchip,rk3399-i2c 0 i2cpclkEfpdefault+ 6disabledspi@fecb0000(rockchip,rk3588-spirockchip,rk3066-spi J0spiclkapb_pclk9l l>txrx fpdefault+ 6disabledefuse@fecc0000rockchip,rk3588-otp  0otpapb_pclkphyarb] 7otpapbarb+cpu-code@2 id@7 cpu-leakage@17 cpu-leakage@18 cpu-leakage@19 log-leakage@1a gpu-leakage@1b cpu-version@1c  7npu-leakage@28 (codec-leakage@29 )dma-controller@fed10000arm,pl330arm,primecell @ Z[0p apb_pclklphy@fed60000rockchip,rk3588-hdptx-phy 0TrefapbC8]#cde!""7phyapbinitcmnlaneroplllcpllY 6disabledphy@fed80000rockchip,rk3588-usbdp-phy C0lVrefclkimmortalpclkutmi(]   7initcmnlanepcs_apbpma_apb < O ` v 6disabled#phy@fee00000rockchip,rk3588-naneng-combphy 0vW refapbpipe7GC]<C7phyapb * 6okaysphy@fee20000rockchip,rk3588-naneng-combphy 0xW refapbpipe7GC]>E7phyapb * 6okay(sram@ff001000 mmio-sram +pinctrlrockchip,rk3588-pinctrlY+gpio@fd8a0000rockchip,gpio-bank 0qr  w }gpio@fec20000rockchip,gpio-bank 0st  w gpio@fec30000rockchip,gpio-bank 0uv  @ w  gpio@fec40000rockchip,gpio-bank 0wx  ` w pgpio@fec50000rockchip,gpio-bank 0yz  w tpcfg-pull-up pcfg-pull-down pcfg-pull-none pcfg-pull-none-drv-level-2  pcfg-pull-up-drv-level-1  pcfg-pull-up-drv-level-2  pcfg-pull-none-smt  auddsmbt1120can0can1can2cifclk32kcpuddrphych0ddrphych1ddrphych2ddrphych3dp0dp1emmcemmc-rstnout emmc-bus8 emmc-clk emmc-cmd emmc-data-strobe eth1fspifspim1-pins`    xgmac1gpuhdmii2c0i2c0m2-xfer +i2c1i2c1m0-xfer   i2c2i2c2m0-xfer   i2c3i2c3m0-xfer   i2c4i2c4m0-xfer   i2c5i2c5m0-xfer   i2c6i2c6m0-xfer   i2c7i2c7m0-xfer   i2c8i2c8m0-xfer   i2s0i2s0-lrck i2s0-mclk i2s0-sclk i2s0-sdi0 i2s0-sdo0 i2s1i2s1m0-lrck i2s1m0-sclk i2s1m0-sdi0 i2s1m0-sdi1 i2s1m0-sdi2 i2s1m0-sdi3 i2s1m0-sdo0  i2s1m0-sdo1  i2s1m0-sdo2  i2s1m0-sdo3  i2s2i2s2m0-lrck i2s2m0-sclk i2s2m0-sdi i2s2m0-sdo i2s3i2s3-lrck i2s3-sclk i2s3-sdi i2s3-sdo jtaglitcpumcumipinpupcie20x1pcie30phypcie30x1pcie30x2pcie30x4pdm0pdm1pmicpmic-pinsp pmupwm0pwm0m0-pins /pwm1pwm1m0-pins 0pwm2pwm2m1-pins  1pwm3pwm3m1-pins  2pwm4pwm4m0-pins  pwm5pwm5m0-pins  pwm6pwm6m0-pins  pwm7pwm7m0-pins  pwm8pwm8m0-pins  pwm9pwm9m0-pins  pwm10pwm10m0-pins  pwm11pwm11m0-pins  pwm12pwm12m0-pins  pwm13pwm13m0-pins  pwm14pwm14m0-pins  pwm15pwm15m0-pins  refclksatasata0sata1sata2sdiosdiom1-pins` sdmmcsdmmc-bus4@ |sdmmc-clk ysdmmc-cmd zsdmmc-det {spdif0spdif1spi0spi0m0-pins0 spi0m0-cs0 spi0m0-cs1 spi1spi1m1-pins0 spi1m1-cs0 spi1m1-cs1 spi2spi2m2-pins0  spi2m2-cs0  spi3spi3m1-pins0  spi3m1-cs0 spi3m1-cs1 spi4spi4m0-pins0 spi4m0-cs0 spi4m0-cs1 tsadctsadc-shut-org uart0uart0m1-xfer  .uart1uart1m1-xfer   uart2uart2m0-xfer  uart3uart3m1-xfer   uart4uart4m1-xfer   uart5uart5m1-xfer   uart6uart6m1-xfer   uart7uart7m1-xfer   uart8uart8m1-xfer   uart9uart9m0-xfer   vopbt656gpio-functsadc-gpio-func eth0gmac0hym8563hym8563-int ledsblue-led ir-receiverir-receiver-pin  soundhp-detect usbvcc5v0-usb20-en  usb@fc400000rockchip,rk3588-dwc3snps,dwc3 @@0ref_clksuspend_clkbus_clk=otg EJusb2-phyusb3-phy Tutmi_wide( ]Sd 6disabledsyscon@fd5b8000%rockchip,rk3588-pcie3-phy-grfsyscon [syscon@fd5c0000$rockchip,rk3588-pipe-phy-grfsyscon \syscon@fd5cc000$rockchip,rk3588-usbdpphy-grfsyscon \@syscon@fd5d4000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd ]@@+usb2phy@4000rockchip,rk3588-usb2phy @0phyclk usb480m_phy1]n7phyapb 6disabledotg-portC 6disabledi2s@fddc8000rockchip,rk3588-i2s-tdm ܀0mclk_txmclk_rxhclk79l>tx( ]7tx-m 6disabledi2s@fddf4000rockchip,rk3588-i2s-tdm @099?mclk_txmclk_rxhclk769l>tx( ]7tx-m 6disabledi2s@fddf8000rockchip,rk3588-i2s-tdm ߀0++'mclk_txmclk_rxhclk7(9l>rx( ]7rx-m 6disabledi2s@fde00000rockchip,rk3588-i2s-tdm 0&&"mclk_txmclk_rxhclk7#9l>rx( ]7rx-m 6disabledpcie@fe150000*rockchip,rk3588-pcierockchip,rk3568-pcie+00@E;JOt)aclk_mstaclk_slvaclk_dbipclkauxpipepciPsyspmcmsglegacyerr`):IQE Jpcie-phy( "T @ @0 @@dbiapbconfig]&+ 7pwrpipe6okay [tglegacy-interrupt-controllerw pcie-ep@fe150000rockchip,rk3588-pcie-epP @ @ @ @0dbidbi2apbaddr_spaceatu00@E;JOt)aclk_mstaclk_slvaclk_dbipclkauxpipe +syspmcmsglegacyerrdma0dma1dma2dma3:QE Jpcie-phy( "]&+ 7pwrpipe 6disabledpcie@fe160000*rockchip,rk3588-pcierockchip,rk3568-pcie+00AF<KPu)aclk_mstaclk_slvaclk_dbipclkauxpipepciPsyspmcmsglegacyerr`):IQE Jpcie-phy( "T @ @@0 @@@dbiapbconfig]', 7pwrpipe 6disabledlegacy-interrupt-controllerw pcie@fe170000*rockchip,rk3588-pcierockchip,rk3568-pcie /00BG=LQ)aclk_mstaclk_slvaclk_dbipclkauxpipepciPsyspmcmsglegacyerr`):I o QE Jpcie-phy( "T @ @0 @@dbiapbconfig](- 7pwrpipe+6okay [tglegacy-interrupt-controllerw ethernet@fe1b0000&rockchip,rk3588-gmacsnps,dwmac-4.20a  macirqeth_wake_irq(067X]40stmmacethclk_mac_refpclk_macaclk_macptp_ref( !]# 7stmmacethYh* 6disabledmdiosnps,dwmac-mdio+stmmac-axi-configrx-queues-configqueue0queue1tx-queues-config-queue0queue1sata@fe220000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci "(0c`fUpsatapmaliverxoobrefasicC+ 6disabledsata-port@0 U@E Jsata-phyb q phy@fed90000rockchip,rk3588-usbdp-phy C0mWrefclkimmortalpclkutmi(]7initcmnlanepcs_apbpma_apb < O ` v 6disabledphy@fee10000rockchip,rk3588-naneng-combphy 0wW refapbpipe7GC]=D7phyapb * 6okayphy@fee80000rockchip,rk3588-pcie3-phy C0ypclk]H7phy * 6okayopp-table-cluster0operating-points-v2 & opp-1008000000 1< 8 L L~ F@opp-1200000000 1G 8 4 4~ F@opp-1416000000 1Tfr 8 ~ F@ Wopp-1608000000 1_" 8 P P~ F@opp-1800000000 1kI 8~~~ F@opp-table-cluster1operating-points-v2 &opp-1200000000 1G 8 L LB@ F@opp-1416000000 1Tfr 8  B@ F@opp-1608000000 1_" 8 B@ F@opp-1800000000 1kI 8 P PB@ F@opp-2016000000 1x) 8HHB@ F@opp-2208000000 1h 8llB@ F@opp-2400000000 1  8B@B@B@ F@opp-table-cluster2operating-points-v2 &opp-1200000000 1G 8 L LB@ F@opp-1416000000 1Tfr 8  B@ F@opp-1608000000 1_" 8 B@ F@opp-1800000000 1kI 8 P PB@ F@opp-2016000000 1x) 8HHB@ F@opp-2208000000 1h 8llB@ F@opp-2400000000 1  8B@B@B@ F@opp-tableoperating-points-v2!opp-300000000 1 8 L L Popp-400000000 1ׄ 8 L L Popp-500000000 1e 8 L L Popp-600000000 1#F 8 L L Popp-700000000 1)' 8 ` ` Popp-800000000 1/ 8 q q Popp-900000000 15 8 5 5 Popp-1000000000 1; 8 P P Pchosen cserial2:1500000n8adc-keys-0 adc-keys o {buttons w@ dbutton-maskrom Mask Rom  adc-keys-1 adc-keys o {buttons w@ dbutton-recovery Recovery h speaker-audio-amplifiersimple-audio-amplifier p Speaker Ampheadphones-audio-amplifiersimple-audio-amplifier p Headphones Ampir-receivergpio-ir-receiver at pdefaultfgpio-leds gpio-ledspdefaultfled  indicator  appwm-fanpwm-fan FKPd ', 2Ppwm-leds pwm-ledsled  indicator  7 2arfkill rfkill-gpio rfkill-pcie-wlan Fwlan Q}soundsimple-audio-cardpdefaultf `Analog w i2s   ^$MicrophoneOnboard MicrophoneMicrophoneMicrophone JackSpeakerSpeakerHeadphoneHeadphonesr>HeadphonesLOUT1HeadphonesROUT1SpeakerLOUT2SpeakerROUT2HeadphonesHeadphones Amp OUTLHeadphonesHeadphones Amp OUTRHeadphones Amp INLLOUT1Headphones Amp INRROUT1SpeakerSpeaker Amp OUTLSpeakerSpeaker Amp OUTRSpeaker Amp INLLOUT2Speaker Amp INRROUT2LINPUT1Microphone JackRINPUT1Microphone JackLINPUT2Onboard MicrophoneRINPUT2Onboard Microphonesimple-audio-card,cpuXbsimple-audio-card,codecXbvcc3v3-pcie30-regulatorregulator-fixedy a vcc3v3_pcie302Z2Z,vcc3v3-pcie-eth-regulatorregulator-fixed ap vcc3v3_pcie_eth2Z2ZP,qvcc3v3-wf-regulatorregulator-fixedy a  vcc3v3_wf2Z2ZP,vcc5v0-sys-regulatorregulator-fixed vcc5v0_sysLK@LK@,vcc5v0-usb20-regulatorregulator-fixedy ppdefaultf  vcc5v0_usb20LK@LK@,) compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3spi4mmc0mmc1cpudevice_typeregenable-methodcapacity-dmips-mhzclocksassigned-clocksassigned-clock-ratescpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachedynamic-power-coefficient#cooling-cellsoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedportsarm,smc-idshmem#clock-cells#reset-cellsinterruptsclock-frequencyclock-output-namesinterrupt-namesrangesclock-namespower-domainsstatusdr_modephysphy-namesphy_typeresetssnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,dis-u2-freeclk-exists-quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirksnps,dis_rxdet_inp3_quirk#iommu-cellsreset-names#phy-cellsphy-supplyrockchip,grfpinctrl-0pinctrl-namesfcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspenddmasdma-namesreg-shiftreg-io-width#pwm-cells#power-domain-cellspm_qosiommusreg-namesrockchip,vop-grfrockchip,vo1-grfrockchip,pmuassigned-clock-parents#sound-dai-cellsbus-range#interrupt-cellsinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapnum-lanesreset-gpiosvpcie3v3-supplyinterrupt-controllerrockchip,php-grfsnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,wr_osr_lmtsnps,rd_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useports-implementedhba-port-capsnps,rx-ts-maxsnps,tx-ts-maxspi-max-frequencyspi-rx-bus-widthspi-tx-bus-widthfifo-depthcap-sd-highspeedcd-gpiosdisable-wpno-sdiono-mmcsd-uhs-sdr104vmmc-supplyvqmmc-supplyno-sdnon-removablemmc-hs400-1_8vmmc-hs400-enhanced-stroberockchip,trcm-sync-tx-onlymbi-aliasmbi-rangesmsi-controller#msi-cellsaffinityarm,pl330-periph-burst#dma-cellsnum-cssystem-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvcc13-supplyvcc14-supplyvcca-supplygpio-controller#gpio-cellspinsfunctionregulator-enable-ramp-delayregulator-suspend-microvoltregulator-on-in-suspendpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polaritypinctrl-1#thermal-sensor-cells#io-channel-cellsvref-supplywakeup-sourceAVDD-supplyDVDD-supplyHPVDD-supplybitsrockchip,u2phy-grfrockchip,usb-grfrockchip,usbdpphy-grfrockchip,vo-grfrockchip,pipe-grfrockchip,pipe-phy-grfgpio-rangesbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsrockchip,phy-grfopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallabellinux,codepress-threshold-microvoltenable-gpiossound-name-prefixcolorfunction-enumeratorcooling-levelsfan-supplypwmsmax-brightnessradio-typeshutdown-gpiossimple-audio-card,namesimple-audio-card,aux-devssimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,hp-det-gpiosimple-audio-card,bitclock-mastersimple-audio-card,frame-mastersimple-audio-card,widgetssimple-audio-card,routingsound-daisystem-clock-frequencyenable-active-highstartup-delay-us