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)avcc_1v8_codec_s0 8 L zw@ ’w@ ª0Ô'Üregulator-state-mem ópldo-reg4 )vcc_3v3_s3 8 L z2Z  ’2Z  ª0Ô'}regulator-state-mem ( 2Z pldo-reg5 )vccio_sd_s0 8 L zw@ ’2Z  ª0Ô'~regulator-state-mem ópldo-reg6 )vcc_1v8_s3 8 L zw@ ’w@ ª0Ôregulator-state-mem ( w@nldo-reg1 )vdd_0v75_s3 8 L z q° ’ q° ª0Ôregulator-state-mem ( q°nldo-reg2 )vdd2l_0v9_ddr_s3 8 L z »  ’ » regulator-state-mem ( » nldo-reg3 )vdd_0v75_hdmi_edp_s0 8 L z q° ’ q°regulator-state-mem ónldo-reg4 )avdd_0v75_s0 8 L z q° ’ q°regulator-state-mem ónldo-reg5 )vdd_0v85_s0 8 L z øP ’ øPregulator-state-mem ópmic@1rockchip,rk806( |á ˆ³´µ’default8B@b°n°z°†°’°ž°ª°¶°°ΰÛ±è°õ² ± °dvs1-null-pins gpio_pwrctrl1 pin_fun0'³dvs2-null-pins gpio_pwrctrl2 pin_fun0'´dvs3-null-pins gpio_pwrctrl3 pin_fun0'µregulatorsdcdc-reg1 )vdd_cpu_big1_s0 8 L ¿¶ Ö' zdp ’� ª0Ô'regulator-state-mem ódcdc-reg2 )vdd_cpu_big0_s0 8 L ¿· Ö' zdp ’� ª0Ô'regulator-state-mem ódcdc-reg3 )vdd_cpu_lit_s0 8 L ¿¸ Ö' zdp ’~ð ª0Ô'regulator-state-mem ódcdc-reg4 )vcc_3v3_s0 8 L z2Z  ’2Z  ª0Ô'Ýregulator-state-mem ódcdc-reg5 )vdd_cpu_big1_mem_s0 8 L ¿ Ö' z L¸ ’� ª0Ô'¶regulator-state-mem ódcdc-reg6 )vdd_cpu_big0_mem_s0 8 L ¿ Ö' z L¸ ’� ª0Ô'·regulator-state-mem ódcdc-reg7 )vcc_1v8_s0 8 L zw@ ’w@ ª0Ô'Ùregulator-state-mem ódcdc-reg8 )vdd_cpu_lit_mem_s0 8 L ¿ Ö' z L¸ ’~ð ª0Ô'¸regulator-state-mem ódcdc-reg9 )vddq_ddr_s0 8 Lregulator-state-mem ódcdc-reg10 )vdd_ddr_s0 8 L z L¸ ’ »  ª0Ôregulator-state-mem ópldo-reg1 )vcc_1v8_cam_s0 8 L zw@ ’w@ ª0Ôregulator-state-mem ópldo-reg2 )avdd1v8_ddr_pll_s0 8 L zw@ ’w@ ª0Ôregulator-state-mem ópldo-reg3 )vdd_1v8_pll_s0 8 L zw@ ’w@ ª0Ôregulator-state-mem ópldo-reg4 )vcc_3v3_sd_s0 8 L z2Z  ’2Z  ª0Ôregulator-state-mem ópldo-reg5 )vcc_2v8_cam_s0 8 L z*¹€ ’*¹€ ª0Ôregulator-state-mem ópldo-reg6 )pldo6_s3 8 L zw@ ’w@regulator-state-mem ( w@nldo-reg1 )vdd_0v75_pll_s0 8 L z q° ’ q° ª0Ôregulator-state-mem ónldo-reg2 )vdd_ddr_pll_s0 8 L z øP ’ øPregulator-state-mem ónldo-reg3 )avdd_0v85_s0 8 L z øP ’ øP ª0Ôregulator-state-mem ónldo-reg4 )avdd_1v2_cam_s0 8 L zO€ ’O€ ª0Ôregulator-state-mem ónldo-reg5 )avdd_1v2_s0 8 L zO€ ’O€ ª0Ôregulator-state-mem óspi@feb30000(rockchip,rk3588-spirockchip,rk3066-spiþ³áI:š•&spiclkapb_pclk ””¥txrx ˆ¹º»’default+ @disabledserial@feb40000&rockchip,rk3588-uartsnps,dw-apb-uartþ´áL:«Ÿ&baudclkapb_pclk .. ¥txrxˆ¼’default¹¯ @disabledserial@feb50000&rockchip,rk3588-uartsnps,dw-apb-uartþµáM:¯ &baudclkapb_pclk . . ¥txrxˆ½’default¹¯@okayserial@feb60000&rockchip,rk3588-uartsnps,dw-apb-uartþ¶áN:³¡&baudclkapb_pclk . . ¥txrxˆ¾’default¹¯ @disabledserial@feb70000&rockchip,rk3588-uartsnps,dw-apb-uartþ·áO:·¢&baudclkapb_pclk ” ” ¥txrxˆ¿’default¹¯ @disabledserial@feb80000&rockchip,rk3588-uartsnps,dw-apb-uartþ¸áP:»£&baudclkapb_pclk ” ” ¥txrxˆÀ’default¹¯ @disabledserial@feb90000&rockchip,rk3588-uartsnps,dw-apb-uartþ¹áQ:¿¤&baudclkapb_pclk ” ”¥txrxˆÁ’default¹¯ @disabledserial@feba0000&rockchip,rk3588-uartsnps,dw-apb-uartþºáR:Ã¥&baudclkapb_pclk mm¥txrxˆÂ’default¹¯ @disabledserial@febb0000&rockchip,rk3588-uartsnps,dw-apb-uartþ»áS:Ǧ&baudclkapb_pclk m m ¥txrxˆÃ’default¹¯ @disabledserial@febc0000&rockchip,rk3588-uartsnps,dw-apb-uartþ¼áT:˧&baudclkapb_pclk m m ¥txrxˆÄ’default¹¯ @disabledpwm@febd0000(rockchip,rk3588-pwmrockchip,rk3328-pwmþ½:LK &pwmpclkˆÅ’defaultÆ @disabledpwm@febd0010(rockchip,rk3588-pwmrockchip,rk3328-pwmþ½:LK &pwmpclkˆÆ’defaultÆ @disabledpwm@febd0020(rockchip,rk3588-pwmrockchip,rk3328-pwmþ½ :LK &pwmpclkˆÇ’defaultÆ @disabledpwm@febd0030(rockchip,rk3588-pwmrockchip,rk3328-pwmþ½0:LK &pwmpclkˆÈ’defaultÆ @disabledpwm@febe0000(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¾:ON &pwmpclkˆÉ’defaultÆ @disabledpwm@febe0010(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¾:ON &pwmpclkˆÊ’defaultÆ @disabledpwm@febe0020(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¾ :ON &pwmpclkˆË’defaultÆ @disabledpwm@febe0030(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¾0:ON &pwmpclkˆÌ’defaultÆ @disabledpwm@febf0000(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¿:RQ &pwmpclkˆÍ’defaultÆ @disabledpwm@febf0010(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¿:RQ &pwmpclkˆÎ’defaultÆ @disabledpwm@febf0020(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¿ :RQ &pwmpclkˆÏ’defaultÆ @disabledpwm@febf0030(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¿0:RQ &pwmpclkˆÐ’defaultÆ @disabledthermal-zonespackage-thermal @ V dÑtripspackage-crit tÁ8 € criticalbigcore0-thermal @d V dÑtripsbigcore0-alert tL €Ðpassive'Òbigcore0-crit tÁ8 € criticalcooling-mapsmap0 ‹Ò �ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿbigcore2-thermal @d V dÑtripsbigcore2-alert tL €Ðpassive'Óbigcore2-crit tÁ8 € criticalcooling-mapsmap0 ‹Ó �ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿlittlecore-thermal @d V dÑtripslittlecore-alert tL €Ðpassive'Ôlittlecore-crit tÁ8 € criticalcooling-mapsmap0 ‹Ô0 �ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿcenter-thermal @ V dÑtripscenter-crit tÁ8 € criticalgpu-thermal @d V dÑtripsgpu-alert tL €Ðpassive'Õgpu-crit tÁ8 € criticalcooling-mapsmap0 ‹Õ �Öÿÿÿÿÿÿÿÿnpu-thermal @ V dÑtripsnpu-crit tÁ8 € criticaltsadc@fec00000rockchip,rk3588-tsadcþÀá�:ž�&tsadcapb_pclkAžQ„€VWYtsadc-apbtsadc ŸÔÀ ¶ Íˆ× èØ’defaultsleep ò@okay'Ñadc@fec10000rockchip,rk3588-saradcþÁᎠ:‘�&saradcapb_pclkU Ysaradc-apb@okay Ù' i2c@fec80000(rockchip,rk3588-i2crockchip,rk3399-i2cþÈ:ˆ€ &i2cpclkáCˆÚ’default+ @disabledi2c@fec90000(rockchip,rk3588-i2crockchip,rk3399-i2cþÉ:‰� &i2cpclkáDˆÛ’default+@okayaudio-codec@11everest,es8388A1Q»€:1 &Ü 2Ü >Ý ?ÝC'i2c@feca0000(rockchip,rk3588-i2crockchip,rk3399-i2cþÊ:Š‚ &i2cpclkáEˆÞ’default+ @disabledspi@fecb0000(rockchip,rk3588-spirockchip,rk3066-spiþËáJ:›–&spiclkapb_pclk m m¥txrx ˆßàá’default+ @disabledefuse@fecc0000rockchip,rk3588-otpþÌ :Œ‹��&otpapb_pclkphyarb§¦¨ Yotpapbarb+cpu-code@2id@7cpu-leakage@17cpu-leakage@18cpu-leakage@19log-leakage@1agpu-leakage@1bcpu-version@1c Knpu-leakage@28(codec-leakage@29)dma-controller@fed10000arm,pl330arm,primecellþÑ@ áZ[å:p &apb_pclkü'mphy@fed60000rockchip,rk3588-hdptx-phyþÖ : T&refapbe8#cde!""Yphyapbinitcmnlaneroplllcpll{â @disabledphy@fed80000rockchip,rk3588-usbdp-phyþØe:¡lVã&refclkimmortalpclkutmi(   Yinitcmnlanepcs_apbpma_apb Pä cå tæ Šç @disabled'%phy@fee00000rockchip,rk3588-naneng-combphyþà:¨vW &refapbpipeA¨Qõáe<CYphyapb š, ¬è@okay'tphy@fee20000rockchip,rk3588-naneng-combphyþâ:ªxW &refapbpipeAªQõáe>EYphyapb š, ¬é@okay'*sram@ff001000 mmio-sramÿðÿð+pinctrlrockchip,rk3588-pinctrl{ê+'ëgpio@fd8a0000rockchip,gpio-bankýŠá:qr( Âë Î^'|gpio@fec20000rockchip,gpio-bankþÂá:st( Âë Î^' gpio@fec30000rockchip,gpio-bankþÃá:uv( Âë@ Î^gpio@fec40000rockchip,gpio-bankþÄá:wx( Âë` Î^'gpio@fec50000rockchip,gpio-bankþÅá:yz( Âë€ Î^'rpcfg-pull-up Î'ðpcfg-pull-down Û'îpcfg-pull-none ê'ìpcfg-pull-none-drv-level-2 ê ÷'òpcfg-pull-up-drv-level-1 Î ÷'ñpcfg-pull-up-drv-level-2 Î ÷'ípcfg-pull-none-smt ê 'ïauddsmbt1120can0can1can2cifclk32kcpuddrphych0ddrphych1ddrphych2ddrphych3dp0dp1emmcemmc-rstnout ì'€emmc-bus8€ íííííííí'�emmc-clk í'‚emmc-cmd í'ƒemmc-data-strobe î'„eth1fspigmac1gpuhdmii2c0i2c0m0-xfer  ïï'-i2c1i2c1m0-xfer  ï ï'�i2c2i2c2m0-xfer  ï ï'ži2c3i2c3m0-xfer  ï ï' i2c4i2c4m0-xfer  ï ï'¡i2c5i2c5m0-xfer  ï ï'¢i2c6i2c6m0-xfer  ï ï'Úi2c7i2c7m0-xfer  ï ï'Ûi2c8i2c8m0-xfer  ï ï'Þi2s0i2s0-lrck ì'…i2s0-mclk ì'†i2s0-sclk ì'‡i2s0-sdi0 ì'ˆi2s0-sdo0 ì'‰i2s1i2s1m0-lrck ì'Ši2s1m0-sclk ì'‹i2s1m0-sdi0 ì'Œi2s1m0-sdi1 ì'�i2s1m0-sdi2 ì'Ži2s1m0-sdi3 ì'�i2s1m0-sdo0  ì'�i2s1m0-sdo1  ì'‘i2s1m0-sdo2  ì'’i2s1m0-sdo3  ì'“i2s2i2s2m1-lrck ì'•i2s2m1-sclk  ì'–i2s2m1-sdi  ì'—i2s2m1-sdo  ì'˜i2s3i2s3-lrck ì'™i2s3-sclk ì'ši2s3-sdi ì'›i2s3-sdo ì'œjtaglitcpumcumipinpupcie20x1pcie30phypcie30x1pcie30x2pcie30x4pdm0pdm1pmicpmic-pinsp ðìììììì'¬pmupwm0pwm0m0-pins ì'0pwm1pwm1m0-pins ì'1pwm2pwm2m0-pins ì'2pwm3pwm3m0-pins ì'3pwm4pwm4m0-pins  ì'Åpwm5pwm5m0-pins  ì'Æpwm6pwm6m0-pins  ì'Çpwm7pwm7m0-pins  ì'Èpwm8pwm8m0-pins  ì'Épwm9pwm9m0-pins  ì'Êpwm10pwm10m0-pins  ì'Ëpwm11pwm11m0-pins  ì'Ìpwm12pwm12m0-pins  ì'Ípwm13pwm13m0-pins  ì'Îpwm14pwm14m0-pins  ì'Ïpwm15pwm15m0-pins  ì'Ðrefclksatasata0sata1sata2sdiosdiom1-pins` ìððððð'sdmmcsdmmc-bus4@ íííí'{sdmmc-clk í'xsdmmc-cmd í'ysdmmc-det ð'zspdif0spdif1spi0spi0m0-pins0 ñññ'¥spi0m0-cs0 ñ'£spi0m0-cs1 ñ'¤spi1spi1m1-pins0 ñññ'¨spi1m1-cs0 ñ'¦spi1m1-cs1 ñ'§spi2spi2m2-pins0 ñ ññ'«spi2m2-cs0  ñ'©spi2m2-cs1 ñ'ªspi3spi3m1-pins0 ñ ññ'»spi3m1-cs0 ñ'¹spi3m1-cs1 ñ'ºspi4spi4m0-pins0 ñññ'áspi4m0-cs0 ñ'ßspi4m0-cs1 ñ'àtsadctsadc-shut-org ì'×uart0uart0m1-xfer ð ð'/uart1uart1m1-xfer  ð ð'¼uart2uart2m0-xfer  ð ð'½uart3uart3m1-xfer  ð ð'¾uart4uart4m1-xfer  ð ð'¿uart5uart5m1-xfer  ð ð'Àuart6uart6m1-xfer  ð ð'Áuart7uart7m1-xfer  ð ð'Âuart8uart8m1-xfer  ð ð'Ãuart9uart9m1-xfer  ð ð'Ävopbt656gpio-functsadc-gpio-func ì'Øeth0gmac0gmac0-miim ìì'gmac0-rx-bus20 ììì'gmac0-tx-bus20 ììì'gmac0-rgmii-clk ì ì'gmac0-rgmii-bus@ ìì ì ì'hym8563hym8563-int ð'Ÿledsled-pins ð'rtl8111rtl8111-isolate ð'qrtl8211frtl8211f-rst  ì'soundhp-detect ì'usbvcc5v0-host-en ì'usb@fc400000rockchip,rk3588-dwc3snps,dwc3ü@@áÝ:—–•&ref_clksuspend_clkbus_clk_otg góôlusb2-phyusb3-phy vutmi_wide2 S†Îï @disabledsyscon@fd5b8000%rockchip,rk3588-pcie3-phy-grfsysconý[€' syscon@fd5c0000$rockchip,rk3588-pipe-phy-grfsysconý\' syscon@fd5cc000$rockchip,rk3588-usbdpphy-grfsysconý\À@' syscon@fd5d4000.rockchip,rk3588-usb2phy-grfsysconsimple-mfdý]@@+'usb2phy@4000rockchip,rk3588-usb2phy@Ç: &phyclk üusb480m_phy1áŠnYphyapb @disabled'otg-porte @disabled'ói2s@fddc8000rockchip,rk3588-i2s-tdmýÜ€á¼:ññî&mclk_txmclk_rxhclkAï, m¥tx2 ºYtx-mC @disabledi2s@fddf4000rockchip,rk3588-i2s-tdmýß@áº:99?&mclk_txmclk_rxhclkA6, m¥tx2 ÚYtx-mC @disabledi2s@fddf8000rockchip,rk3588-i2s-tdmý߀á»:++'&mclk_txmclk_rxhclkA(, m¥rx2 ÇYrx-mC @disabledi2s@fde00000rockchip,rk3588-i2s-tdmýàá¾:&&"&mclk_txmclk_rxhclkA#, m¥rx2 îYrx-mC @disabledpcie@fe150000*rockchip,rk3588-pcierockchip,rk3568-pcie+T0:@E;JOt)&aclk_mstaclk_slvaclk_dbipclkauxpipe pciPásyspmcmsglegacyerr^o`‚õõõõ�¡°ö¸g÷ lpcie-phy2 "Tððð ð à@ @0 @@þðódbiapbconfig&+ Ypwrpipe@okay Âr )ølegacy-interrupt-controllerÎ^ á'õpcie-ep@fe150000rockchip,rk3588-pcie-epP @ @þ @ @0ódbidbi2apbaddr_spaceatu0:@E;JOt)&aclk_mstaclk_slvaclk_dbipclkauxpipe�á +syspmcmsglegacyerrdma0dma1dma2dma3¡¸g÷ lpcie-phy2 "&+ Ypwrpipe @disabledpcie@fe160000*rockchip,rk3588-pcierockchip,rk3568-pcie+T0:AF<KPu)&aclk_mstaclk_slvaclk_dbipclkauxpipe pciPáÿþsyspmcmsglegacyerr^o`‚ùùùù�¡°ö¸g÷ lpcie-phy2 "Tñññ ñ à@ @@0 @@@þñódbiapbconfig', Ypwrpipe @disabledlegacy-interrupt-controllerÎ^ áÿ'ùpcie@fe170000*rockchip,rk3588-pcierockchip,rk3568-pcieT /0:BG=LQ¯)&aclk_mstaclk_slvaclk_dbipclkauxpipe pciPáóòñðïsyspmcmsglegacyerr^o`‚úúúú�¡° p ¸gû lpcie-phy2 "Tòòò ò à@ €@0 @€@þòódbiapbconfig(- Ypwrpipe+@okay Âr )ülegacy-interrupt-controllerÎ^ áð'úethernet@fe1b0000&rockchip,rk3588-gmacsnps,dwmac-4.20aþ áãâmacirqeth_wake_irq(:67X]40&stmmacethclk_mac_refpclk_macaclk_macptp_ref2 !# Ystmmaceth{iã,ôýþ(ÿ;@okay 9output F Qrgmii-rxid’defaultˆ Z cCmdiosnps,dwmac-mdio+ethernet-phy@1ethernet-phy-id001c.c916’defaultˆ lN  |†  Âr 'stmmac-axi-configDN^'ýrx-queues-confign'þqueue0queue1tx-queues-config„'ÿqueue0queue1sata@fe220000'rockchip,rk3588-dwc-ahcisnps,dwc-ahciþ"á(:c`fUp&satapmaliverxoobrefasicš+ @disabledsata-port@0¬@gû lsata-phy¹ È phy@fed90000rockchip,rk3588-usbdp-phyþÙe:¡mW&refclkimmortalpclkutmi(Yinitcmnlanepcs_apbpma_apb P cå t  Šç @disabled'ôphy@fee10000rockchip,rk3588-naneng-combphyþá:©wW &refapbpipeA©Qõáe=DYphyapb š, ¬ @okay'ûphy@fee80000rockchip,rk3588-pcie3-phyþèe:y&pclkHYphy š, Ž @okay'÷opp-table-cluster0operating-points-v2 Ÿ' opp-1008000000 ª<Ü ± L¸ L¸~ð ¿œ@opp-1200000000 ªG†Œ ± ß4 ß4~ð ¿œ@opp-1416000000 ªTfr ± ¢„ ¢„~ð ¿œ@ Ðopp-1608000000 ª_Ø" ± øP øP~ð ¿œ@opp-1800000000 ªkIÒ ±~ð~ð~ð ¿œ@opp-table-cluster1operating-points-v2 Ÿ'opp-1200000000 ªG†Œ ± L¸ L¸B@ ¿œ@opp-1416000000 ªTfr ±  B@ ¿œ@opp-1608000000 ª_Ø" ± ¢„ ¢„B@ ¿œ@opp-1800000000 ªkIÒ ± øP øPB@ ¿œ@opp-2016000000 ªx)¸ ±HHB@ ¿œ@opp-2208000000 ªƒ›h ±llB@ ¿œ@opp-2400000000 ª�  ±B@B@B@ ¿œ@opp-table-cluster2operating-points-v2 Ÿ'opp-1200000000 ªG†Œ ± L¸ L¸B@ ¿œ@opp-1416000000 ªTfr ±  B@ ¿œ@opp-1608000000 ª_Ø" ± ¢„ ¢„B@ ¿œ@opp-1800000000 ªkIÒ ± øP øPB@ ¿œ@opp-2016000000 ªx)¸ ±HHB@ ¿œ@opp-2208000000 ªƒ›h ±llB@ ¿œ@opp-2400000000 ª�  ±B@B@B@ ¿œ@opp-tableoperating-points-v2'!opp-300000000 ªá£ ± L¸ L¸ øPopp-400000000 ªׄ ± L¸ L¸ øPopp-500000000 ªÍe ± L¸ L¸ øPopp-600000000 ª#ÃF ± L¸ L¸ øPopp-700000000 ª)¹' ± ®` ®` øPopp-800000000 ª/¯ ± q° q° øPopp-900000000 ª5¤é ± 5 5 øPopp-1000000000 ª;šÊ ± øP øP øPchosen Üserial2:1500000n8adc-keys-0 adc-keys è  ôbuttons w@ dbutton-maskrom -Mask Rom 3� >‰adc-keys-1 adc-keys è  ôbuttons w@ dbutton-volume-up -V+/REC 3s >E�button-volume-down -V- 3r >V˜button-menu -MENU 3‹ > ˜button-esc -ESC 3 >Ô*audio-amplifier-headphonesimple-audio-amplifier X  eHeadphones Amp'audio-amplifier-speakersimple-audio-amplifier X  eSpeaker Amp'leds gpio-leds’defaultˆled-1 w  indicator Èsoundsimple-audio-card’defaultˆ }Analog ” ¯i2s È â "^AMicrophoneOnboard MicrophoneMicrophoneMicrophone JackSpeakerSpeakerHeadphoneHeadphonesr[HeadphonesLOUT1HeadphonesROUT1SpeakerLOUT2SpeakerROUT2HeadphonesHeadphones Amp OUTLHeadphonesHeadphones Amp OUTRHeadphones Amp INLLOUT1Headphones Amp INRROUT1SpeakerSpeaker Amp OUTLSpeakerSpeaker Amp OUTRSpeaker Amp INLLOUT2Speaker Amp INRROUT2LINPUT1Microphone JackRINPUT1Microphone JackLINPUT2Onboard MicrophoneRINPUT2Onboard Microphonesimple-audio-card,cpuu»€'simple-audio-card,codecu»€vcc12v-dcin-regulatorregulator-fixed )vcc12v_dcin 8 L z· ’·'vcc3v3-bt-regulatorregulator-fixed– È )vcc3v3_bt z2Z  ’2Z ©ÃPºÝvcc3v3-pcie30-regulatorregulator-fixed– È )vcc3v3_pcie30 z2Z  ’2Z ©ˆº'øvcc3v3-wf-regulatorregulator-fixed– È  )vcc3v3_wf z2Z  ’2Z ©ÃPºÝ'üvcc4v0-sys-regulatorregulator-fixed )vcc4v0_sys 8 L z=  ’= º'°vcc5v0-host-regulatorregulator-fixed– ûr’defaultˆ )vcc5v0_host 8 L zLK@ ’LK@º'+vcc5v0-usb-regulatorregulator-fixed )vcc5v0_usb 8 L zLK@ ’LK@º' compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3spi4ethernet0mmc0mmc1cpudevice_typeregenable-methodcapacity-dmips-mhzclocksassigned-clocksassigned-clock-ratescpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachedynamic-power-coefficient#cooling-cellsoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedportsarm,smc-idshmem#clock-cells#reset-cellsinterruptsclock-frequencyclock-output-namesinterrupt-namesrangesclock-namespower-domainsstatusmali-supplysram-supplydr_modephysphy-namesphy_typeresetssnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,dis-u2-freeclk-exists-quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirksnps,dis_rxdet_inp3_quirk#iommu-cellsreset-names#phy-cellsphy-supplyrockchip,grfpinctrl-0pinctrl-namesdmasdma-namesreg-shiftreg-io-width#pwm-cells#power-domain-cellspm_qosiommusreg-namesrockchip,vop-grfrockchip,vo1-grfrockchip,pmuassigned-clock-parents#sound-dai-cellsbus-range#interrupt-cellsinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapnum-lanesreset-gpiosinterrupt-controllerrockchip,php-grfsnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,wr_osr_lmtsnps,rd_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useports-implementedhba-port-capsnps,rx-ts-maxsnps,tx-ts-maxfifo-depthmax-frequencybus-widthcap-sd-highspeedcd-gpiosdisable-wpno-sdiono-mmcsd-uhs-sdr104vmmc-supplyvqmmc-supplyno-sdnon-removablemmc-hs400-1_8vmmc-hs400-enhanced-stroberockchip,trcm-sync-tx-onlymbi-aliasmbi-rangesmsi-controller#msi-cellsaffinityarm,pl330-periph-burst#dma-cellswakeup-sourcenum-cs#gpio-cellsgpio-controllerspi-max-frequencysystem-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvcc13-supplyvcc14-supplyvcca-supplypinsfunctionregulator-nameregulator-always-onregulator-boot-onregulator-enable-ramp-delayregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-coupled-withregulator-coupled-max-spreadregulator-off-in-suspendregulator-suspend-microvoltregulator-on-in-suspendpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polaritypinctrl-1#thermal-sensor-cells#io-channel-cellsvref-supplyAVDD-supplyDVDD-supplyHPVDD-supplybitsrockchip,u2phy-grfrockchip,usb-grfrockchip,usbdpphy-grfrockchip,vo-grfrockchip,pipe-grfrockchip,pipe-phy-grfgpio-rangesbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsvpcie3v3-supplyclock_in_outphy-handlephy-moderx_delaytx_delayreset-assert-usreset-deassert-usrockchip,phy-grfopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallabellinux,codepress-threshold-microvoltenable-gpiossound-name-prefixcolorsimple-audio-card,namesimple-audio-card,aux-devssimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,hp-det-gpiosimple-audio-card,bitclock-mastersimple-audio-card,frame-mastersimple-audio-card,widgetssimple-audio-card,routingsound-daisystem-clock-frequencyenable-active-highstartup-delay-usvin-supply