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@disabledserial@febc0000&rockchip,rk3588-uartsnps,dw-apb-uartþ¼áT:˧&baudclkapb_pclkoo o ttxrxœÎ¦defaultˆ~ @disabledpwm@febd0000(rockchip,rk3588-pwmrockchip,rk3328-pwmþ½:LK &pwmpclkœÏ¦default• @disabledpwm@febd0010(rockchip,rk3588-pwmrockchip,rk3328-pwmþ½:LK &pwmpclkœÐ¦default• @disabledpwm@febd0020(rockchip,rk3588-pwmrockchip,rk3328-pwmþ½ :LK &pwmpclkœÑ¦default• @disabledpwm@febd0030(rockchip,rk3588-pwmrockchip,rk3328-pwmþ½0:LK &pwmpclkœÒ¦default• @disabledpwm@febe0000(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¾:ON &pwmpclkœÓ¦default• @disabledpwm@febe0010(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¾:ON &pwmpclkœÔ¦default• @disabledpwm@febe0020(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¾ :ON &pwmpclkœÕ¦default• @disabledpwm@febe0030(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¾0:ON &pwmpclkœÖ¦default• @disabledpwm@febf0000(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¿:RQ &pwmpclkœ×¦default• @disabledpwm@febf0010(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¿:RQ &pwmpclkœØ¦default• @disabledpwm@febf0020(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¿ :RQ &pwmpclkœÙ¦default• @disabledpwm@febf0030(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¿0:RQ &pwmpclkœÚ¦default• @disabledthermal-zonespackage-thermal � £è ±Ûtripspackage-crit ÁÁ8 Í criticalpackage-fan0 ÍÐ Áê`active'Ýcooling-mapsmap0 ØÜÿÿÿÿ çÝbigcore0-thermal �d £ ±Ûtripsbigcore0-alert ÁL ÍÐpassive'Þbigcore0-crit ÁÁ8 Í criticalcooling-mapsmap0 çÞ Øÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿbigcore2-thermal �d £ ±Ûtripsbigcore2-alert ÁL ÍÐpassive'ßbigcore2-crit ÁÁ8 Í criticalcooling-mapsmap0 çß Øÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿlittlecore-thermal �d £ ±Ûtripslittlecore-alert ÁL ÍÐpassive'àlittlecore-crit ÁÁ8 Í criticalcooling-mapsmap0 çà0 Øÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿcenter-thermal � £ ±Ûtripscenter-crit ÁÁ8 Í criticalgpu-thermal �d £ ±Ûtripsgpu-alert ÁL ÍÐpassive'ágpu-crit ÁÁ8 Í criticalcooling-mapsmap0 çá Øâÿÿÿÿÿÿÿÿnpu-thermal � £ ±Ûtripsnpu-crit ÁÁ8 Í criticaltsadc@fec00000rockchip,rk3588-tsadcþÀá�:ž�&tsadcapb_pclkAžQ„€sVWmtsadc-apbtsadc ìÔÀ  œã 5ä¦defaultsleep ?@okay'Ûadc@fec10000rockchip,rk3588-saradcþÁᎠU:‘�&saradcapb_pclksU msaradc-apb@okay gåi2c@fec80000(rockchip,rk3588-i2crockchip,rk3399-i2cþÈ:ˆ€ &i2cpclkáCœæ¦default+ @disabledi2c@fec90000(rockchip,rk3588-i2crockchip,rk3399-i2cþÉ:‰� &i2cpclkáDœç¦default+ @disabledi2c@feca0000(rockchip,rk3588-i2crockchip,rk3399-i2cþÊ:Š‚ &i2cpclkáEœè¦default+@okayì€usb-typec@22 fcs,fusb302" éá¦defaultœê sëconnectorusb-c-connector dual ‰USB-C �B@ ¡dual ¬�d ¶‘, Âsourceports+port@0endpoint6ì'%port@1endpoint6í'ùport@2endpoint6î'úrtc@51 nxp,pcf8563Q ˆá¦defaultœï Ñspi@fecb0000(rockchip,rk3588-spirockchip,rk3066-spiþËáJ:›–&spiclkapb_pclkoo ottxrx ) œðñò¦default+ @disabledefuse@fecc0000rockchip,rk3588-otpþÌ :Œ‹��&otpapb_pclkphyarbs§¦¨ motpapbarb+cpu-code@2id@7cpu-leakage@17cpu-leakage@18cpu-leakage@19log-leakage@1agpu-leakage@1bcpu-version@1c ßnpu-leakage@28(codec-leakage@29)dma-controller@fed10000arm,pl330arm,primecellþÑ@ áZ[ :p &apb_pclk 'ophy@fed60000rockchip,rk3588-hdptx-phyþÖ : T&refapby8s#cde!""mphyapbinitcmnlaneroplllcpll�ó @disabledphy@fed80000rockchip,rk3588-usbdp-phyþØy:¡lVô&refclkimmortalpclkutmi(s   minitcmnlanepcs_apbpma_apb äõ ÷ö ÷ ø@okay . : Mé [é'$port+endpoint@06ù'íendpoint@16ú'îphy@fee00000rockchip,rk3588-naneng-combphyþà:¨vW &refapbpipeA¨Qõáys<Cmphyapb i- {û@okay'tphy@fee20000rockchip,rk3588-naneng-combphyþâ:ªxW &refapbpipeAªQõáys>Emphyapb i- {ü@okay'*sram@ff001000 mmio-sramÿðÿð+pinctrlrockchip,rk3588-pinctrl�ý+'þgpio@fd8a0000rockchip,gpio-bankýŠá:qr < ‘þ ‘ 0-'ˆgpio@fec20000rockchip,gpio-bankþÂá:st < ‘þ ‘ 0-'vgpio@fec30000rockchip,gpio-bankþÃá:uv < ‘þ@ ‘ 0-gpio@fec40000rockchip,gpio-bankþÄá:wx < ‘þ` ‘ 0-'ƒgpio@fec50000rockchip,gpio-bankþÅá:yz < ‘þ€ ‘ 0-'épcfg-pull-up �'pcfg-pull-down ª'pcfg-pull-none ¹'ÿpcfg-pull-none-drv-level-2 ¹ Æ'pcfg-pull-up-drv-level-1 � Æ'pcfg-pull-up-drv-level-2 � Æ'pcfg-pull-none-smt ¹ Õ'auddsmbt1120can0can1can2cifclk32kcpuddrphych0ddrphych1ddrphych2ddrphych3dp0dp1emmcemmc-rstnout êÿ'Œemmc-bus8€ ê'�emmc-clk ê'Žemmc-cmd ê'�emmc-data-strobe ê'�eth1fspigmac1gmac1-miim êÿÿ'}gmac1-clkinout êÿ'‚gmac1-rx-bus20 êÿÿ ÿ'gmac1-tx-bus20 ê ÿ ÿ ÿ'~gmac1-rgmii-clk êÿÿ'€gmac1-rgmii-bus@ êÿÿÿÿ'�gpuhdmii2c0i2c0m2-xfer ê'.i2c1i2c1m0-xfer ê  '¯i2c2i2c2m0-xfer ê  '°i2c3i2c3m0-xfer ê  '±i2c4i2c4m0-xfer ê  '²i2c5i2c5m0-xfer ê  '³i2c6i2c6m0-xfer ê  'æi2c7i2c7m0-xfer ê  'çi2c8i2c8m2-xfer ê  'èi2s0i2s0-lrck êÿ'’i2s0-sclk êÿ'“i2s0-sdi0 êÿ'”i2s0-sdi1 êÿ'•i2s0-sdi2 êÿ'–i2s0-sdi3 êÿ'—i2s0-sdo0 êÿ'˜i2s0-sdo1 êÿ'™i2s0-sdo2 êÿ'ši2s0-sdo3 êÿ'›i2s1i2s1m0-lrck êÿ'œi2s1m0-sclk êÿ'�i2s1m0-sdi0 êÿ'ži2s1m0-sdi1 êÿ'Ÿi2s1m0-sdi2 êÿ' i2s1m0-sdi3 êÿ'¡i2s1m0-sdo0 ê ÿ'¢i2s1m0-sdo1 ê ÿ'£i2s1m0-sdo2 ê ÿ'¤i2s1m0-sdo3 ê ÿ'¥i2s2i2s2m1-lrck êÿ'§i2s2m1-sclk ê ÿ'¨i2s2m1-sdi ê ÿ'©i2s2m1-sdo ê ÿ'ªi2s3i2s3-lrck êÿ'«i2s3-sclk êÿ'¬i2s3-sdi êÿ'­i2s3-sdo êÿ'®jtaglitcpumcumipinpupcie20x1pcie30phypcie30x1pcie30x2pcie30x4pdm0pdm1pmicpmic-pinsp êÿÿÿÿÿÿ'¼pmupwm0pwm0m2-pins ê ÿ'2pwm1pwm1m0-pins êÿ'3pwm2pwm2m0-pins êÿ'4pwm3pwm3m0-pins êÿ'5pwm4pwm4m0-pins ê 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rtcpcf8563-int êÿ'ïusbusb2-host-pwren êÿ'usb3-host-pwren êÿ'usb3-typec-pwren êÿ'usbc0-int êÿ'êopp-table-cluster0operating-points-v2 ø' opp-1008000000 <Ü L¸ L¸~ð œ@opp-1200000000 G†Œ ß4 ß4~ð œ@opp-1416000000 Tfr ¢„ ¢„~ð œ@ )opp-1608000000 _Ø" øP øP~ð œ@opp-1800000000 kIÒ ~ð~ð~ð œ@opp-table-cluster1operating-points-v2 ø'opp-1200000000 G†Œ L¸ L¸B@ œ@opp-1416000000 Tfr  B@ œ@opp-1608000000 _Ø" ¢„ ¢„B@ œ@opp-1800000000 kIÒ øP øPB@ œ@opp-2016000000 x)¸ HHB@ œ@opp-2208000000 ƒ›h llB@ œ@opp-2400000000 �  B@B@B@ œ@opp-table-cluster2operating-points-v2 ø'opp-1200000000 G†Œ L¸ L¸B@ œ@opp-1416000000 Tfr  B@ œ@opp-1608000000 _Ø" ¢„ ¢„B@ œ@opp-1800000000 kIÒ øP øPB@ œ@opp-2016000000 x)¸ HHB@ œ@opp-2208000000 ƒ›h llB@ œ@opp-2400000000 �  B@B@B@ œ@opp-tableoperating-points-v2'!opp-300000000 ᣠL¸ L¸ øPopp-400000000 ׄ L¸ L¸ øPopp-500000000 Íe L¸ L¸ øPopp-600000000 #ÃF L¸ L¸ øPopp-700000000 )¹' ®` ®` øPopp-800000000 /¯ q° q° øPopp-900000000 5¤é 5 5 øPopp-1000000000 ;šÊ øP øP øPchosen 5serial2:1500000n8leds gpio-leds¦defaultœled-0 A Gon 4power ¬v  Udefault-onled-1 A Gon 4heartbeat ¬v  Uheartbeatpwm-fanpwm-fanù kÀàÿ z … VÎ'Üregulator-1v1-vcc-nldo-s3regulator-fixedÑvcc_1v1_nldo_s3àôÈàÈàK/'Áregulator-3v3-vcc-lcdregulator-fixed Š ¬é¦defaultœ  Ñvcc3v3_lcd2Z 2Z K‰regulator-3v3-vcc-pcieregulator-fixed Š ¬ˆ¦defaultœ  Ñvcc3v3_pcie2Z 2Z K‰'wregulator-3v3-vcc-s0regulator-fixed Ñvcc_3v3_s0àô2Z 2Z K‰'|regulator-4v0-vcc-sysregulator-fixed Ñvcc4v0_sysàôI>I>K '/regulator-5v0-vcc-sysregulator-fixed Š ¬ˆ¦defaultœ  Ñvcc5v0_sysàôLK@LK@K 'regulator-5v0-vcc-usb2-hostregulator-fixed Š ¬v¦defaultœÑvcc5v0_usb2_hostLK@LK@K'+regulator-5v0-vcc-usb3-hostregulator-fixed Š ¬v¦defaultœÑvcc5v0_usb3_hostLK@LK@K',regulator-5v0-vcc-usb3-typecregulator-fixed Š ¬ˆ¦defaultœÑvcc5v0_usb3_typecLK@LK@K'ëregulator-5v0-vccaregulator-fixedÑvccaàôLK@LK@K 'Âregulator-12v0-vcc-dcinregulator-fixed Ñvcc12v_dcinàô··'  compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3spi4ethernet0mmc0mmc1cpudevice_typeregenable-methodcapacity-dmips-mhzclocksassigned-clocksassigned-clock-ratescpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachedynamic-power-coefficient#cooling-cellsoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedportsarm,smc-idshmem#clock-cells#reset-cellsinterruptsclock-frequencyclock-output-namesinterrupt-namesrangesclock-namespower-domainsstatusmali-supplydr_modephysphy-namesphy_typeresetssnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,dis-u2-freeclk-exists-quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirkusb-role-switchremote-endpointsnps,dis_rxdet_inp3_quirk#iommu-cellsreset-names#phy-cellsphy-supplyrockchip,grfpinctrl-0pinctrl-namesfcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspenddmasdma-namesreg-shiftreg-io-width#pwm-cells#power-domain-cellspm_qosiommusreg-namesrockchip,vop-grfrockchip,vo1-grfrockchip,pmuassigned-clock-parents#sound-dai-cellsbus-range#interrupt-cellsinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapnum-lanesinterrupt-controllerreset-gpiosvpcie3v3-supplyrockchip,php-grfsnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsoclock_in_outphy-handlephy-modereset-assert-usreset-deassert-ussnps,blensnps,wr_osr_lmtsnps,rd_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useports-implementedhba-port-capsnps,rx-ts-maxsnps,tx-ts-maxfifo-depthmax-frequencybus-widthcap-sd-highspeedcd-gpiosdisable-wpno-mmcno-sdiosd-uhs-sdr104vmmc-supplyvqmmc-supplymmc-hs400-1_8vmmc-hs400-enhanced-strobeno-sdnon-removablerockchip,trcm-sync-tx-onlymbi-aliasmbi-rangesmsi-controller#msi-cellsaffinityarm,pl330-periph-burst#dma-cellsnum-cs#gpio-cellsgpio-controllerspi-max-frequencysystem-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvcc13-supplyvcc14-supplyvcca-supplypinsfunctionregulator-enable-ramp-delayregulator-suspend-microvoltregulator-on-in-suspendpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresiscooling-devicetriprockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polaritypinctrl-1#thermal-sensor-cells#io-channel-cellsvref-supplyvbus-supplydata-rolelabelop-sink-microwattpower-rolesink-pdossource-pdostry-power-rolewakeup-sourcebitsrockchip,u2phy-grfrockchip,usb-grfrockchip,usbdpphy-grfrockchip,vo-grfmode-switchorientation-switchsbu1-dc-gpiossbu2-dc-gpiosrockchip,pipe-grfrockchip,pipe-phy-grfgpio-rangesbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendstdout-pathcolordefault-statelinux,default-triggercooling-levelsfan-supplypwmsenable-active-high