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Htxrxp½zdefault\R@okayserial@feb60000&rockchip,rk3588-uartsnps,dw-apb-uartþ¶áN:³¡&baudclkapb_pclkC- - Htxrxp¾zdefault\R @disabledserial@feb70000&rockchip,rk3588-uartsnps,dw-apb-uartþ·áO:·¢&baudclkapb_pclkC� � Htxrxp¿zdefault\R @disabledserial@feb80000&rockchip,rk3588-uartsnps,dw-apb-uartþ¸áP:»£&baudclkapb_pclkC� � HtxrxpÀzdefault\R @disabledserial@feb90000&rockchip,rk3588-uartsnps,dw-apb-uartþ¹áQ:¿¤&baudclkapb_pclkC� �HtxrxpÁzdefault\R @disabledserial@feba0000&rockchip,rk3588-uartsnps,dw-apb-uartþºáR:Ã¥&baudclkapb_pclkCllHtxrxpÂzdefault\R @disabledserial@febb0000&rockchip,rk3588-uartsnps,dw-apb-uartþ»áS:Ǧ&baudclkapb_pclkCl l HtxrxpÃzdefault\R @disabledserial@febc0000&rockchip,rk3588-uartsnps,dw-apb-uartþ¼áT:˧&baudclkapb_pclkCl l HtxrxpÄzdefault\R @disabledpwm@febd0000(rockchip,rk3588-pwmrockchip,rk3328-pwmþ½:LK &pwmpclkpÅzdefaulti @disabledpwm@febd0010(rockchip,rk3588-pwmrockchip,rk3328-pwmþ½:LK &pwmpclkpÆzdefaulti @disabledpwm@febd0020(rockchip,rk3588-pwmrockchip,rk3328-pwmþ½ :LK &pwmpclkpÇzdefaulti @disabledpwm@febd0030(rockchip,rk3588-pwmrockchip,rk3328-pwmþ½0:LK &pwmpclkpÈzdefaulti @disabledpwm@febe0000(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¾:ON &pwmpclkpÉzdefaulti @disabledpwm@febe0010(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¾:ON &pwmpclkpÊzdefaulti @disabledpwm@febe0020(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¾ :ON &pwmpclkpËzdefaulti @disabledpwm@febe0030(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¾0:ON &pwmpclkpÌzdefaulti @disabledpwm@febf0000(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¿:RQ &pwmpclkpÍzdefaulti @disabledpwm@febf0010(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¿:RQ &pwmpclkpÎzdefaulti @disabledpwm@febf0020(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¿ :RQ &pwmpclkpÏzdefaulti @disabledpwm@febf0030(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¿0:RQ &pwmpclkpÐzdefaulti @disabledthermal-zonespackage-thermal » Ñ ßÑtripspackage-crit ïÁ8 û criticalbigcore0-thermal »d Ñ ßÑtripsbigcore0-alert ïL ûÐpassive'Òbigcore0-crit ïÁ8 û criticalcooling-mapsmap0 Ò ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿbigcore2-thermal »d Ñ ßÑtripsbigcore2-alert ïL ûÐpassive'Óbigcore2-crit ïÁ8 û criticalcooling-mapsmap0 Ó ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿlittlecore-thermal »d Ñ ßÑtripslittlecore-alert ïL ûÐpassive'Ôlittlecore-crit ïÁ8 û criticalcooling-mapsmap0 Ô0 ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿcenter-thermal » Ñ ßÑtripscenter-crit ïÁ8 û criticalgpu-thermal »d Ñ ßÑtripsgpu-alert ïL ûÐpassive'Õgpu-crit ïÁ8 û criticalcooling-mapsmap0 Õ Öÿÿÿÿÿÿÿÿnpu-thermal » Ñ ßÑtripsnpu-crit ïÁ8 û criticaltsadc@fec00000rockchip,rk3588-tsadcþÀá�:ž�&tsadcapb_pclkAžQ„€gVWAtsadc-apbtsadc ÔÀ 1 Hp× cØzdefaultsleep m@okay'Ñadc@fec10000rockchip,rk3588-saradcþÁᎠƒ:‘�&saradcapb_pclkgU Asaradc-apb@okay •Ùi2c@fec80000(rockchip,rk3588-i2crockchip,rk3399-i2cþÈ:ˆ€ &i2cpclkáCpÚzdefault+ @disabledi2c@fec90000(rockchip,rk3588-i2crockchip,rk3399-i2cþÉ:‰� &i2cpclkáDpÛzdefault+@okayaudio-codec@11everest,es8316:1&mclkA1Q»€æportendpointöÜ'’i2c@feca0000(rockchip,rk3588-i2crockchip,rk3399-i2cþÊ:Š‚ &i2cpclkáEpÝzdefault+ @disabledspi@fecb0000(rockchip,rk3588-spirockchip,rk3066-spiþËáJ:›–&spiclkapb_pclkCl lHtxrx i pÞßàzdefault+ @disabledefuse@fecc0000rockchip,rk3588-otpþÌ :Œ‹��&otpapb_pclkphyarbg§¦¨ Aotpapbarb+cpu-code@2id@7cpu-leakage@17cpu-leakage@18cpu-leakage@19log-leakage@1agpu-leakage@1bcpu-version@1c ¡npu-leakage@28(codec-leakage@29)dma-controller@fed10000arm,pl330arm,primecellþÑ@ áZ[ >:p &apb_pclk U'lphy@fed60000rockchip,rk3588-hdptx-phyþÖ : T&refapbM8g#cde!""Aphyapbinitcmnlaneroplllcpllcá @disabledphy@fed80000rockchip,rk3588-usbdp-phyþØM:¡lVâ&refclkimmortalpclkutmi(g   Ainitcmnlanepcs_apbpma_apb ¦ã ¹ä Êå àæ@okay ð'#phy@fee00000rockchip,rk3588-naneng-combphyþà:¨vW &refapbpipeA¨QõáMg<CAphyapb * ç@okay'qphy@fee20000rockchip,rk3588-naneng-combphyþâ:ªxW &refapbpipeAªQõáMg>EAphyapb * è@okay'(sram@ff001000 mmio-sramÿðÿð+pinctrlrockchip,rk3588-pinctrlcé+'êgpio@fd8a0000rockchip,gpio-bankýŠá:qr A -ê e Q'„gpio@fec20000rockchip,gpio-bankþÂá:st A -ê e Qgpio@fec30000rockchip,gpio-bankþÃá:uv A -ê@ e Qgpio@fec40000rockchip,gpio-bankþÄá:wx A -ê` e Q'sgpio@fec50000rockchip,gpio-bankþÅá:yz A -ê€ e Q'÷pcfg-pull-up 9'ïpcfg-pull-down F'ípcfg-pull-none U'ëpcfg-pull-none-drv-level-2 U b'ñpcfg-pull-up-drv-level-1 9 b'ðpcfg-pull-up-drv-level-2 9 b'ìpcfg-pull-none-smt U q'îauddsmbt1120can0can1can2cifclk32kcpuddrphych0ddrphych1ddrphych2ddrphych3dp0dp1emmcemmc-rstnout †ë'ˆemmc-bus8€ †ìììììììì'‰emmc-clk †ì'Šemmc-cmd †ì'‹emmc-data-strobe †í'Œeth1fspifspim0-pins` †ìììììì'gmac1gmac1-miim †ëë'ygmac1-rx-bus20 †ëë ë'{gmac1-tx-bus20 † ë ë ë'zgmac1-rgmii-clk †ëë'|gmac1-rgmii-bus@ †ëëëë'}gpuhdmii2c0i2c0m2-xfer †îî'+i2c1i2c1m0-xfer † î î'¦i2c2i2c2m0-xfer † î î'§i2c3i2c3m0-xfer † î î'¨i2c4i2c4m0-xfer † î î'©i2c5i2c5m2-xfer † î î'ªi2c6i2c6m0-xfer † î î'Úi2c7i2c7m0-xfer † î î'Ûi2c8i2c8m0-xfer † î î'Ýi2s0i2s0-lrck †ë'�i2s0-mclk †ë'Ži2s0-sclk †ë'�i2s0-sdi0 †ë'�i2s0-sdo0 †ë'‘i2s1i2s1m0-lrck †ë'“i2s1m0-sclk †ë'”i2s1m0-sdi0 †ë'•i2s1m0-sdi1 †ë'–i2s1m0-sdi2 †ë'—i2s1m0-sdi3 †ë'˜i2s1m0-sdo0 † ë'™i2s1m0-sdo1 † ë'ši2s1m0-sdo2 † ë'›i2s1m0-sdo3 † ë'œi2s2i2s2m1-lrck †ë'ži2s2m1-sclk † ë'Ÿi2s2m1-sdi † ë' i2s2m1-sdo † ë'¡i2s3i2s3-lrck †ë'¢i2s3-sclk †ë'£i2s3-sdi †ë'¤i2s3-sdo †ë'¥jtaglitcpumcumipinpupcie20x1pcie20x1m0-pins0 †ëëë'rpcie30phypcie30x1pcie30x2pcie30x4pdm0pdm1pmicpmic-pinsp †ïëëëëëë'³pmupwm0pwm0m0-pins †ë'/pwm1pwm1m0-pins †ë'0pwm2pwm2m0-pins †ë'1pwm3pwm3m1-pins † ë'2pwm4pwm4m0-pins † ë'Åpwm5pwm5m0-pins † ë'Æpwm6pwm6m0-pins † ë'Çpwm7pwm7m0-pins † ë'Èpwm8pwm8m0-pins † ë'Épwm9pwm9m0-pins † ë'Êpwm10pwm10m0-pins † ë'Ëpwm11pwm11m0-pins † ë'Ìpwm12pwm12m0-pins † ë'Ípwm13pwm13m0-pins † ë'Îpwm14pwm14m0-pins † ë'Ïpwm15pwm15m0-pins † ë'Ðrefclksatasata0sata1sata2sdiosdiom1-pins` †ëïïïïï'‡sdmmcsdmmc-bus4@ †ìììì'ƒsdmmc-clk †ì'€sdmmc-cmd †ì'�sdmmc-det †ï'‚spdif0spdif1spi0spi0m0-pins0 †ððð'­spi0m0-cs0 †ð'«spi0m0-cs1 †ð'¬spi1spi1m1-pins0 †ððð'°spi1m1-cs0 †ð'®spi1m1-cs1 †ð'¯spi2spi2m2-pins0 †ð ðð'²spi2m2-cs0 † ð'±spi3spi3m1-pins0 †ð ðð'»spi3m1-cs0 †ð'¹spi3m1-cs1 †ð'ºspi4spi4m0-pins0 †ððð'àspi4m0-cs0 †ð'Þspi4m0-cs1 †ð'ßtsadctsadc-shut-org †ë'×uart0uart0m1-xfer †ï ï'.uart1uart1m1-xfer † ï ï'¼uart2uart2m0-xfer † ï ï'½uart3uart3m1-xfer † ï ï'¾uart4uart4m1-xfer † ï ï'¿uart5uart5m1-xfer † ï ï'Àuart6uart6m1-xfer † ï ï'Áuart7uart7m1-xfer † ï ï'Âuart8uart8m1-xfer † ï ï'Ãuart9uart9m1-xfer † ï ï'Ävopbt656gpio-functsadc-gpio-func †ë'Øledsio-led †ë'ópciepow-en †ë'öpowervcc-5v0-en †ë'úrtl8211frtl8211f-rst †ë'~usbvcc5v0-host-en † ë'øopp-table-cluster0operating-points-v2 ”' opp-1008000000 Ÿ<Ü ¦ L¸ L¸~ð ´œ@opp-1200000000 ŸG†Œ ¦ ß4 ß4~ð ´œ@opp-1416000000 ŸTfr ¦ ¢„ ¢„~ð ´œ@ Åopp-1608000000 Ÿ_Ø" ¦ øP øP~ð ´œ@opp-1800000000 ŸkIÒ ¦~ð~ð~ð ´œ@opp-table-cluster1operating-points-v2 ”'opp-1200000000 ŸG†Œ ¦ L¸ L¸B@ ´œ@opp-1416000000 ŸTfr ¦  B@ ´œ@opp-1608000000 Ÿ_Ø" ¦ ¢„ ¢„B@ ´œ@opp-1800000000 ŸkIÒ ¦ øP øPB@ ´œ@opp-2016000000 Ÿx)¸ ¦HHB@ ´œ@opp-2208000000 Ÿƒ›h ¦llB@ ´œ@opp-2400000000 Ÿ�  ¦B@B@B@ ´œ@opp-table-cluster2operating-points-v2 ”'opp-1200000000 ŸG†Œ ¦ L¸ L¸B@ ´œ@opp-1416000000 ŸTfr ¦  B@ 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F÷zdefaultpú,'ôvcc-1v1-nldo-s3-regulatorregulator-fixed¥vcc_1v1_nldo_s3´ÈÚÈàòÈà,'¸ compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3spi4ethernet0mmc0mmc1cpudevice_typeregenable-methodcapacity-dmips-mhzclocksassigned-clocksassigned-clock-ratescpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachedynamic-power-coefficient#cooling-cellsoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedportsarm,smc-idshmem#clock-cells#reset-cellsinterruptsclock-frequencyclock-output-namesinterrupt-namesrangesclock-namespower-domainsstatusdr_modephysphy-namesphy_typeresetssnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,dis-u2-freeclk-exists-quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirksnps,dis_rxdet_inp3_quirk#iommu-cellsreset-names#phy-cellsphy-supplyrockchip,grfpinctrl-0pinctrl-namesfcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspenddmasdma-namesreg-shiftreg-io-width#pwm-cells#power-domain-cellspm_qosiommusreg-namesrockchip,vop-grfrockchip,vo1-grfrockchip,pmuassigned-clock-parents#sound-dai-cellsbus-range#interrupt-cellsinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapnum-lanesinterrupt-controllerreset-gpiosvpcie3v3-supplyrockchip,php-grfsnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsoclock_in_outphy-handlephy-modetx_delayrx_delayreset-assert-usreset-deassert-ussnps,blensnps,wr_osr_lmtsnps,rd_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useports-implementedhba-port-capsnps,rx-ts-maxsnps,tx-ts-maxspi-max-frequencyspi-rx-bus-widthspi-tx-bus-widthfifo-depthcap-mmc-highspeedcap-sd-highspeedcd-gpiosdisable-wpno-sdiono-mmcsd-uhs-sdr104vmmc-supplyvqmmc-supplyno-sdnon-removablemmc-hs400-1_8vmmc-hs400-enhanced-stroberockchip,trcm-sync-tx-onlydai-formatmclk-fsremote-endpointmbi-aliasmbi-rangesmsi-controller#msi-cellsaffinityarm,pl330-periph-burst#dma-cellspagesizenum-cssystem-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvcc13-supplyvcc14-supplyvcca-supplygpio-controller#gpio-cellspinsfunctionregulator-enable-ramp-delayregulator-suspend-microvoltregulator-on-in-suspendpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polaritypinctrl-1#thermal-sensor-cells#io-channel-cellsvref-supplybitsrockchip,u2phy-grfrockchip,usb-grfrockchip,usbdpphy-grfrockchip,vo-grfrockchip,dp-lane-muxrockchip,pipe-grfrockchip,pipe-phy-grfgpio-rangesbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendlabelwidgetsroutingdaisstdout-pathcolorlinux,default-triggercooling-levelsfan-supplypwmsenable-active-highgpio