Ð þíçÞ8ÛØ( Û hugsun,x99rockchip,rk3399 +7Hugsun X99 TV BOXaliases=/ethernet@fe300000G/i2c@ff3c0000L/i2c@ff110000Q/i2c@ff120000V/i2c@ff130000[/i2c@ff3d0000`/i2c@ff140000e/i2c@ff150000j/i2c@ff160000o/i2c@ff3e0000t/serial@ff180000|/serial@ff190000„/serial@ff1a0000Œ/serial@ff1b0000”/serial@ff370000œ/mmc@fe310000¡/mmc@fe320000¦/mmc@fe330000cpus+cpu-mapcluster0core0«core1«core2«core3«cluster1core0«core1«cpu@0¯cpuarm,cortex-a53»¿psciÍåàçöd  4 ?cpu@1¯cpuarm,cortex-a53»¿psciÍåàçöd  4 ?cpu@2¯cpuarm,cortex-a53»¿psciÍåàçöd  4 ?cpu@3¯cpuarm,cortex-a53»¿psciÍåàçöd  4 ?cpu@100¯cpuarm,cortex-a72»¿psciÍà çö´  4?thermal-idleçG'Sôcpu@101¯cpuarm,cortex-a72»¿psciÍà çö´  4?thermal-idleçG'Sôidle-statescpscicpu-sleeparm,idle-statep�˜xSú©„? cluster-sleeparm,idle-statep�˜�Sô©Ð? display-subsystemrockchip,display-subsystemºmemory-controllerrockchip,rk3399-dmcÀÍà¨Üdmc_clk èdisabledpmu_a53arm,cortex-a53-pmuïpmu_a72arm,cortex-a72-pmuïpsci arm,psci-1.0Æsmctimerarm,armv8-timer@ï   úxin24m fixed-clockn6!xin24m4?’pcie@f8000000rockchip,rk3399-pcie »øýAaxi-baseapb-base¯pci+K\h àÅÄG Üaclkaclk-perfhclkpm0ï123rsyslegacyclient‚`•£² º,¿pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-38É‚úúà�ûàûà8Ђƒ„…†�€(×coremgmtmgmt-stickypipepmpclkaclk èdisabledinterrupt-controllerãK?ethernet@fe300000rockchip,rk3399-gmac»þ0ï rmacirq8àighfjÕfMÜstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macøÐ‰ ×stmmacethèokay¦.EinputR]rgmiifdefaultt ~Ž ¤'ÃP¹(Âmmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc»þ1@ï@ËðÑ€ àîMœ�Übiuciuciu-driveciu-sampleÙøÐy×resetèokayäúð€îû "-fdefault t !;+wifi@1brcm,bcm4329-fmac» "ï rhost-wakefdefaultt#mmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc»þ2@ïAËðÑ€ÍI ë àÎLš›Übiuciuciu-driveciu-sampleÙøÐz×resetèokayðÑ€ä^ûp{$fdefaultt%&'(ˆ mmc@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.1»þ3ï šNI ëÂàNðÜclk_xinclk_ahb!emmc_cardclock4º) ¿phy_arasanø°èokayäÁÐ- ?•usb@fe380000 generic-ehci»þ8ïàÈÉ*º+¿usbèokayusb@fe3a0000 generic-ohci»þ:ïàÈÉ*º+¿usbèokayusb@fe3c0000 generic-ehci»þ<ïàÊË,º-¿usbèokayusb@fe3e0000 generic-ohci»þ>ï àÊË,º-¿usbèokaydebug@fe430000&arm,coresight-cpu-debugarm,primecell»þCàM Üapb_pclk«debug@fe432000&arm,coresight-cpu-debugarm,primecell»þC àM Üapb_pclk«debug@fe434000&arm,coresight-cpu-debugarm,primecell»þC@àM Üapb_pclk«debug@fe436000&arm,coresight-cpu-debugarm,primecell»þC`àM Üapb_pclk«debug@fe610000&arm,coresight-cpu-debugarm,primecell»þaàL Üapb_pclk«debug@fe710000&arm,coresight-cpu-debugarm,primecell»þqàL Üapb_pclk«usb@fe800000rockchip,rk3399-dwc3+É0à�ƒöøôùGÜref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clkÐ% ×usb3-otgèokayusb@fe800000 snps,dwc3»þ€ïià�öƒÜrefbus_earlysuspendêhostº./¿usb2-phyusb3-phy òutmi_wideû4Mnøèokayusb@fe900000rockchip,rk3399-dwc3+É0à‚„÷øôùGÜref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clkÐ& ×usb3-otgèokayusb@fe900000 snps,dwc3»þ�ïnà‚÷„Ürefbus_earlysuspendêhostº01¿usb2-phyusb3-phy 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¶criticalcooling-mapsmap0üaÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿmap1übHÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿgpu-thermal±dÇèÕ`tripsgpu_alert0å$øñжpassive?cgpu_critåsñÐ ¶criticalcooling-mapsmap0üc dÿÿÿÿÿÿÿÿtsadc@ff260000rockchip,rk3399-tsadc»ÿ&ïaOI q°àOdÜtsadcapb_pclkÐè ×tsadc-apb­°finitdefaultsleepte'f1e;èokayQh?`qos@ffa58000rockchip,rk3399-qossyscon»ÿ¥€ ?nqos@ffa5c000rockchip,rk3399-qossyscon»ÿ¥À ?oqos@ffa60080rockchip,rk3399-qossyscon»ÿ¦€ qos@ffa60100rockchip,rk3399-qossyscon»ÿ¦ qos@ffa60180rockchip,rk3399-qossyscon»ÿ¦€ qos@ffa70000rockchip,rk3399-qossyscon»ÿ§ ?rqos@ffa70080rockchip,rk3399-qossyscon»ÿ§€ ?sqos@ffa74000rockchip,rk3399-qossyscon»ÿ§@ ?pqos@ffa76000rockchip,rk3399-qossyscon»ÿ§` ?qqos@ffa90000rockchip,rk3399-qossyscon»ÿ© ?tqos@ffa98000rockchip,rk3399-qossyscon»ÿ©€ ?gqos@ffaa0000rockchip,rk3399-qossyscon»ÿª ?uqos@ffaa0080rockchip,rk3399-qossyscon»ÿª€ ?vqos@ffaa8000rockchip,rk3399-qossyscon»ÿª€ ?wqos@ffaa8080rockchip,rk3399-qossyscon»ÿª€€ ?xqos@ffab0000rockchip,rk3399-qossyscon»ÿ« ?hqos@ffab0080rockchip,rk3399-qossyscon»ÿ«€ ?iqos@ffab8000rockchip,rk3399-qossyscon»ÿ«€ ?jqos@ffac0000rockchip,rk3399-qossyscon»ÿ¬ ?kqos@ffac0080rockchip,rk3399-qossyscon»ÿ¬€ ?lqos@ffac8000rockchip,rk3399-qossyscon»ÿ¬€ ?yqos@ffac8080rockchip,rk3399-qossyscon»ÿ¬€€ ?zqos@ffad0000rockchip,rk3399-qossyscon»ÿ­ ?{qos@ffad8080rockchip,rk3399-qossyscon»ÿ­€€ qos@ffae0000rockchip,rk3399-qossyscon»ÿ® ?mpower-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd»ÿ1power-controller!rockchip,rk3399-power-controllerƒ+?power-domain@34»"àáÝ—gƒpower-domain@33»!àÜå—hiƒpower-domain@31»àëê—jƒpower-domain@32» àíì—klƒpower-domain@35»#àЗmƒpower-domain@25»àlƒpower-domain@23»àð—nƒpower-domain@22»àÕf—oƒpower-domain@27»àÎL—pƒpower-domain@28»àî—qƒpower-domain@8»à~}ƒpower-domain@9» à€ƒpower-domain@24»àô—rsƒpower-domain@15»ƒ+power-domain@21»àÞçr—tƒpower-domain@19»àåß—uvƒpower-domain@20»àæà—wxƒpower-domain@16»ƒ+power-domain@17»àÙÙ—yzƒpower-domain@18»àÛÛ—{ƒsyscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd»ÿ2?io-domains&rockchip,rk3399-pmu-io-voltage-domainèokayžFspi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi»ÿ5à||Üspiclkapb_pclkï<fdefaultt}~€+ èdisabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart»ÿ7à||"Übaudclkapb_pclkïf!+fdefaultt� èdisabledi2c@ff3c0000rockchip,rk3399-i2c»ÿ<| I ëÂà| | Üi2cpclkï9fdefaultt‚+èokayò´ €syr827@40silergy,syr827»@ ­fan53555-regtƒ Âvdd_cpu_bÑ ß4éã`è3GY„?regulator-state-memdsyr828@41silergy,syr828»A ­fan53555-regt…Âvdd_gpuÑ ß4éã`è3GY„}?·regulator-state-memdpmic@1brockchip,rk808» †ïfdefaultt‡”µ4!xin32krtc_clko_wifiÄτۄç„ó„ÿ„ E „ #„ 0„ =EƒF?@regulatorsDCDC_REG1 Âvdd_centerÑ » é » q3Gregulator-state-memdDCDC_REG2 Âvdd_cpu_lÑ q°é™pq3G? regulator-state-memdDCDC_REG3Âvcc_ddr3Gregulator-state-mem JDCDC_REG4Âvcc_1v8Ñw@éw@3G?Fregulator-state-mem J bw@LDO_REG1 Âvcc1v8_dvpÑw@éw@3Gregulator-state-mem J bw@LDO_REG2 Âvcca1v8_hdmiÑw@éw@3Gregulator-state-mem J bw@LDO_REG3 Âvcca_1v8Ñw@éw@3Gregulator-state-mem J bw@LDO_REG4Âvcc_sdÑw@é2Z 3G?$regulator-state-mem J b2Z LDO_REG5 Âvcc3v0_sdÑ-ÆÀé-ÆÀ3Gregulator-state-mem J b-ÆÀLDO_REG6Âvcc_1v5Ñã`éã`3Gregulator-state-mem J bã`LDO_REG7 Âvcca0v9_hdmiÑ » é » 3Gregulator-state-mem J b » LDO_REG8Âvcc_3v0Ñ-ÆÀé-ÆÀ3G?“regulator-state-mem J b-ÆÀSWITCH_REG1 Âvcc3v3_s33Gregulator-state-mem JSWITCH_REG2 Âvcc3v3_s03Gregulator-state-mem Ji2c@ff3d0000rockchip,rk3399-i2c»ÿ=| I ëÂà| | Üi2cpclkï8fdefaulttˆ+èokayòX (typec-portc@22 fcs,fusb302»" †ïfdefaultt‰ ~Šèokayi2c@ff3e0000rockchip,rk3399-i2c»ÿ>| I ëÂà| | Üi2cpclkï:fdefaultt‹+ èdisabledpwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwm»ÿB ŠfdefaulttŒà| èdisabledpwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwm»ÿB Šfdefaultt�à| èdisabledpwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwm»ÿB  ŠfdefaulttŽà|èokay?Åpwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwm»ÿB0 Šfdefaultt�à| èdisableddfi@ff630000»ÿc@rockchip,rk3399-dfiÀïƒày Üpclk_ddr_mon èdisabled?video-codec@ff650000rockchip,rk3399-vpu»ÿe ïrq rvepuvdpuàëê Üaclkhclk •�øiommu@ff650800rockchip,iommu»ÿe@ïsàëê Üaclkiface œø?�video-codec@ff660000rockchip,rk3399-vdec»ÿfït àí쟞Üaxiahbcabaccore •‘ø iommu@ff660480rockchip,iommu »ÿf€@ÿfÀ@ïuàíì Üaclkifaceø  œ?‘iommu@ff670800rockchip,iommu»ÿg@ï*àáÝ Üaclkiface œ èdisabledrga@ff680000rockchip,rk3399-rga»ÿhï7àÜåmÜaclkhclksclkÐjgi ×coreaxiahbø!efuse@ff690000rockchip,rk3399-efuse»ÿi€+à} Üpclk_efusecpu-id@7»cpu-leakage@17»gpu-leakage@18»center-leakage@19»cpu-leakage@1a»logic-leakage@1b»wafer-info@1c»dma-controller@ff6d0000arm,pl330arm,primecell»ÿm@ ï © ´àÓ Üapb_pclk?[dma-controller@ff6e0000arm,pl330arm,primecell»ÿn@ ï © ´àÔ Üapb_pclk?Jclock-controller@ff750000rockchip,rk3399-pmucru»ÿuà’Üxin24m4 Ë|I(Jñ?|clock-controller@ff760000rockchip,rk3399-cru»ÿvà’Üxin24m4 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rockchip,rk3399-wdtsnps,dw-wdt»ÿ„€à|ïxrktimer@ff850000rockchip,rk3399-timer»ÿ…ïQàhZ Üpclktimerspdif@ff870000rockchip,rk3399-spdif»ÿ‡ïB�[•tx ÜmclkhclkàU×fdefaultt–ø�èokayi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2s»ÿˆï'�[[•txrxÜi2s_clki2s_hclkàVÔfdefaultt—ø�èokay . Ii2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s»ÿ‰ï(�[[•txrxÜi2s_clki2s_hclkàWÕfdefaultt˜ø�èokay . Ii2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s»ÿŠï)�[[•txrxÜi2s_clki2s_hclkàXÖø�èokay?©vop@ff8f0000rockchip,rk3399-vop-lit»ÿ�>üïwÛÛIׄõáàÛµÛÜaclk_vopdclk_vophclk_vop •™øÐ ×axiahbdclk èdisabledport+?endpoint@0»¡š?°endpoint@1»¡›?µendpoint@2»¡œ?®endpoint@3»¡�?²endpoint@4»¡ž?5iommu@ff8f3f00rockchip,iommu»ÿ�?ïwàÛÛ Üaclkifaceø œ èdisabled?™vop@ff900000rockchip,rk3399-vop-big»ÿ�>üïvÙÙIׄõáàÙ´ÙÜaclk_vopdclk_vophclk_vop •ŸøÐ ×axiahbdclkèokayport+?endpoint@0»¡ ?´endpoint@1»¡¡?¯endpoint@2»¡¢?­endpoint@3»¡£?±endpoint@4»¡¤?4iommu@ff903f00rockchip,iommu»ÿ�?ïvàÙÙ Üaclkifaceø œèokay?Ÿisp0@ff910000rockchip,rk3399-cif-isp»ÿ‘@ï+ànéãÜispaclkhclk •¥º¦¿dphyø èdisabledports+port@0»+iommu@ff914000rockchip,iommu »ÿ‘@ÿ‘Pï+àéã Üaclkiface œø c?¥isp1@ff920000rockchip,rk3399-cif-isp»ÿ’@ï,àoêäÜispaclkhclk •§º¨¿dphyø èdisabledports+port@0»+iommu@ff924000rockchip,iommu »ÿ’@ÿ’Pï,àêä Üaclkiface œø c?§hdmi-soundsimple-audio-card ~i2s — ±hdmi-soundèokaysimple-audio-card,cpu È©simple-audio-card,codec Ȫhdmi@ff940000rockchip,rk3399-dw-hdmi»ÿ”ï(àtqpoÜiahbisfrcecgrfrefø+�èokay Ò«fdefaultt¬?ªportsport+endpoint@0»¡­?¢endpoint@1»¡®?œmipi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi»ÿ–€ï- à¢p£oÜrefpclkphy_cfggrføÐû×apb+ èdisabledports+port@0»+endpoint@0»¡¯?¡endpoint@1»¡°?šmipi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi»ÿ–€€ï. à¢q¤oÜrefpclkphy_cfggrføÐü×apb+  èdisabled?¨ports+port@0»+endpoint@0»¡±?£endpoint@1»¡²?�edp@ff970000rockchip,rk3399-edp»ÿ—€ï àjlo Üdppclkgrffdefaultt³øÐ×dp èdisabledports+port@0»+endpoint@0»¡´? endpoint@1»¡µ?›gpu@ff9a0000#rockchip,rk3399-maliarm,mali-t860»ÿš0ï rjobmmugpuàÐçø#èokay ¶ Þ·?dpinctrlrockchip,rk3399-pinctrlÀ+Égpio@ff720000rockchip,gpio-bank»ÿrà|ï ê úãK?"gpio@ff730000rockchip,gpio-bank»ÿsà|ï ê úãK?†gpio@ff780000rockchip,gpio-bank»ÿxàPï ê úãK?Agpio@ff788000rockchip,gpio-bank»ÿx€àQï ê úãK?gpio@ff790000rockchip,gpio-bank»ÿyàRï ê úãK?Àpcfg-pull-up ?¼pcfg-pull-down ?½pcfg-pull-none "?¸pcfg-pull-none-12ma " / ?»pcfg-pull-none-13ma " / ?¹pcfg-pull-none-18ma " /pcfg-pull-none-20ma " /pcfg-pull-up-2ma  /pcfg-pull-up-8ma  /pcfg-pull-up-18ma  /pcfg-pull-up-20ma  /pcfg-pull-down-4ma  /pcfg-pull-down-8ma  /pcfg-pull-down-12ma  / pcfg-pull-down-18ma  /pcfg-pull-down-20ma  /pcfg-output-high >pcfg-output-low J?ºpcfg-input-enable Upcfg-input-pull-up U  /pcfg-input-pull-down U  /clockclk-32k b¸cifcif-clkin b ¸cif-clkouta b ¸edpedp-hpd b¸?³gmacrgmii-pinsð b¹¸ ¸ ¹ ¸ ¸¸¸¸¹¹¸¸¹¹?rmii-pins  b ¸ ¹ ¸ ¸ ¸¸¸¸¹¹rgmii-sleep-pins bºi2c0i2c0-xfer b¸¸?‚i2c1i2c1-xfer b¸¸?7i2c2i2c2-xfer b»»?8i2c3i2c3-xfer b¸¸?9i2c4i2c4-xfer b ¸ ¸?ˆi2c5i2c5-xfer b ¸ ¸?:i2c6i2c6-xfer b ¸ ¸?;i2c7i2c7-xfer b¸¸?<i2c8i2c8-xfer b¸¸?‹i2s0i2s0-2ch-bus` b¸¸¸¸¸¸i2s0-8ch-bus� b¸¸¸¸¸¸¸¸¸?—i2s1i2s1-2ch-busP b¸¸¸¸¸?˜sdio0sdio0-bus1 b¼sdio0-bus4@ b¼¼¼¼?sdio0-cmd b¼? sdio0-clk b¸?!sdio0-cd b¼sdio0-pwr b¼sdio0-bkpwr b¼sdio0-wp b¼sdio0-int b¼sdmmcsdmmc-bus1 b¼sdmmc-bus4@ b¼ ¼ ¼ ¼?(sdmmc-clk b ¸?%sdmmc-cmd b ¼?&sdmmc-cd b¼?'sdmmc-wp b¼suspendap-pwroff b¸ddrio-pwroff b¸spdifspdif-bus b¸spdif-bus-1 b¸?–spi0spi0-clk b¼?Kspi0-cs0 b¼?Nspi0-cs1 b¼spi0-tx b¼?Lspi0-rx b¼?Mspi1spi1-clk b ¼?Ospi1-cs0 b ¼?Rspi1-rx b¼?Qspi1-tx b¼?Pspi2spi2-clk b ¼?Sspi2-cs0 b ¼?Vspi2-rx b ¼?Uspi2-tx b ¼?Tspi3spi3-clk b¼?}spi3-cs0 b¼?€spi3-rx b¼?spi3-tx b¼?~spi4spi4-clk b¼?Wspi4-cs0 b¼?Zspi4-rx b¼?Yspi4-tx b¼?Xspi5spi5-clk b¼?\spi5-cs0 b¼?_spi5-rx b¼?^spi5-tx b¼?]testclktest-clkout0 b¸test-clkout1 b¸test-clkout2 b¸tsadcotp-pin b¸?eotp-out b¸?fuart0uart0-xfer b¼¸?=uart0-cts b¸??uart0-rts b¸?>uart1uart1-xfer b ¼ ¸?Guart2auart2a-xfer b¼ ¸uart2buart2b-xfer b¼¸uart2cuart2c-xfer b¼¸?Huart3uart3-xfer b¼¸?Iuart3-cts b¸uart3-rts b¸uart4uart4-xfer b¼¸?�uarthdcpuarthdcp-xfer b¼¸pwm0pwm0-pin b¸?Œpwm0-pin-pull-down b½vop0-pwm-pin b¸vop1-pwm-pin b¸pwm1pwm1-pin b¸?�pwm1-pin-pull-down b½pwm2pwm2-pin b¸pwm2-pin-pull-down b½?Žpwm3apwm3a-pin b¸?�pwm3bpwm3b-pin b¸hdmihdmi-i2c-xfer b¸¸hdmi-cec b¸?¬pciepci-clkreqn-cpm b¸pci-clkreqnb-cpm b¸fusb30xfusb0-int b¼?‰irir-rx b¸?¾ledspower-led-pin b¸?¿pmicpmic-int-l b¼?‡vsel1-pin b½?ƒvsel2-pin b½?…sdiobt-host-wake-l b¸?Cbt-reg-on-h b ¸?Bbt-wake-l b¸?Dwifi-reg_on-h b ¸?Æwifiwifi-host-wake-l b¸?#usb-typecvcc5v0_typec_en b¼?Ãusb2host-vbus-drv b¸?Âopp-table-0operating-points-v2 p? opp00 {Q– ‚ –¨ –¨Ð �œ@opp01 {#ÃF ‚ –¨ –¨Ðopp02 {0£, ‚ øP øPÐopp03 {<Ü ‚HHÐopp04 {G†Œ ‚B@B@Ðopp05 {Tfr ‚*ˆ*ˆÐopp-table-1operating-points-v2 p? opp00 {Q– ‚ –¨ –¨Ð �œ@opp01 {#ÃF ‚ –¨ –¨Ðopp02 {0£, ‚ –¨ –¨Ðopp03 {<Ü ‚ Yø YøÐopp04 {G†Œ ‚~ð~ðÐopp05 {Tfr ‚£è£èÐopp06 {_Ø" ‚ÈàÈàÐopp07 {kIÒ ‚O€O€Ðopp-table-2operating-points-v2?¶opp00 { ë ‚ –¨ –¨Œ0opp01 {³Ü@ ‚ –¨ –¨Œ0opp02 {ׄ ‚ –¨ –¨Œ0opp03 {Íe ‚ Yø YøŒ0opp04 {#ÃF ‚HHŒ0opp05 {/¯ ‚ÈàÈàŒ0chosen ¡serial2:1500000n8external-gmac-clock fixed-clocksY@ !clkin_gmac4?dc-5vregulator-fixedÂdc_5v3GÑLK@éLK@?Áir-receivergpio-ir-receiver F"fdefaultt¾leds gpio-ledsfdefaultt¿led-0 ­blue:power FÀ ³on Ádefault-onvcc-sysregulator-fixedÂvcc_sysÑLK@éLK@3YÁ?„vcc-phy-regulatorregulator-fixedÂvcc_phy3G?vcc1v8-s0regulator-fixed Âvcc1v8_s0Ñw@éw@3?6vcc3v3-sysregulator-fixed Âvcc3v3_sysÑ2Z é2Z 3Y„?Evcc5v0-host-regulatorregulator-fixed × ‰Àfdefaultt Âvcc5v0_host3?”vcc5v0-typec-regulatorregulator-fixed × ‰†fdefaulttà Âvcc5v0_typec3YÄ?Švcc5v0-usbregulator-fixed Âvcc5v0_usb3GÑLK@éLK@YÁ?Ävdd-logpwm-regulator êÅa¨ ï„Âvdd_logÑ 5é\À3Gsdio-pwrseqmmc-pwrseq-simpleà@ Üext_clockfdefaulttÆ ú" ? compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4mmc0mmc1mmc2cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesoperating-points-v2cpu-supplyphandleduration-usexit-latency-usentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usmin-residency-usportsrockchip,pmudevfreq-eventsclock-namesstatusinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-mapmax-link-speedmsi-mapphysphy-namesrangesresetsreset-namesinterrupt-controllerpower-domainsrockchip,grfsnps,txpblassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modepinctrl-namespinctrl-0snps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaymax-frequencyfifo-depthbus-widthcap-sdio-irqcap-sd-highspeedkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr104assigned-clock-ratescap-mmc-highspeeddisable-wpvqmmc-supplycard-detect-delayarasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs400-1_8vmmc-hs400-enhanced-strobedr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controller#msi-cellsaffinity#io-channel-cellsvref-supplyi2c-scl-rising-time-nsi2c-scl-falling-time-nsreg-shiftreg-io-widthdevice-wakeup-gpioshost-wakeup-gpiosshutdown-gpiosmax-speedvbat-supplyvddio-supplydmasdma-namesspi-max-frequencypolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplyregulator-compatibleregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayfcs,suspend-voltage-selectorregulator-always-onregulator-boot-onvin-supplyregulator-off-in-suspendregulator-initial-moderockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyregulator-on-in-suspendregulator-suspend-microvoltvbus-supply#pwm-cellsiommus#iommu-cells#dma-cellsarm,pl330-periph-burst#reset-cellsaudio-supplybt656-supplygpio1830-supplysdmmc-supply#phy-cellsdrive-impedance-ohmrockchip,playback-channelsrockchip,capture-channelsrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiddc-i2c-busmali-supplygpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsstdout-pathlabeldefault-statelinux,default-triggerenable-active-highpwmspwm-supplyreset-gpios