Ð þííÙ8áp( iá8+firefly,roc-rk3399-pc-plusrockchip,rk3399 +!7Firefly ROC-RK3399-PC-PLUS Boardaliases=/ethernet@fe300000G/i2c@ff3c0000L/i2c@ff110000Q/i2c@ff120000V/i2c@ff130000[/i2c@ff3d0000`/i2c@ff140000e/i2c@ff150000j/i2c@ff160000o/i2c@ff3e0000t/serial@ff180000|/serial@ff190000„/serial@ff1a0000Œ/serial@ff1b0000”/serial@ff370000œ/mmc@fe320000¡/mmc@fe330000cpus+cpu-mapcluster0core0¦core1¦core2¦core3¦cluster1core0¦core1¦cpu@0ªcpuarm,cortex-a53¶ºpsciÈåÛâñd  / :cpu@1ªcpuarm,cortex-a53¶ºpsciÈåÛâñd  / :cpu@2ªcpuarm,cortex-a53¶ºpsciÈåÛâñd  / :cpu@3ªcpuarm,cortex-a53¶ºpsciÈåÛâñd  / :cpu@100ªcpuarm,cortex-a72¶ºpsciÈÛ âñ´  /:thermal-idleâB'Nôcpu@101ªcpuarm,cortex-a72¶ºpsciÈÛ âñ´  /:thermal-idleâB'Nôidle-states^pscicpu-sleeparm,idle-statek|“xNú¤„: cluster-sleeparm,idle-statek|“�Nô¤Ð: display-subsystemrockchip,display-subsystemµmemory-controllerrockchip,rk3399-dmc»ÈÛ¨×dmc_clk ãdisabledpmu_a53arm,cortex-a53-pmuêpmu_a72arm,cortex-a72-pmuêpsci arm,psci-1.0Ásmctimerarm,armv8-timer@ê   õxin24m fixed-clock n6xin24m/:ˆpcie@f8000000rockchip,rk3399-pcie ¶øýê ÛÊË'µ(ºusbãokaydebug@fe430000&arm,coresight-cpu-debugarm,primecell¶þCÛM ×apb_pclk¦debug@fe432000&arm,coresight-cpu-debugarm,primecell¶þC ÛM ×apb_pclk¦debug@fe434000&arm,coresight-cpu-debugarm,primecell¶þC@ÛM ×apb_pclk¦debug@fe436000&arm,coresight-cpu-debugarm,primecell¶þC`ÛM ×apb_pclk¦debug@fe610000&arm,coresight-cpu-debugarm,primecell¶þaÛL ×apb_pclk¦debug@fe710000&arm,coresight-cpu-debugarm,primecell¶þqÛL ×apb_pclk¦usb@fe800000rockchip,rk3399-dwc3+Ä0Û�ƒöøôùG×ref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clkË% Òusb3-otgãokayusb@fe800000 snps,dwc3¶þ€êiÛ�öƒ×refbus_earlysuspendhostµ)*ºusb2-phyusb3-phy ‡utmi_wide�¨Éâóãokayusb@fe900000rockchip,rk3399-dwc3+Ä0Û‚„÷øôùG×ref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clkË& Òusb3-otgãokayusb@fe900000 snps,dwc3¶þ�ênÛ‚÷„×refbus_earlysuspendhostµ+,ºusb2-phyusb3-phy ‡utmi_wide�¨Éâóãokaydp@fec00000rockchip,rk3399-cdn-dp¶þÀê r¡ßõá ë Ûru¡o×core-clkpclkspdifgrfµ-.ó ËHJýÒspdifdptxapbcore% ãdisabledportsport+endpoint@0¶6/:›endpoint@1¶60:•interrupt-controller@fee00000 arm,gic-v3F+ÄÞP¶þàþð ÿðÿñÿòê :interrupt-controller@fee20000arm,gic-v3-itsFU¶þâ:ppi-partitionsinterrupt-partition-0`:interrupt-partition-1`:saradc@ff100000rockchip,rk3399-saradc¶ÿê>iÛPe×saradcapb_pclkËÔ Òsaradc-apbãokay{1:¶i2c@ff110000rockchip,rk3399-i2c¶ÿAß ëÂÛAU ×i2cpclkê;adefaulto2+ãokay‡,žes8388@11everest,es8388¶×mclkÛY%:Èi2c@ff120000rockchip,rk3399-i2c¶ÿBß ëÂÛBV ×i2cpclkê#adefaulto3+ ãdisabledi2c@ff130000rockchip,rk3399-i2c¶ÿCß ëÂÛCW ×i2cpclkê"adefaulto4+ãokay‡Âž:¢i2c@ff140000rockchip,rk3399-i2c¶ÿDß ëÂÛDX ×i2cpclkê&adefaulto5+ ãdisabledi2c@ff150000rockchip,rk3399-i2c¶ÿEß ëÂÛEY ×i2cpclkê%adefaulto6+ ãdisabledi2c@ff160000rockchip,rk3399-i2c¶ÿFß ëÂÛFZ ×i2cpclkê$adefaulto7+ãokay‡Xžusb-typec@22 fcs,fusb302¶" 8êadefaulto9¶:ãokayserial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uart¶ÿÛQ`×baudclkapb_pclkêcÂÌadefault o;<=ãokayserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uart¶ÿÛRa×baudclkapb_pclkêbÂÌadefaulto> ãdisabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uart¶ÿÛSb×baudclkapb_pclkêdÂÌadefaulto?ãokayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uart¶ÿÛTc×baudclkapb_pclkêeÂÌadefaulto@ ãdisabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spi¶ÿÛG[×spiclkapb_pclkêDÙA A ÞtxrxadefaultoBCDE+ ãdisabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spi¶ÿÛH\×spiclkapb_pclkê5ÙA A ÞtxrxadefaultoFGHI+ãokayflash@0jedec,spi-nor¶蘖€spi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spi¶ÿÛI]×spiclkapb_pclkê4ÙAAÞtxrxadefaultoJKLM+ ãdisabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spi¶ÿÛJ^×spiclkapb_pclkêCÙAAÞtxrxadefaultoNOPQ+ ãdisabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi¶ÿ ÛK_×spiclkapb_pclkê„ÙRR ÞtxrxadefaultoSTUVó+ ãdisabledthermal-zonescpu-thermalúdèWtripscpu_alert0.p:бpassive:Xcpu_alert1.$ø:бpassive:Ycpu_crit.s:Ð ±criticalcooling-mapsmap0EXJÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿmap1EYHJÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿgpu-thermalúdèWtripsgpu_alert0.$ø:бpassive:Zgpu_crit.s:Ð ±criticalcooling-mapsmap0EZ J[ÿÿÿÿÿÿÿÿtsadc@ff260000rockchip,rk3399-tsadc¶ÿ&êaOß q°ÛOd×tsadcapb_pclkËè Òtsadc-apbYsainitdefaultsleepo\p]z\„ãokayš±:Wqos@ffa58000rockchip,rk3399-qossyscon¶ÿ¥€ :eqos@ffa5c000rockchip,rk3399-qossyscon¶ÿ¥À :fqos@ffa60080rockchip,rk3399-qossyscon¶ÿ¦€ qos@ffa60100rockchip,rk3399-qossyscon¶ÿ¦ qos@ffa60180rockchip,rk3399-qossyscon¶ÿ¦€ qos@ffa70000rockchip,rk3399-qossyscon¶ÿ§ :iqos@ffa70080rockchip,rk3399-qossyscon¶ÿ§€ :jqos@ffa74000rockchip,rk3399-qossyscon¶ÿ§@ :gqos@ffa76000rockchip,rk3399-qossyscon¶ÿ§` :hqos@ffa90000rockchip,rk3399-qossyscon¶ÿ© :kqos@ffa98000rockchip,rk3399-qossyscon¶ÿ©€ :^qos@ffaa0000rockchip,rk3399-qossyscon¶ÿª :lqos@ffaa0080rockchip,rk3399-qossyscon¶ÿª€ :mqos@ffaa8000rockchip,rk3399-qossyscon¶ÿª€ :nqos@ffaa8080rockchip,rk3399-qossyscon¶ÿª€€ :oqos@ffab0000rockchip,rk3399-qossyscon¶ÿ« :_qos@ffab0080rockchip,rk3399-qossyscon¶ÿ«€ :`qos@ffab8000rockchip,rk3399-qossyscon¶ÿ«€ :aqos@ffac0000rockchip,rk3399-qossyscon¶ÿ¬ :bqos@ffac0080rockchip,rk3399-qossyscon¶ÿ¬€ :cqos@ffac8000rockchip,rk3399-qossyscon¶ÿ¬€ :pqos@ffac8080rockchip,rk3399-qossyscon¶ÿ¬€€ :qqos@ffad0000rockchip,rk3399-qossyscon¶ÿ­ :rqos@ffad8080rockchip,rk3399-qossyscon¶ÿ­€€ qos@ffae0000rockchip,rk3399-qossyscon¶ÿ® :dpower-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd¶ÿ1power-controller!rockchip,rk3399-power-controllerÌ+:power-domain@34¶"ÛáÝà^Ìpower-domain@33¶!ÛÜåà_`Ìpower-domain@31¶ÛëêàaÌpower-domain@32¶ ÛíìàbcÌpower-domain@35¶#ÛÐàdÌpower-domain@25¶ÛlÌpower-domain@23¶ÛðàeÌpower-domain@22¶ÛÕfàfÌpower-domain@27¶ÛÎLàgÌpower-domain@28¶ÛîàhÌpower-domain@8¶Û~}Ìpower-domain@9¶ Û€Ìpower-domain@24¶ÛôàijÌpower-domain@15¶Ì+power-domain@21¶ÛÞçràkÌpower-domain@19¶ÛåßàlmÌpower-domain@20¶ÛæàànoÌpower-domain@16¶Ì+power-domain@17¶ÛÙÙàpqÌpower-domain@18¶ÛÛÛàrÌsyscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd¶ÿ2:io-domains&rockchip,rk3399-pmu-io-voltage-domainãokayçsspi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi¶ÿ5Ûtt×spiclkapb_pclkê<adefaultouvwx+ ãdisabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart¶ÿ7Ûtt"×baudclkapb_pclkêfÂÌadefaultoy ãdisabledi2c@ff3c0000rockchip,rk3399-i2c¶ÿ<t ß ëÂÛt t ×i2cpclkê9adefaultoz+ãokay €‡¨žpmic@1brockchip,rk808¶ 8ê/xin32krk808-clkout2adefaulto{ö%|1|=|I|U|a|m|y|…|’|Ÿ|¬s:»regulatorsDCDC_REG1 ¹vdd_centerÈÜî q°™pqregulator-state-mem3DCDC_REG2 ¹vdd_cpu_lÈÜî q°™pq: regulator-state-mem3DCDC_REG3¹vcc_ddrÈÜregulator-state-memLDCDC_REG4¹vcc_1v8ÈÜîw@w@:¾regulator-state-memLdw@LDO_REG1¹vcca1v8_codecÈÜîw@w@:‰regulator-state-mem3LDO_REG2 ¹vcc1v8_hdmiÈÜîw@w@regulator-state-mem3LDO_REG3 ¹vcc1v8_pmuÈÜîw@w@regulator-state-memLdw@LDO_REG4 ¹vcc_sdioÈÜîw@-ÆÀ:#regulator-state-memLd-ÆÀLDO_REG5¹vcca3v0_codecÈÜî-ÆÀ-ÆÀ:Ëregulator-state-mem3LDO_REG6¹vcc_1v5ÈÜîã`ã`regulator-state-memLdã`LDO_REG7 ¹vcca0v9_hdmiÈÜî »  » regulator-state-mem3LDO_REG8¹vcc_3v0ÈÜî-ÆÀ-ÆÀ:sregulator-state-memLd-ÆÀSWITCH_REG1 ¹vcc3v3_s3ÈÜ:regulator-state-mem3SWITCH_REG2 ¹vcc3v3_s0ÈÜregulator-state-mem3regulator@40silergy,syr827¶@€adefaulto} ¹vdd_cpu_bî ß4ã`èÈÜ�|:regulator-state-mem3regulator@41silergy,syr828¶A€adefaulto~¹vdd_gpuî ß4ã`èÈÜ�|:®regulator-state-mem3hym8563@51haoyu,hym8563¶Q ê/ €xin32kadefaultoi2c@ff3d0000rockchip,rk3399-i2c¶ÿ=t ß ëÂÛt t ×i2cpclkê8adefaulto€+ãokay‡Xži2c@ff3e0000rockchip,rk3399-i2c¶ÿ>t ß ëÂÛt t ×i2cpclkê:adefaulto�+ ãdisabledpwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwm¶ÿB¨adefaulto‚Ûtãokay:µpwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwm¶ÿB¨adefaultoƒÛt ãdisabledpwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwm¶ÿB ¨adefaulto„Ûtãokay:Åpwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwm¶ÿB0¨adefaulto…Ût ãdisableddfi@ff630000¶ÿc@rockchip,rk3399-dfi»êƒÛy ×pclk_ddr_mon ãdisabled:video-codec@ff650000rockchip,rk3399-vpu¶ÿe êrq mvepuvdpuÛëê ×aclkhclk³†óiommu@ff650800rockchip,iommu¶ÿe@êsÛëê ×aclkifaceºó:†video-codec@ff660000rockchip,rk3399-vdec¶ÿfêt Ûí쟞×axiahbcabaccore³‡ó iommu@ff660480rockchip,iommu ¶ÿf€@ÿfÀ@êuÛíì ×aclkifaceó º:‡iommu@ff670800rockchip,iommu¶ÿg@ê*ÛáÝ ×aclkifaceº ãdisabledrga@ff680000rockchip,rk3399-rga¶ÿhê7ÛÜåm×aclkhclksclkËjgi Òcoreaxiahbó!efuse@ff690000rockchip,rk3399-efuse¶ÿi€+Û} ×pclk_efusecpu-id@7¶cpu-leakage@17¶gpu-leakage@18¶center-leakage@19¶cpu-leakage@1a¶logic-leakage@1b¶wafer-info@1c¶dma-controller@ff6d0000arm,pl330arm,primecell¶ÿm@ êÇÒÛÓ ×apb_pclk:Rdma-controller@ff6e0000arm,pl330arm,primecell¶ÿn@ êÇÒÛÔ ×apb_pclk:Aclock-controller@ff750000rockchip,rk3399-pmucru¶ÿuÛˆ×xin24m/étß(Jñ:tclock-controller@ff760000rockchip,rk3399-cru¶ÿvÛˆ×xin24m/éˆÀÀ@ÂÁBÉÂCãÞxíDß#g¸€/¯;šÊðÑ€xhÀ<4`õáõáúð€#ÃFõáúð€ׄׄ ë ëÂׄ:syscon@ff770000&rockchip,rk3399-grfsysconsimple-mfd¶ÿw+:io-domains"rockchip,rk3399-io-voltage-domainãokayö‰ s s #mipi-dphy-rx0rockchip,rk3399-mipi-dphy-rx0Ûw¥o×dphy-refdphy-cfggrfó - ãdisabled:�usb2phy@e450rockchip,rk3399-usb2phy¶äPÛ{×phyclk/clk_usbphy0_480mãokay:%host-port -ê mlinestateãokayMŠ:&otg-port -0êghjmotg-bvalidotg-idlinestateãokayM::)usb2phy@e460rockchip,rk3399-usb2phy¶ä`Û|×phyclk/clk_usbphy1_480mãokay:'host-port -ê mlinestateãokayMŠ:(otg-port -0êlmomotg-bvalidotg-idlinestateãokayMŠ:+phy@f780rockchip,rk3399-emmc-phy¶÷€$Û‹×emmcclk 82 -ãokay:$pcie-phyrockchip,rk3399-pcie-phyÛŠ×refclk -ˇÒphy ãdisabled:phy@ff7c0000rockchip,rk3399-typec-phy¶ÿ|Û~}×tcpdcoretcpdphy-ref~ßúð€óË•”LÒuphyuphy-pipeuphy-tcphyãokaydp-port -:-usb3-port -:*phy@ff800000rockchip,rk3399-typec-phy¶ÿ€Û€×tcpdcoretcpdphy-ref€ßúð€ó Ë�œMÒuphyuphy-pipeuphy-tcphyãokaydp-port -:.usb3-port -:,watchdog@ff848000 rockchip,rk3399-wdtsnps,dw-wdt¶ÿ„€Û|êxrktimer@ff850000rockchip,rk3399-timer¶ÿ…êQÛhZ ×pclktimerspdif@ff870000rockchip,rk3399-spdif¶ÿ‡êBÙRÞtx ×mclkhclkÛU×adefaultoŒó% ãdisabledi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2s¶ÿˆê'ÙRRÞtxrx×i2s_clki2s_hclkÛVÔadefaulto�ó%ãokay L gi2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s¶ÿ‰ê(ÙRRÞtxrx×i2s_clki2s_hclkÛWÕadefaultoŽ�ó%ãokay L g:Éi2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s¶ÿŠê)ÙRRÞtxrx×i2s_clki2s_hclkÛXÖó%ãokay: vop@ff8f0000rockchip,rk3399-vop-lit¶ÿ�>üêwÛÛßׄõáÛÛµÛ×aclk_vopdclk_vophclk_vop³�óË Òaxiahbdclkãokayport+:endpoint@0¶6‘:§endpoint@1¶6’:¬endpoint@2¶6“:¥endpoint@3¶6”:©endpoint@4¶6•:0iommu@ff8f3f00rockchip,iommu¶ÿ�?êwÛÛÛ ×aclkifaceóºãokay:�vop@ff900000rockchip,rk3399-vop-big¶ÿ�>üêvÙÙßׄõáÛÙ´Ù×aclk_vopdclk_vophclk_vop³–óË Òaxiahbdclkãokayport+:endpoint@0¶6—:«endpoint@1¶6˜:¦endpoint@2¶6™:¤endpoint@3¶6š:¨endpoint@4¶6›:/iommu@ff903f00rockchip,iommu¶ÿ�?êvÛÙÙ ×aclkifaceóºãokay:–isp0@ff910000rockchip,rk3399-cif-isp¶ÿ‘@ê+Ûnéã×ispaclkhclk³œµ�ºdphyó ãdisabledports+port@0¶+iommu@ff914000rockchip,iommu ¶ÿ‘@ÿ‘Pê+Ûéã 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LHeadphone Amp ^Ë:Ç compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4mmc0mmc1cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesoperating-points-v2cpu-supplyphandleduration-usexit-latency-usentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usmin-residency-usportsrockchip,pmudevfreq-eventsclock-namesstatusinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-mapmax-link-speedmsi-mapphysphy-namesrangesresetsreset-namesinterrupt-controllerpower-domainsrockchip,grfsnps,txpblassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modepinctrl-namespinctrl-0snps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaymax-frequencyfifo-depthassigned-clock-ratesbus-widthcap-sd-highspeedcd-gpiosdisable-wpsd-uhs-sdr104vmmc-supplyvqmmc-supplyarasan,soc-ctl-syscondisable-cqe-dcmdnon-removabledr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controller#msi-cellsaffinity#io-channel-cellsvref-supplyi2c-scl-rising-time-nsi2c-scl-falling-time-nsvbus-supplyreg-shiftreg-io-widthdmasdma-namesspi-max-frequencypolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplyrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvddio-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltfcs,suspend-voltage-selectorvin-supply#pwm-cellsiommus#iommu-cells#dma-cellsarm,pl330-periph-burst#reset-cellsaudio-supplybt656-supplygpio1830-supplysdmmc-supply#phy-cellsdrive-impedance-ohmrockchip,playback-channelsrockchip,capture-channelsrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiddc-i2c-busmali-supplygpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsstdout-pathpwmsio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallabellinux,codepress-threshold-microvoltlinux,rc-map-namedefault-statelinux,default-triggerreset-gpiosenable-active-highpwm-supplysimple-audio-card,widgetssimple-audio-card,routingsimple-audio-card,hp-det-gpiosimple-audio-card,aux-devssimple-audio-card,pin-switchesgpio-fan,speed-mapenable-gpiossound-name-prefixVCC-supply