Ð þíàI8Õ(( !Ôð)rockchip,rk3399-sapphirerockchip,rk3399 +7Sapphire-RK3399 Boardaliases=/ethernet@fe300000G/i2c@ff3c0000L/i2c@ff110000Q/i2c@ff120000V/i2c@ff130000[/i2c@ff3d0000`/i2c@ff140000e/i2c@ff150000j/i2c@ff160000o/i2c@ff3e0000t/serial@ff180000|/serial@ff190000„/serial@ff1a0000Œ/serial@ff1b0000”/serial@ff370000œ/mmc@fe320000¡/mmc@fe330000cpus+cpu-mapcluster0core0¦core1¦core2¦core3¦cluster1core0¦core1¦cpu@0ªcpuarm,cortex-a53¶ºpsciÈåÛâñd  / :cpu@1ªcpuarm,cortex-a53¶ºpsciÈåÛâñd  / :cpu@2ªcpuarm,cortex-a53¶ºpsciÈåÛâñd  / :cpu@3ªcpuarm,cortex-a53¶ºpsciÈåÛâñd  / :cpu@100ªcpuarm,cortex-a72¶ºpsciÈÛ âñ´  /:thermal-idleâB'Nôcpu@101ªcpuarm,cortex-a72¶ºpsciÈÛ âñ´  /:thermal-idleâB'Nôidle-states^pscicpu-sleeparm,idle-statek|“xNú¤„: cluster-sleeparm,idle-statek|“�Nô¤Ð: display-subsystemrockchip,display-subsystemµmemory-controllerrockchip,rk3399-dmc»ÈÛ¨×dmc_clk ãdisabledpmu_a53arm,cortex-a53-pmuêpmu_a72arm,cortex-a72-pmuêpsci arm,psci-1.0Ásmctimerarm,armv8-timer@ê   õxin24m fixed-clock n6xin24m/:†pcie@f8000000rockchip,rk3399-pcie ¶øýê ÛÊË'µ(ºusbãokaydebug@fe430000&arm,coresight-cpu-debugarm,primecell¶þCÛM ×apb_pclk¦debug@fe432000&arm,coresight-cpu-debugarm,primecell¶þC ÛM ×apb_pclk¦debug@fe434000&arm,coresight-cpu-debugarm,primecell¶þC@ÛM ×apb_pclk¦debug@fe436000&arm,coresight-cpu-debugarm,primecell¶þC`ÛM ×apb_pclk¦debug@fe610000&arm,coresight-cpu-debugarm,primecell¶þaÛL ×apb_pclk¦debug@fe710000&arm,coresight-cpu-debugarm,primecell¶þqÛL ×apb_pclk¦usb@fe800000rockchip,rk3399-dwc3+Ä0Û�ƒöøôùG×ref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clkË% Òusb3-otgãokayusb@fe800000 snps,dwc3¶þ€êiÛ�öƒ×refbus_earlysuspend­hostµ)*ºusb2-phyusb3-phy µutmi_wide¾Ö÷1óãokayusb@fe900000rockchip,rk3399-dwc3+Ä0Û‚„÷øôùG×ref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clkË& Òusb3-otgãokayusb@fe900000 snps,dwc3¶þ�ênÛ‚÷„×refbus_earlysuspend­hostµ+,ºusb2-phyusb3-phy µutmi_wide¾Ö÷1óãokaydp@fec00000rockchip,rk3399-cdn-dp¶þÀê r¡ßõá ë Ûru¡o×core-clkpclkspdifgrfµ-.ó ËHJýÒspdifdptxapbcoreS ãdisabledportsport+endpoint@0¶d/:™endpoint@1¶d0:“interrupt-controller@fee00000 arm,gic-v3F+ÄÞP¶þàþð ÿðÿñÿòê :interrupt-controller@fee20000arm,gic-v3-itstƒ¶þâ:ppi-partitionsinterrupt-partition-0Ž:interrupt-partition-1Ž:saradc@ff100000rockchip,rk3399-saradc¶ÿê>—ÛPe×saradcapb_pclkËÔ Òsaradc-apbãokay©1i2c@ff110000rockchip,rk3399-i2c¶ÿAß ëÂÛAU ×i2cpclkê;adefaulto2+ ãdisabledi2c@ff120000rockchip,rk3399-i2c¶ÿBß ëÂÛBV ×i2cpclkê#adefaulto3+ ãdisabledi2c@ff130000rockchip,rk3399-i2c¶ÿCß ëÂÛCW ×i2cpclkê"adefaulto4+ãokayµÂÌ: i2c@ff140000rockchip,rk3399-i2c¶ÿDß ëÂÛDX ×i2cpclkê&adefaulto5+ ãdisabledi2c@ff150000rockchip,rk3399-i2c¶ÿEß ëÂÛEY ×i2cpclkê%adefaulto6+ ãdisabledi2c@ff160000rockchip,rk3399-i2c¶ÿFß ëÂÛFZ ×i2cpclkê$adefaulto7+ ãdisabledserial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uart¶ÿÛQ`×baudclkapb_pclkêcäîadefaulto89ãokayserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uart¶ÿÛRa×baudclkapb_pclkêbäîadefaulto: ãdisabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uart¶ÿÛSb×baudclkapb_pclkêdäîadefaulto;ãokayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uart¶ÿÛTc×baudclkapb_pclkêeäîadefaulto< ãdisabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spi¶ÿÛG[×spiclkapb_pclkêDû= = txrxadefaulto>?@A+ ãdisabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spi¶ÿÛH\×spiclkapb_pclkê5û= = txrxadefaultoBCDE+ ãdisabledspi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spi¶ÿÛI]×spiclkapb_pclkê4û==txrxadefaultoFGHI+ ãdisabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spi¶ÿÛJ^×spiclkapb_pclkêCû==txrxadefaultoJKLM+ ãdisabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi¶ÿ ÛK_×spiclkapb_pclkê„ûNN txrxadefaultoOPQRó+ ãdisabledthermal-zonescpu-thermal d è.Stripscpu_alert0>pJбpassive:Tcpu_alert1>$øJбpassive:Ucpu_crit>sJÐ ±criticalcpu_hotJ'>ÖØ±active:Wcooling-mapsmap0UTZÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿmap1UUHZÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿmap2 ZVÿÿÿÿÿÿÿÿUWgpu-thermal d è.Stripsgpu_alert0>$øJбpassive:Xgpu_crit>sJÐ ±criticalcooling-mapsmap0UX ZYÿÿÿÿÿÿÿÿtsadc@ff260000rockchip,rk3399-tsadc¶ÿ&êaOß q°ÛOd×tsadcapb_pclkËè Òtsadc-apbisainitdefaultsleepoZ€[ŠZ”ãokayªÁ:Sqos@ffa58000rockchip,rk3399-qossyscon¶ÿ¥€ :cqos@ffa5c000rockchip,rk3399-qossyscon¶ÿ¥À :dqos@ffa60080rockchip,rk3399-qossyscon¶ÿ¦€ qos@ffa60100rockchip,rk3399-qossyscon¶ÿ¦ qos@ffa60180rockchip,rk3399-qossyscon¶ÿ¦€ qos@ffa70000rockchip,rk3399-qossyscon¶ÿ§ :gqos@ffa70080rockchip,rk3399-qossyscon¶ÿ§€ :hqos@ffa74000rockchip,rk3399-qossyscon¶ÿ§@ :eqos@ffa76000rockchip,rk3399-qossyscon¶ÿ§` :fqos@ffa90000rockchip,rk3399-qossyscon¶ÿ© :iqos@ffa98000rockchip,rk3399-qossyscon¶ÿ©€ :\qos@ffaa0000rockchip,rk3399-qossyscon¶ÿª :jqos@ffaa0080rockchip,rk3399-qossyscon¶ÿª€ :kqos@ffaa8000rockchip,rk3399-qossyscon¶ÿª€ :lqos@ffaa8080rockchip,rk3399-qossyscon¶ÿª€€ :mqos@ffab0000rockchip,rk3399-qossyscon¶ÿ« :]qos@ffab0080rockchip,rk3399-qossyscon¶ÿ«€ :^qos@ffab8000rockchip,rk3399-qossyscon¶ÿ«€ :_qos@ffac0000rockchip,rk3399-qossyscon¶ÿ¬ :`qos@ffac0080rockchip,rk3399-qossyscon¶ÿ¬€ :aqos@ffac8000rockchip,rk3399-qossyscon¶ÿ¬€ :nqos@ffac8080rockchip,rk3399-qossyscon¶ÿ¬€€ :oqos@ffad0000rockchip,rk3399-qossyscon¶ÿ­ :pqos@ffad8080rockchip,rk3399-qossyscon¶ÿ­€€ qos@ffae0000rockchip,rk3399-qossyscon¶ÿ® :bpower-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd¶ÿ1power-controller!rockchip,rk3399-power-controllerÜ+:power-domain@34¶"ÛáÝð\Üpower-domain@33¶!ÛÜåð]^Üpower-domain@31¶Ûëêð_Üpower-domain@32¶ Ûíìð`aÜpower-domain@35¶#ÛÐðbÜpower-domain@25¶ÛlÜpower-domain@23¶ÛððcÜpower-domain@22¶ÛÕfðdÜpower-domain@27¶ÛÎLðeÜpower-domain@28¶ÛîðfÜpower-domain@8¶Û~}Üpower-domain@9¶ Û€Üpower-domain@24¶ÛôðghÜpower-domain@15¶Ü+power-domain@21¶ÛÞçrðiÜpower-domain@19¶ÛåßðjkÜpower-domain@20¶ÛæàðlmÜpower-domain@16¶Ü+power-domain@17¶ÛÙÙðnoÜpower-domain@18¶ÛÛÛðpÜsyscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd¶ÿ2:io-domains&rockchip,rk3399-pmu-io-voltage-domainãokay÷qspi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi¶ÿ5Ûrr×spiclkapb_pclkê<adefaultostuv+ ãdisabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart¶ÿ7Ûrr"×baudclkapb_pclkêfäîadefaultow ãdisabledi2c@ff3c0000rockchip,rk3399-i2c¶ÿ<r ß ëÂÛr r ×i2cpclkê9adefaultox+ãokay €µ¨Ìpmic@1brockchip,rk808¶ yê/xin32krk808-clkout2adefaultoz'5{A{M{Y{e{q{}|‰{•{¢{¯|¼}regulatorsDCDC_REG1 Évdd_centerØìþ q°™p.qregulator-state-memCDCDC_REG2 Évdd_cpu_lØìþ q°™p.q: regulator-state-memCDCDC_REG3Évcc_ddrØìregulator-state-mem\DCDC_REG4Évcc_1v8Øìþw@w@:³regulator-state-mem\tw@LDO_REG1 Évcc1v8_dvpØìþw@w@regulator-state-memCLDO_REG2 Évcc3v0_tpØìþ-ÆÀ-ÆÀregulator-state-memCLDO_REG3 Évcc1v8_pmuØìþw@w@:}regulator-state-mem\tw@LDO_REG4 Évcc_sdioØìþw@2Z :#regulator-state-mem\t-ÆÀLDO_REG5Évcca3v0_codecØìþ-ÆÀ-ÆÀregulator-state-memCLDO_REG6Évcc_1v5Øìþã`ã`regulator-state-mem\tã`LDO_REG7Évcca1v8_codecØìþw@w@:‡regulator-state-memCLDO_REG8Évcc_3v0Øìþ-ÆÀ-ÆÀ:qregulator-state-mem\t-ÆÀSWITCH_REG1 Évcc3v3_s3Øì:regulator-state-memCSWITCH_REG2 Évcc3v3_s0Øìregulator-state-memCregulator@40silergy,syr827¶@� Évdd_cpu_bþ ß4ã`.èØì­{:regulator-state-memCregulator@41silergy,syr828¶A�Évdd_gpuþ ß4ã`.èØì­{:«regulator-state-memCi2c@ff3d0000rockchip,rk3399-i2c¶ÿ=r ß ëÂÛr r ×i2cpclkê8adefaulto~+ ãdisabledi2c@ff3e0000rockchip,rk3399-i2c¶ÿ>r ß ëÂÛr r ×i2cpclkê:adefaulto+ ãdisabledpwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwm¶ÿB¸adefaulto€Ûrãokaypwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwm¶ÿB¸adefaulto�Ûr ãdisabledpwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwm¶ÿB ¸adefaulto‚Ûrãokay:ºpwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwm¶ÿB0¸adefaultoƒÛr ãdisableddfi@ff630000¶ÿc@rockchip,rk3399-dfi»êƒÛy ×pclk_ddr_mon ãdisabled:video-codec@ff650000rockchip,rk3399-vpu¶ÿe êrq mvepuvdpuÛëê ×aclkhclkÄóiommu@ff650800rockchip,iommu¶ÿe@êsÛëê ×aclkifaceÊó:„video-codec@ff660000rockchip,rk3399-vdec¶ÿfêt Ûí쟞×axiahbcabaccoreÃ…ó iommu@ff660480rockchip,iommu ¶ÿf€@ÿfÀ@êuÛíì ×aclkifaceó Ê:…iommu@ff670800rockchip,iommu¶ÿg@ê*ÛáÝ ×aclkifaceÊ ãdisabledrga@ff680000rockchip,rk3399-rga¶ÿhê7ÛÜåm×aclkhclksclkËjgi Òcoreaxiahbó!efuse@ff690000rockchip,rk3399-efuse¶ÿi€+Û} ×pclk_efusecpu-id@7¶cpu-leakage@17¶gpu-leakage@18¶center-leakage@19¶cpu-leakage@1a¶logic-leakage@1b¶wafer-info@1c¶dma-controller@ff6d0000arm,pl330arm,primecell¶ÿm@ ê×âÛÓ ×apb_pclk:Ndma-controller@ff6e0000arm,pl330arm,primecell¶ÿn@ ê×âÛÔ ×apb_pclk:=clock-controller@ff750000rockchip,rk3399-pmucru¶ÿuÛ†×xin24m/ùrß(Jñ:rclock-controller@ff760000rockchip,rk3399-cru¶ÿvÛ†×xin24m/ùˆÀÀ@ÂÁBÉÂCãÞxíDß#g¸€/¯;šÊðÑ€xhÀ<4`õáõáúð€#ÃFõáúð€ׄׄ ë ëÂׄ:syscon@ff770000&rockchip,rk3399-grfsysconsimple-mfd¶ÿw+:io-domains"rockchip,rk3399-io-voltage-domainãokay q ‡ # -qmipi-dphy-rx0rockchip,rk3399-mipi-dphy-rx0Ûw¥o×dphy-refdphy-cfggrfó = ãdisabled:›usb2phy@e450rockchip,rk3399-usb2phy¶äPÛ{×phyclk/clk_usbphy0_480mãokay:%host-port =ê mlinestateãokayMˆ:&otg-port =0êghjmotg-bvalidotg-idlinestateãokay:)usb2phy@e460rockchip,rk3399-usb2phy¶ä`Û|×phyclk/clk_usbphy1_480mãokay:'host-port =ê mlinestateãokayM‰:(otg-port =0êlmomotg-bvalidotg-idlinestateãokay:+phy@f780rockchip,rk3399-emmc-phy¶÷€$ÛŠ×emmcclk H2 =ãokay:$pcie-phyrockchip,rk3399-pcie-phyÛŠ×refclk =ˇÒphy ãdisabled:phy@ff7c0000rockchip,rk3399-typec-phy¶ÿ|Û~}×tcpdcoretcpdphy-ref~ßúð€óË•”LÒuphyuphy-pipeuphy-tcphyãokaydp-port =:-usb3-port =:*phy@ff800000rockchip,rk3399-typec-phy¶ÿ€Û€×tcpdcoretcpdphy-ref€ßúð€ó Ë�œMÒuphyuphy-pipeuphy-tcphyãokaydp-port =:.usb3-port =:,watchdog@ff848000 rockchip,rk3399-wdtsnps,dw-wdt¶ÿ„€Û|êxrktimer@ff850000rockchip,rk3399-timer¶ÿ…êQÛhZ ×pclktimerspdif@ff870000rockchip,rk3399-spdif¶ÿ‡êBûNtx ×mclkhclkÛU×adefaulto‹óS ãdisabledi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2s¶ÿˆê'ûNNtxrx×i2s_clki2s_hclkÛVÔadefaultoŒóS ãdisabledi2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s¶ÿ‰ê(ûNNtxrx×i2s_clki2s_hclkÛWÕadefaulto�óS ãdisabledi2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s¶ÿŠê)ûNNtxrx×i2s_clki2s_hclkÛXÖóSãokay:žvop@ff8f0000rockchip,rk3399-vop-lit¶ÿ�>üêwÛÛßׄõáÛÛµÛ×aclk_vopdclk_vophclk_vopÃŽóË Òaxiahbdclkãokayport+:endpoint@0¶d�:¤endpoint@1¶d�:©endpoint@2¶d‘:¢endpoint@3¶d’:¦endpoint@4¶d“:0iommu@ff8f3f00rockchip,iommu¶ÿ�?êwÛÛÛ ×aclkifaceóÊãokay:Žvop@ff900000rockchip,rk3399-vop-big¶ÿ�>üêvÙÙßׄõáÛÙ´Ù×aclk_vopdclk_vophclk_vopÔóË Òaxiahbdclkãokayport+:endpoint@0¶d•:¨endpoint@1¶d–:£endpoint@2¶d—:¡endpoint@3¶d˜:¥endpoint@4¶d™:/iommu@ff903f00rockchip,iommu¶ÿ�?êvÛÙÙ ×aclkifaceóÊãokay:”isp0@ff910000rockchip,rk3399-cif-isp¶ÿ‘@ê+Ûnéã×ispaclkhclkÚµ›ºdphyó ãdisabledports+port@0¶+iommu@ff914000rockchip,iommu ¶ÿ‘@ÿ‘Pê+Ûéã ×aclkifaceÊó \:šisp1@ff920000rockchip,rk3399-cif-isp¶ÿ’@ê,Ûoêä×ispaclkhclkܵ�ºdphyó ãdisabledports+port@0¶+iommu@ff924000rockchip,iommu ¶ÿ’@ÿ’Pê,Ûêä ×aclkifaceÊó \:œhdmi-soundsimple-audio-card wi2s � ªhdmi-soundãokaysimple-audio-card,cpu Ážsimple-audio-card,codec ÁŸhdmi@ff940000rockchip,rk3399-dw-hdmi¶ÿ”ê(Ûtqpo×iahbisfrcecgrfrefóîSãokay Ë :Ÿportsport+endpoint@0¶d¡:—endpoint@1¶d¢:‘mipi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi¶ÿ–€ê- Û¢p£o×refpclkphy_cfggrfóËûÒapb+ ãdisabledports+port@0¶+endpoint@0¶d£:–endpoint@1¶d¤:�mipi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi¶ÿ–€€ê. Û¢q¤o×refpclkphy_cfggrfóËüÒapb+ = ãdisabled:�ports+port@0¶+endpoint@0¶d¥:˜endpoint@1¶d¦:’edp@ff970000rockchip,rk3399-edp¶ÿ—€ê Ûjlo ×dppclkgrfadefaulto§óËÒdp ãdisabledports+port@0¶+endpoint@0¶d¨:•endpoint@1¶d©:�gpu@ff9a0000#rockchip,rk3399-maliarm,mali-t860¶ÿš0ê mjobmmugpuÛÐâó#ãokayª ׫:Ypinctrlrockchip,rk3399-pinctrl»+Ägpio@ff720000rockchip,gpio-bank¶ÿrÛrê ã óÞF:±gpio@ff730000rockchip,gpio-bank¶ÿsÛrê ã óÞF:ygpio@ff780000rockchip,gpio-bank¶ÿxÛPê ã óÞF:·gpio@ff788000rockchip,gpio-bank¶ÿx€ÛQê ã óÞF:gpio@ff790000rockchip,gpio-bank¶ÿyÛRê ã óÞF:µpcfg-pull-up ÿ:¯pcfg-pull-down :°pcfg-pull-none :¬pcfg-pull-none-12ma  ( :®pcfg-pull-none-13ma  ( :­pcfg-pull-none-18ma  (pcfg-pull-none-20ma  (pcfg-pull-up-2ma ÿ (pcfg-pull-up-8ma ÿ (pcfg-pull-up-18ma ÿ (pcfg-pull-up-20ma ÿ (pcfg-pull-down-4ma  (pcfg-pull-down-8ma  (pcfg-pull-down-12ma  ( pcfg-pull-down-18ma  (pcfg-pull-down-20ma  (pcfg-output-high 7pcfg-output-low Cpcfg-input-enable Npcfg-input-pull-up N ÿ (pcfg-input-pull-down N  (clockclk-32k [¬cifcif-clkin [ ¬cif-clkouta [ ¬edpedp-hpd [¬:§gmacrgmii-pinsð [­¬ ¬ ­ ¬ ¬¬¬¬­­¬¬­­:rmii-pins  [ ¬ ­ ¬ ¬ ¬¬¬¬­­i2c0i2c0-xfer [¬¬:xi2c1i2c1-xfer [¬¬:2i2c2i2c2-xfer [®®:3i2c3i2c3-xfer [¬¬:4i2c4i2c4-xfer [ ¬ ¬:~i2c5i2c5-xfer [ ¬ ¬:5i2c6i2c6-xfer [ ¬ ¬:6i2c7i2c7-xfer [¬¬:7i2c8i2c8-xfer [¬¬:i2s0i2s0-2ch-bus` [¬¬¬¬¬¬i2s0-8ch-bus� [¬¬¬¬¬¬¬¬¬:Œi2s1i2s1-2ch-busP [¬¬¬¬¬:�sdio0sdio0-bus1 [¯sdio0-bus4@ [¯¯¯¯sdio0-cmd [¯sdio0-clk [¬sdio0-cd [¯sdio0-pwr [¯sdio0-bkpwr [¯sdio0-wp [¯sdio0-int [¯sdmmcsdmmc-bus1 [¯sdmmc-bus4@ [¯ ¯ ¯ ¯:!sdmmc-clk [ ¬:sdmmc-cmd [ ¯:sdmmc-cd [¯: sdmmc-wp [¯suspendap-pwroff [¬ddrio-pwroff [¬spdifspdif-bus [¬:‹spdif-bus-1 [¬spi0spi0-clk [¯:>spi0-cs0 [¯:Aspi0-cs1 [¯spi0-tx [¯:?spi0-rx [¯:@spi1spi1-clk [ ¯:Bspi1-cs0 [ ¯:Espi1-rx [¯:Dspi1-tx [¯:Cspi2spi2-clk [ ¯:Fspi2-cs0 [ ¯:Ispi2-rx [ ¯:Hspi2-tx [ ¯:Gspi3spi3-clk [¯:sspi3-cs0 [¯:vspi3-rx [¯:uspi3-tx [¯:tspi4spi4-clk [¯:Jspi4-cs0 [¯:Mspi4-rx [¯:Lspi4-tx [¯:Kspi5spi5-clk [¯:Ospi5-cs0 [¯:Rspi5-rx [¯:Qspi5-tx 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compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4mmc0mmc1cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesoperating-points-v2cpu-supplyphandleduration-usexit-latency-usentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usmin-residency-usportsrockchip,pmudevfreq-eventsclock-namesstatusinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-mapmax-link-speedmsi-mapphysphy-namesrangesresetsreset-namesinterrupt-controllerpower-domainsrockchip,grfsnps,txpblassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modepinctrl-namespinctrl-0snps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaymax-frequencyfifo-depthassigned-clock-ratesbroken-cdbus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpvmmc-supplyvqmmc-supplyarasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs400-1_8vmmc-hs400-enhanced-strobenon-removabledr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controller#msi-cellsaffinity#io-channel-cellsvref-supplyi2c-scl-rising-time-nsi2c-scl-falling-time-nsreg-shiftreg-io-widthdmasdma-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplyrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvddio-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltfcs,suspend-voltage-selectorvin-supply#pwm-cellsiommus#iommu-cells#dma-cellsarm,pl330-periph-burst#reset-cellsbt656-supplyaudio-supplysdmmc-supplygpio1830-supply#phy-cellsdrive-impedance-ohmrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiddc-i2c-busmali-supplygpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsstdout-pathgpio-fan,speed-mapgpiosautorepeatdebounce-intervallabellinux,codelinux,input-typeenable-active-highpwmspwm-supply