Ð þíºÑ8¯ ( 1¯h ",pine64,quartz64-arockchip,rk35667Pine64 RK3566 Quartz64-A Boardaliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000�/serial@fe650000‰/serial@fe660000‘/serial@fe670000™/serial@fe680000¡/serial@fe690000©/serial@fe6a0000±/serial@fe6b0000¹/serial@fe6c0000Á/serial@fe6d0000É/spi@fe610000Î/spi@fe620000Ó/spi@fe630000Ø/spi@fe640000Ý/ethernet@fe010000ç/mmc@fe2b0000ì/mmc@fe310000cpus cpu@0ñcpu,arm,cortex-a55ýpsci%9Dcpu@100ñcpu,arm,cortex-a55ýpsci%9Dcpu@200ñcpu,arm,cortex-a55ýpsci%9Dcpu@300ñcpu,arm,cortex-a55ýpsci%9D opp-table-0,operating-points-v2LDopp-408000000WQ– ^ »  » Œ0lœ@opp-600000000W#ÃF ^ »  » Œ0opp-816000000W0£, ^ »  » Œ0}opp-1104000000WAÍ´ ^ »  » Œ0opp-1416000000WTfr ^ »  » Œ0opp-1608000000W_Ø" ^à˜à˜Œ0opp-1800000000WkIÒ ^��Œ0firmwarescmi ,arm,scmi-smc‰‚” protocol@14ýšDopp-table-1,operating-points-v2D@opp-200000000W ëÂ^ –¨opp-300000000Wá£^ –¨opp-400000000Wׄ^ –¨opp-600000000W#ÃF^ –¨opp-700000000W)¹'^ » opp-800000000W/¯^B@pmu,arm,cortex-a55-pmu0§äåæç² psci ,arm,psci-1.0smctimer,arm,armv8-timer0§   Åxin24m ,fixed-clockÜn6ìxin24mšDxin32k ,fixed-clockÜ€ìxin32kÿ  defaultšsram@10f000 ,mmio-sramýð ðsram@0,arm,scmi-shmemýDsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahciýü@ › œ �satapmaliverxoob §_*  /sata-phy9K  Ydisabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahciýü€   ¡ ¢satapmaliverxoob §`* /sata-phy9K  Ydisabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3ýüÀ@ §© ¦ § ¥ref_clksuspend_clkbus_clk`host hutmi_wideK q ”xYokay* /usb2-phy‘ ˜high-speedusb@fd000000,rockchip,rk3568-dwc3snps,dwc3ýý@ §ª © ª ¨ref_clksuspend_clkbus_clk`host * /usb2-phyusb3-phy hutmi_wideK q •xYokayinterrupt-controller@fd400000 ,arm,gic-v3 ýý@ýF § ¦»ÌýAÖ(áDusb@fd800000 ,generic-ehciýý€ §‚ ½ ¾ ¼*/usbYokayusb@fd840000 ,generic-ohciýý„ §ƒ ½ ¾ ¼*/usbYokayusb@fd880000 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qDÊvdd_gpuDAregulator-state-memODCDC_REG32DÊvcc_ddrregulator-state-mem[DCDC_REG42Ù2Z ñ2Z DÊvcc_3v3Dregulator-state-memOLDO_REG12Ùw@ñw@ Êvcca1v8_pmuD{regulator-state-mem[sw@LDO_REG22Ù » ñ »  Êvdda_0v9regulator-state-memOLDO_REG32Ù » ñ »  Êvdda0v9_pmuregulator-state-mem[s » LDO_REG42Ù2Z ñ2Z  Êvccio_acodecDregulator-state-memOLDO_REG52Ùw@ñ2Z  Êvccio_sdDregulator-state-memOLDO_REG62Ù2Z ñ2Z  Êvcc3v3_pmuDregulator-state-mem[s2Z LDO_REG72Ùw@ñw@Êvcc_1v8Dregulator-state-memOLDO_REG82Ùw@ñw@ Êvcc1v8_dvpDregulator-state-memOLDO_REG92Ù*¹€ñ*¹€ Êvcc2v8_dvpregulator-state-memOBOOST2ÙLK@ñLK@ÊboostD"regulator-state-memOOTG_SWITCH Êotg_switchregulator-state-memOserial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uartýýÕ §t ,baudclkapb_pclk�##ÿ$ default”¡Yokaypwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwmýý× 0 pwmpclkÿ% default« Ydisabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwmýý× 0 pwmpclkÿ& default« Ydisabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwmýý×  0 pwmpclkÿ' default« Ydisabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwmýý×0 0 pwmpclkÿ( default« Ydisabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdýýÙpower-controller!,rockchip,rk3568-power-controller¶ D power-domain@7ý  Ê)¶power-domain@8ý Ì Í Ê*+,¶power-domain@9ý  Ú Û Ü Ê-./¶power-domain@10ý  ñ òÊ012345¶power-domain@11ý  íÊ6¶power-domain@13 ý Ê7¶power-domain@14ý  Ê89:¶power-domain@15ý Ê;<=>?¶gpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrostýýæ@$§()' Ñjobmmugpu gpubus%@K YokayáAD‰mmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcýþ@ §d  Á  Ž �biuciuciu-driveciu-sampleíøðÑ€q ëreset Ydisabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20aýþ§ Ñmacirqeth_wake_irq@ † ‰ ‰ Ç Ã Ä ‰ ÈWstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_refq ì stmmaceth B"3CFDYYokay{ ‰ ‡ †h ‡ †Ebinputozrgmii defaultÿFGHIJK ƒ“ ©N † ¾0ÇÐLmdio,snps,dwmac-mdio ethernet-phy@0,ethernet-phy-ieee802.3-c22ýDLstmmac-axi-configÛåõDBrx-queues-configDCqueue0tx-queues-configDDqueue0qos@fe128000,rockchip,rk3568-qossysconýþ€ D)qos@fe138080,rockchip,rk3568-qossysconýþ€€ D8qos@fe138100,rockchip,rk3568-qossysconýþ� D9qos@fe138180,rockchip,rk3568-qossysconýþ�€ D:qos@fe148000,rockchip,rk3568-qossysconýþ€ D*qos@fe148080,rockchip,rk3568-qossysconýþ€€ D+qos@fe148100,rockchip,rk3568-qossysconýþ� D,qos@fe150000,rockchip,rk3568-qossysconýþ D6qos@fe158000,rockchip,rk3568-qossysconýþ€ D0qos@fe158100,rockchip,rk3568-qossysconýþ� D1qos@fe158180,rockchip,rk3568-qossysconýþ�€ D2qos@fe158200,rockchip,rk3568-qossysconýþ‚ D3qos@fe158280,rockchip,rk3568-qossysconýþ‚€ D4qos@fe158300,rockchip,rk3568-qossysconýþƒ D5qos@fe180000,rockchip,rk3568-qossysconýþ qos@fe190000,rockchip,rk3568-qossysconýþ D;qos@fe190280,rockchip,rk3568-qossysconýþ€ D<qos@fe190300,rockchip,rk3568-qossysconýþ D=qos@fe190380,rockchip,rk3568-qossysconýþ€ D>qos@fe190400,rockchip,rk3568-qossysconýþ D?qos@fe198000,rockchip,rk3568-qossysconýþ€ D7qos@fe1a8000,rockchip,rk3568-qossysconýþ€ D-qos@fe1a8080,rockchip,rk3568-qossysconýþ€€ D.qos@fe1a8100,rockchip,rk3568-qossysconýþ� D/mmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcýþ+@ §b  ° ± Š ‹biuciuciu-driveciu-sampleíøðÑ€q ÔresetYokay1; LU defaultÿMNOP`Qlmmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcýþ,@ §c  ² ³ Œ �biuciuciu-driveciu-sampleíøðÑ€q ÖresetYokay1;y†œR§ default ÿSTUµ`Vlspi@fe300000 ,rockchip,sfcýþ0@ §e x vclk_sfchclk_sfcÿW default Ydisabledmmc@fe310000,rockchip,rk3568-dwcmshcýþ1 §{ { }‹ ëÂn6( | z y { }corebusaxiblocktimerYokay1ç`lspdif@fe460000,rockchip,rk3568-spdifýþF §f mclkhclk _ \�XÒtx defaultÿY YokayD­i2s@fe410000,rockchip,rk3568-i2s-tdmýþA §5{ E I‹FÏqFÏq G K :mclk_txmclk_rxhclk�XXÒrxtxq R S tx-mrx-m  defaultÿZ[\] YokayÜD«i2s@fe430000,rockchip,rk3568-i2s-tdmýþC §7 S W <mclk_txmclk_rxhclk�XXÒtxrxq U V tx-mrx-m   Ydisabledpdm@fe440000,rockchip,rk3568-pdmýþD §L Z Ypdm_clkpdm_hclk�X Òrxÿ^_`abc defaultq Xpdm-m  Ydisableddma-controller@fe530000,arm,pl330arm,primecellýþS@§ ÷   apb_pclkD#dma-controller@fe550000,arm,pl330arm,primecellýþU@§÷   apb_pclkDXi2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþZ §/ H G i2cpclkÿd default  Ydisabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþ[ §0 J I i2cpclkÿe default  Ydisabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþ\ §1 L K i2cpclkÿf default Yokayi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþ] §2 N M i2cpclkÿg default  Ydisabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþ^ §3 P O i2cpclkÿh default  Ydisabledwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdtýþ` §•   tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spiýþa §g R Qspiclkapb_pclk�##Òtxrx default ÿijk  Ydisabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spiýþb §h T Sspiclkapb_pclk�##Òtxrx defaultÿlm  Ydisabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spiýþc §i V Uspiclkapb_pclk�##Òtxrx default ÿnop  Ydisabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spiýþd §j X Wspiclkapb_pclk�##Òtxrx default ÿqrs  Ydisabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uartýþe §u  baudclkapb_pclk�##ÿtu default”¡Yokaybluetooth,brcm,bcm43438-btvlpo )w =w Ow default ÿxyz^j{serial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartýþf §v #  baudclkapb_pclk�##ÿ| default”¡Yokayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartýþg §w ' $baudclkapb_pclk�##ÿ} default”¡ Ydisabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uartýþh §x + (baudclkapb_pclk�## ÿ~ default”¡ Ydisabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uartýþi §y / ,baudclkapb_pclk�# # ÿ default”¡ Ydisabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþj §z 3 0baudclkapb_pclk�# # ÿ€ default”¡ Ydisabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþk §{ 7 4baudclkapb_pclk�##ÿ� default”¡ Ydisabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþl §| ; 8baudclkapb_pclk�##ÿ‚ default”¡ Ydisabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþm §} ? <baudclkapb_pclk�##ÿƒ default”¡ Ydisabledthermal-zonescpu-thermalwd�蛄tripscpu_alert0«p·ÐøpassiveD…cpu_alert1«$ø·Ðøpassivecpu_crit«s·Ð øcriticalcpu_hot«ÖØ·ÐøactiveD†cooling-mapsmap0Â…0Çÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿmap1† LJÿÿÿÿÿÿÿÿgpu-thermalw�蛄tripsgpu-threshold«p·Ðøpassivegpu-target«$ø·ÐøpassiveDˆgpu-crit«s·Ð øcriticalcooling-mapsmap0ˆ ljÿÿÿÿÿÿÿÿtsadc@fe710000,rockchip,rk3568-tsadcýþq §s{  ‹f@ ®`  tsadcapb_pclkq � ‚ × Ös initdefaultsleepÿŠí‹÷Š Yokay  .D„saradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcýþr §]  saradcapb_pclkq € saradc-apb I Ydisabledpwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþn Z Y pwmpclkÿŒ default« Ydisabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþn Z Y pwmpclkÿ� default« Ydisabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþn  Z Y pwmpclkÿŽ default« Ydisabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþn0 Z Y pwmpclkÿ� default« Ydisabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo ] \ pwmpclkÿ� default« Ydisabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo ] \ pwmpclkÿ‘ default« Ydisabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo  ] \ pwmpclkÿ’ default« Ydisabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo0 ] \ pwmpclkÿ“ default« Ydisabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp ` _ pwmpclkÿ” default« Ydisabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp ` _ pwmpclkÿ• default« Ydisabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp  ` _ pwmpclkÿ– default« Ydisabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp0 ` _ pwmpclkÿ— default« Ydisabledphy@fe830000,rockchip,rk3568-naneng-combphyýþƒ" }  refapbpipe{"‹õáq Ç [˜ m™ ƒYokayD phy@fe840000,rockchip,rk3568-naneng-combphyýþ„% ~  refapbpipe{%‹õáq É [˜ mš ƒ YdisabledDusb2phy@fe8a0000,rockchip,rk3568-usb2phyýþŠphyclkìclk_usbphy0_480m §‡ Ž›šYokayDhost-port ƒYokayoœDotg-port ƒYokayo�Dusb2phy@fe8b0000,rockchip,rk3568-usb2phyýþ‹phyclkìclk_usbphy1_480m §ˆ ŽžšYokayhost-port ƒYokayoœDotg-port ƒYokayoœDpinctrl,rockchip,rk3568-pinctrl  žŸ gpio@fdd60000,rockchip,gpio-bankýýÖ §!.  « »¦»Dgpio@fe740000,rockchip,gpio-bankýþt §" c d « »¦»gpio@fe750000,rockchip,gpio-bankýþu §# e f « »¦»Dwgpio@fe760000,rockchip,gpio-bankýþv §$ g h « »¦»gpio@fe770000,rockchip,gpio-bankýþw §% i j « »¦»D°pcfg-pull-up ÇD¢pcfg-pull-down ÔD¨pcfg-pull-none ãD pcfg-pull-none-drv-level-1 ã ðD¤pcfg-pull-none-drv-level-2 ã ðD£pcfg-pull-none-drv-level-3 ã ðD§pcfg-pull-up-drv-level-1 Ç ðD¦pcfg-pull-up-drv-level-2 Ç ðD¡pcfg-pull-none-smt ã ÿD¥acodecaudiopwmbt656bt1120camcan0can1can2cifclk32kclk32k-out0  D cpuebcedpdpemmceth0eth1flashfspifspi-pins`       DWgmac0gmac1gmac1m0-miim   DFgmac1m0-clkinout  DJgmac1m0-rx-bus20       DHgmac1m0-tx-bus20  ££ DGgmac1m0-rgmii-clk  ¤DIgmac1m0-rgmii-bus@   ££DKgpuhdmitxi2c0i2c0-xfer  ¥ ¥Di2c1i2c1-xfer  ¥ ¥Ddi2c2i2c2m0-xfer  ¥¥Dei2c3i2c3m0-xfer ¥¥Dfi2c4i2c4m0-xfer  ¥ ¥Dgi2c5i2c5m0-xfer  ¥ ¥Dhi2s1i2s1m0-lrcktx  D[i2s1m0-mclk  D!i2s1m0-sclktx  DZi2s1m0-sdi0   D\i2s1m0-sdo0  D]i2s2i2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk  D^pdmm0-clk1  D_pdmm0-sdi0   D`pdmm0-sdi1   Dapdmm0-sdi2   Dbpdmm0-sdi3  Dcpmicpmic-int-l ¢D pmupwm0pwm0m0-pins  D%pwm1pwm1m0-pins  D&pwm2pwm2m0-pins  D'pwm3pwm3-pins  D(pwm4pwm4-pins  DŒpwm5pwm5-pins  D�pwm6pwm6-pins  DŽpwm7pwm7-pins  D�pwm8pwm8m0-pins   D�pwm9pwm9m0-pins   D‘pwm10pwm10m0-pins   D’pwm11pwm11m0-pins  D“pwm12pwm12m0-pins  D”pwm13pwm13m0-pins  D•pwm14pwm14m0-pins  D–pwm15pwm15m0-pins  D—refclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ ¡¡¡¡DMsdmmc0-clk ¡DNsdmmc0-cmd ¡DOsdmmc0-det ¢DPsdmmc1sdmmc1-bus4@ ¡¡¡¡DSsdmmc1-clk ¡DUsdmmc1-cmd ¡DTsdmmc2spdifspdifm0-tx  DYspi0spi0m0-pins0     Dkspi0m0-cs0  Dispi0m0-cs1  Djspi1spi1m1-pins0    Dmspi1m1-cs0  Dlspi2spi2m0-pins0    Dpspi2m0-cs0  Dnspi2m0-cs1  Dospi3spi3m0-pins0      Dsspi3m0-cs0  Dqspi3m0-cs1  Drtsadctsadc-shutorg  D‹tsadc-pin  DŠuart0uart0-xfer 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Êvcc12v_dcin2Ù·ñ·D¯vbus,regulator-fixedÊvbus2ÙLK@ñLK@D¯D´vcc5v0_usb,regulator-fixed Êvcc5v0_usb2ÙLK@ñLK@D¯D²vcc5v0_usb20_host,regulator-fixed  ް  defaultÿ±Êvcc5v0_usb20_hostÙLK@ñLK@D²Dœvcc5v0_usb20_otg,regulator-fixed  ް Êvcc5v0_usb20_otgÙLK@ñLK@D"D�vcc3v3_sd,regulator-fixed  Ž defaultÿ³2 Êvcc3v3_sdÙ2Z ñ2Z DDQvcc_sys,regulator-fixedÊvcc_sys2ÙC#€ñC#€D´Dvcc_wl,regulator-fixedÊvcc_wl2Ù2Z ñ2Z DDV interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3ethernet0mmc0mmc1device_typeregclocks#cooling-cellsenable-methodoperating-points-v2cpu-supplyphandleopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendarm,smc-idshmem#clock-cellsinterruptsinterrupt-affinityarm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesrangesclock-namesphysphy-namesports-implementedpower-domainsstatusdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconmaximum-speedinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerpmuio1-supplypmuio2-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-always-onregulator-boot-onvin-supplyregulator-off-in-suspendassigned-clock-parentsrockchip,system-power-controller#sound-dai-cellswakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyregulator-init-microvoltregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyfifo-depthmax-frequencyreset-namessnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsoclock_in_outphy-supplyphy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delayphy-handlesnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usebus-widthcap-sd-highspeedcd-gpiosdisable-wpvmmc-supplyvqmmc-supplycap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr104mmc-hs200-1_8vdma-namesrockchip,trcm-sync-tx-onlyarm,pl330-periph-burst#dma-cellsuart-has-rtsctsdevice-wakeup-gpioshost-wakeup-gpiosshutdown-gpiosvbat-supplyvddio-supplypolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsstdout-pathgpio-fan,speed-maplabeldefault-stateretain-state-suspendedlinux,default-triggersimple-audio-card,formatsimple-audio-card,namesimple-audio-card,mclk-fssound-daipost-power-on-delay-mspower-off-delay-usreset-gpiosenable-active-highenable-active-low