Ð þíAÎ8H((† ',Qualcomm Technologies, Inc. SM8650 HDK2qcom,sm8650-hdkqcom,sm8650 =embeddedchosenJserial0:115200n8clocksxo-board 2fixed-clockVc“àsèsleep-clk 2fixed-clockVc}s)bi-tcxo-div2-clk2fixed-factor-clockV{‚�s'bi-tcxo-ao-div2-clk2fixed-factor-clockV{‚�s(cpus cpu@0—cpu2arm,cortex-a520£{§µpsciÈpsciÖçúd%sl2-cache2cache4@Ösl3-cache2cache4@scpu@100—cpu2arm,cortex-a520£{§µpsciÈpsciÖçúd%scpu@200—cpu2arm,cortex-a720£{§µpsciÈpsciÖ çúî%sl2-cache2cache4@Ös cpu@300—cpu2arm,cortex-a720£{§ µpsciÈpsciÖ çúî%scpu@400—cpu2arm,cortex-a720£{§ µpsciÈpsciÖ çúî%sl2-cache2cache4@Ös cpu@500—cpu2arm,cortex-a720£{§ µpsciÈpsciÖçúî%sl2-cache2cache4@Öscpu@600—cpu2arm,cortex-a720£{§µpsciÈpsciÖçúî%sl2-cache2cache4@Öscpu@700—cpu2arm,cortex-x4£{§µpsciÈpsciÖçfúL%sl2-cache2cache4@Öscpu-mapcluster0core0Ncore1Ncore2Ncore3Ncore4Ncore5Ncore6Ncore7Nidle-statesRpscicpu-sleep-0-02arm,idle-state_silver-rail-power-collapseo@†&—î§,¸s cpu-sleep-1-02arm,idle-state_gold-rail-power-collapseo@†X—§È¸s!cpu-sleep-2-02arm,idle-state_gold-plus-rail-power-collapseo@†ô—F§8¸s"domain-idle-statescluster-sleep-02domain-idle-stateoAD†î— .§#¸s#cluster-sleep-12domain-idle-stateoAÃD† ð—0§'¦s$firmwarescm2qcom,scm-sm8650qcom,scmÉ�Ùs(interconnect-02qcom,sm8650-clk-virtçûs0interconnect-12qcom,sm8650-mc-virtçûsmemory@a0000000—memory£ pmu-a5202arm,cortex-a520-pmu  pmu-a7202arm,cortex-a720-pmu  pmu-x42arm,cortex-x4-pmu  psci 2arm,psci-1.0Ïsmcpower-domain-cpu0§* spower-domain-cpu1§* spower-domain-cpu2§* spower-domain-cpu3§*!s power-domain-cpu4§*!s power-domain-cpu5§*!s power-domain-cpu6§*!spower-domain-cpu7§*"spower-domain-cluster*#$sreserved-memory =s)hyp@80000000£€àDs*cpusys-vm@80e00000£€à@Ds+xbl-dt-log-merged@81a00000£� &Ds,aop-cmd-db@81c60000 2qcom,cmd-db£�ÆDs-aop-tme-uefi-merged@81c80000£�ÈPDs.smem@81d00000 2qcom,smem£�Ð K%Ds/adsp-mhi@81f00000£�ðDs0pvmfw@824a0000£‚JDs1global-sync@82600000£‚`Dsûtz-stat@82700000£‚pDs2qdss@82800000£‚€Ds3qlink-logging@84800000£„€ Dsžmpss-dsm@86b00000£†°�Dsœmpss-dsm-2@8b400000£‹@€Ds�mpss@8bc00000£‹À@Dsšq6-mpss-dtb@9b000000£›Ds›ipa-fw@9b080000£›Ds—ipa-gsi@9b090000£›  Ds4gpu-micro-code@9b09a000£›   Ds‘spss@9b0a0000£› Ds5spu-tz-shared@9b280000£›(Ds6spu-modem-shared@9b2e0000£›.Ds7camera@9b300000£›0€Ds8video@9bb00000£›°€Ds9cvp@9c300000£œ0pDs:cdsp@9ca00000£œ @Dsùq6-cdsp-dtb@9de00000£�àDsúq6-adsp-dtb@9de80000£�èDsõadspslpi@9df00000£�ðDsôrmtfs@d7c000002qcom,rmtfs-mem£×À@DSbs;tz-merged@d8000000£Ø€Ds<hwfence-shbuf@e6440000£æD-ÐDs=trust-ui-vm@f3800000£ó€@Ds>oem-vm@f7c00000£÷ÀÀDs?llcc-lpi@ff800000£ÿ€`Ds@smp2p-adsp 2qcom,smp2pl& €&‡»­‘ master-kernel°master-kernelÀsöslave-kernel °slave-kernel×ìsòsmp2p-cdsp 2qcom,smp2pl& €&‡^°‘ master-kernel°master-kernelÀsüslave-kernel °slave-kernel×ìs÷smp2p-modem 2qcom,smp2pl& €&‡³¬‘ master-kernel°master-kernelÀsŸslave-kernel °slave-kernel×ìs˜ipa-ap-to-modem°ipaÀs–ipa-modem-to-ap°ipa×ìs•soc@0 2simple-bus ý=sAclock-controller@1000002qcom,sm8650-gcc£B@{'()*++,,,-Vs/mailbox@4060002qcom,sm8650-ipccqcom,ipcc£@`  å×ìs&dma-controller@800000(2qcom,sm8650-gpi-dmaqcom,sm6350-gpi-dma£€� LMNOPQRSTUVW! .?? J.6Q ^disableds3geniqup@8c00002qcom,geni-se-qup£Œ {/�/‘ em-ahbs-ahb J.#Q =^okaysBi2c@8800002qcom,geni-i2c£ˆ@  u{/veseHÙ0012qqup-corequp-configqup-memory „33‰txrx“4�default  ^disabledsCspi@8800002qcom,geni-spi£ˆ@  u{/veseHÙ0012qqup-corequp-configqup-memory „33‰txrx“56�default  ^disabledsDi2c@8840002qcom,geni-i2c£ˆ@@  G{/xeseHÙ0012qqup-corequp-configqup-memory „33‰txrx“7�default  ^disabledsEspi@8840002qcom,geni-spi£ˆ@@  G{/xeseHÙ0012qqup-corequp-configqup-memory „33‰txrx“89�default  ^disabledsFi2c@8880002qcom,geni-i2c£ˆ€@  H{/zeseHÙ0012qqup-corequp-configqup-memory „33‰txrx“:�default  ^disabledsGspi@8880002qcom,geni-spi£ˆ€@  H{/zeseHÙ0012qqup-corequp-configqup-memory „33‰txrx“;<�default  ^disabledsHi2c@88c0002qcom,geni-i2c£ˆÀ@  I{/|eseHÙ0012qqup-corequp-configqup-memory „33‰txrx“=�default  ^disabledsIspi@88c0002qcom,geni-spi£ˆÀ@  I{/|eseHÙ0012qqup-corequp-configqup-memory „33‰txrx“>?�default  ^disabledsJi2c@8900002qcom,geni-i2c£‰@  J{/~eseHÙ0012qqup-corequp-configqup-memory „33‰txrx“@�default  ^disabledsKspi@8900002qcom,geni-spi£‰@  J{/~eseHÙ0012qqup-corequp-configqup-memory „33‰txrx“AB�default  ^disabledsLi2c@8940002qcom,geni-i2c£‰@@  K{/€eseHÙ0012qqup-corequp-configqup-memory „33‰txrx“C�default  ^disabledsMspi@8940002qcom,geni-spi£‰@@  K{/€eseHÙ0012qqup-corequp-configqup-memory „33‰txrx“DE�default  ^disabledsNserial@8980002qcom,geni-uart£‰€@  Í{/‚ese0Ù0012qqup-corequp-config“FG�default^okaysObluetooth2qcom,wcn7850-bt«H¼IÊJÙKèLùM N0Ôserial@89c0002qcom,geni-debug-uart£‰À@  Î{/„ese0Ù0012qqup-corequp-config“O�default^okaysPgeniqup@9c00002qcom,geni-se-i2c-master-hub£œ {/\es-ahb = ^disabledsQi2c@9800002qcom,geni-i2c-master-hub£˜@  Ð{/H/Gesecore0Ù0012qqup-corequp-config“P�default  ^disabledsRi2c@9840002qcom,geni-i2c-master-hub£˜@@  Ñ{/J/Gesecore0Ù0012qqup-corequp-config“Q�default  ^disabledsSi2c@9880002qcom,geni-i2c-master-hub£˜€@  Ò{/L/Gesecore0Ù0012qqup-corequp-config“R�default  ^disabledsTi2c@98c0002qcom,geni-i2c-master-hub£˜À@  Ó{/N/Gesecore0Ù0012qqup-corequp-config“S�default  ^disabledsUi2c@9900002qcom,geni-i2c-master-hub£™@  Ô{/P/Gesecore0Ù0012qqup-corequp-config“T�default  ^disabledsVi2c@9940002qcom,geni-i2c-master-hub£™@@  Õ{/R/Gesecore0Ù0012qqup-corequp-config“U�default  ^disabledsWi2c@9980002qcom,geni-i2c-master-hub£™€@  Ö{/T/Gesecore0Ù0012qqup-corequp-config“V�default  ^disabledsXi2c@99c0002qcom,geni-i2c-master-hub£™À@  ×{/V/Gesecore0Ù0012qqup-corequp-config“W�default  ^disabledsYi2c@9a00002qcom,geni-i2c-master-hub£š@  Ø{/X/Gesecore0Ù0012qqup-corequp-config“X�default  ^disabledsZi2c@9a40002qcom,geni-i2c-master-hub£š@@  Ù{/Z/Gesecore0Ù0012qqup-corequp-config“Y�default  ^disableds[dma-controller@a00000(2qcom,sm8650-gpi-dmaqcom,sm6350-gpi-dma£ � %&'()*! . ? J.¶Q^okays[geniqup@ac00002qcom,geni-se-qup£¬ {/Œ/� em-ahbs-ahbÙ00 qqup-core J.£Q =^okays\i2c@a800002qcom,geni-i2c£¨@  a{/aeseHÙ0012Zqqup-corequp-configqup-memory „[[‰txrx“\�default  ^disableds]spi@a800002qcom,geni-spi£¨@  a{/aeseHÙ0012Zqqup-corequp-configqup-memory „[[‰txrx“]^�default  ^disableds^i2c@a840002qcom,geni-i2c£¨@@  b{/ceseHÙ0012Zqqup-corequp-configqup-memory „[[‰txrx“_�default  ^disableds_spi@a840002qcom,geni-spi£¨@@  b{/ceseHÙ0012Zqqup-corequp-configqup-memory „[[‰txrx“`a�default  ^disableds`i2c@a880002qcom,geni-i2c£¨€@  c{/eeseHÙ0012Zqqup-corequp-configqup-memory „[[‰txrx“b�default  ^disabledsaspi@a880002qcom,geni-spi£¨€@  c{/eeseHÙ0012Zqqup-corequp-configqup-memory „[[‰txrx“cd�default  ^disabledsbi2c@a8c0002qcom,geni-i2c£¨À@  d{/geseHÙ0012Zqqup-corequp-configqup-memory „[[‰txrx“e�default ^okaysctypec-mux@e&2qcom,wcd9395-usbssqcom,wcd9390-usbss£%f 0g˜<Hsdports port@0£endpoint[hsspi@a8c0002qcom,geni-spi£¨À@  d{/geseHÙ0012Zqqup-corequp-configqup-memory „[[‰txrx“ij�default  ^disabledsei2c@a900002qcom,geni-i2c£©@  e{/ieseHÙ0012Zqqup-corequp-configqup-memory „[[‰txrx“k�default  ^disabledsfspi@a900002qcom,geni-spi£©@  e{/ieseHÙ0012Zqqup-corequp-configqup-memory „[[‰txrx“lm�default ^okayledsgtouchscreen@0�default“ÒÓ(s `(`8(NB@(B³ 0g¡ ¢g£2goodix,gt9916i2c@a940002qcom,geni-i2c£©@@  f{/keseHÙ0012Zqqup-corequp-configqup-memory „[[‰txrx“n�default  ^disabledshspi@a940002qcom,geni-spi£©@@  f{/keseHÙ0012Zqqup-corequp-configqup-memory „[[‰txrx“op�default  ^disabledsii2c@a980002qcom,geni-i2c£©€@  k{/meseHÙ0012Zqqup-corequp-configqup-memory „[[‰txrx“q�default  ^disabledc€sjhdmi-bridge@2b ^disabledt962lontium,lt9611uxc£+ lgU 0g%rks“tu�defaultskports port@0£endpoint[vsÐport@2£endpoint[wsspi@a980002qcom,geni-spi£©€@  k{/meseHÙ0012Zqqup-corequp-configqup-memory „[[‰txrx“xy�default  ^disabledsli2c@a9c0002qcom,geni-i2c£©À@  C{/oeseHÙ0012Zqqup-corequp-configqup-memory „[[‰txrx“z�default  ^disabledsmspi@a9c0002qcom,geni-spi£©À@  C{/oeseHÙ0012Zqqup-corequp-configqup-memory „[[‰txrx“{|�default  ^disabledsninterconnect@15000002qcom,sm8650-cnoc-main£P@€ûçs~interconnect@16000002qcom,sm8650-config-noc£`bûçs2interconnect@16800002qcom,sm8650-system-noc£hЀûçsointerconnect@16c00002qcom,sm8650-pcie-anoc£l"{// ûçs}interconnect@16e00002qcom,sm8650-aggre1-noc£nd{//ûçsZinterconnect@17000002qcom,sm8650-aggre2-noc£pä{ ûçsinterconnect@17800002qcom,sm8650-mmss-noc£x¸ûçsÇrng@10c30002qcom,sm8650-trngqcom,trng£ 0sppcie@1c00000—pci"2qcom,pcie-sm8650qcom,pcie-sm8550P£À0`` ¨``vparfdbielbiatuconfig` �Ž��‘’“”(€msi0msi1msi2msi3msi4msi5msi6msi7@{/$/&/'/,/-/ // Ieauxcfgbus_masterbus_slaveslave_q2addrss_sf_tbunoc_aggrcnoc_sf_axi�/—pci0Ù}1~ qpcie-memcpu-pcie§/ £.. ­•–—˜»ì ÎÖÿãôþÿ* pciephy 8=` `0`0ÐQ^okay g` "g^“€�defaultsqpcie@0—pci£þÿ =srwifi@0 2pci17cb,1107£«H¼IÊJÙKèLùM N.�@‚phy@1c06000 2qcom,sm8650-qmp-gen3x2-pcie-phy£À` ({/$/&/(/*eauxcfg_ahbrefrchngpipeR/(bõá�/—phy§/Vwpcie0_pipe_clkŠ^okay•ƒ¥„s*pcie@1c08000—pci"2qcom,pcie-sm8650qcom,pcie-sm8550P£À€0@@ ¨@@vparfdbielbiatuconfig` 34589:vw(€msi0msi1msi2msi3msi4msi5msi6msi7@{/./0/1/8/9/ // Ieauxcfgbus_masterbus_slaveslave_q2addrss_sf_tbunoc_aggrcnoc_sf_axiR/.b$ø�// —pcilink_down0Ù}1~ qpcie-memcpu-pcie§/ £.€.� ­²³¶·»ì ΀�Öÿãôþÿ+ pciephyQ 8=@ @0@0Ð^okay gc "ga“…�defaultsspcie@0—pci£þÿ =phy@1c0e000 2qcom,sm8650-qmp-gen4x2-pcie-phy£Àà ({/2/0/4/6eauxcfg_ahbrefrchngpipeR/4bõá�/ / —phyphy_nocsr§/Vwpcie1_pipe_clkŠ^okay•†¥„µƒs+dma-controller@1dc40002qcom,bam-v1.7.0£Ü@€  ?J.€.�ÆÎs‡crypto@1dfa000)2qcom,sm8650-qceqcom,sm8150-qceqcom,qce£ß `Ùqmemory„‡‡‰rxtxJ.€.�stphy@1d800002qcom,sm8650-qmp-ufs-phy£Ø {/¡erefref_auxqref�ˆ—ufsphy§/VŠ^okay•‰¥„s,ufs@1d84000+2qcom,sm8650-ufshcqcom,ufshcjedec,ufs-2.0£Ø@0   @{/›//š/ª/¨/¤/¦necore_clkbus_aggr_clkiface_clkcore_clk_uniproref_clktx_lane0_sync_clkrx_lane0_sync_clkrx_lane1_sync_clk@çõáJÀõáJÀõáJÀ�/—rst0ÙZ12%qufs-ddrcpu-ufs§/õŠ J.`‹, ufsphy^okay 0gÒkŒ Ö 1�=O€sˆcrypto@1d88000;2qcom,sm8650-inline-crypto-engineqcom,inline-crypto-engine£Ø€€{/žs‹hwlock@1f400002qcom,tcsr-mutex£ôOs%clock-controller@1fc00002qcom,sm8650-tcsrsyscon£ü {Vsgpu@3d00000!2qcom,adreno-43051401qcom,adreno0£ÐÙà Ö#vkgsl_3d0_reg_memorycx_memcx_dbgc  ,JŽŽ]�q�%^okayszap-shaderz‘ˆqcom/sm8650/gen70900_zap.mbnopp-table2operating-points-v2s�opp-231000000– ÄÇÀ�4opp-310000000–z9€�8opp-366000000–з€�<opp-422000000–'5€�@opp-500000000–Íe�Popp-578000000–"s”€�€opp-629000000–%}Ç@��opp-680000000–(‡ú�Àopp-720000000–*êT�àopp-770000000–-åD€�opp-834000000–1µÔ€�@gmu@3d6a000&2qcom,adreno-gmu-750.1qcom,adreno-gmu0£Ö PÕ (vgmursccgmu_pdc 01€hfigmu8{’’’/ /"’’!eahbgmucxoaximemnochubdemet§’’µcxgx Jާ“]”s�opp-table2operating-points-v2s”opp-260000000–I�@opp-625000000–%@¾@�€clock-controller@3d900002qcom,sm8650-gpucc£Ù {'/ /!Vs’iommu@3da0000@2qcom,sm8650-smmu-500qcom,adreno-smmuqcom,smmu-500arm,mmu-500£Ú°½8 ¡¥¦§¨©ª«¬­®¯¦Ü>?@A“•˜™šœ�» {’/"/#’ehlosbusifaceahb§’QsŽipa@3f40000 2qcom,sm8650-ipaqcom,sm8550-ipaJ. .¢0£ôõPà@Àvipa-regipa-sharedgsi8lް••(€ipagsiipa-clock-queryipa-setup-ready{ ecore0Ù12qmemoryconfig§“Ж–*áipa-clock-enabled-validipa-clock-enabled^okay÷selfz—ˆqcom/sm8650/ipa_fws.mbnsuremoteproc@40800002qcom,sm8650-mpss-pas£@@Ll˜˜˜˜˜0€wdogfatalreadyhandoverstop-ackshutdown-ack{exoÙ§™™ µcxmsszš›œ�ž§“Пástop^okay0ˆqcom/sm8650/modem.mbnqcom/sm8650/modem_dtb.mbnsvglink-edgel& €& mpsscodec@6aa000082qcom,sm8650-lpass-wsa-macroqcom,sm8550-lpass-wsa-macro£ª({ D f g¡emclkmacrodcodecfsgenV wwsa2-mclk s¢soundwire@6ab00002qcom,soundwire-v2.0.0£«  «{¢eifaceWSA2“£�default- =??�ÿÿÿ Rÿÿ ÿ eÿÿÿÿÿÿÿÿÿ xÿÿÿÿÿÿÿÿÿÿÿ Šÿÿÿÿÿÿÿÿÿÿÿ ›ÿÿÿÿÿÿÿÿÿÿÿ ² Íÿÿÿÿÿÿÿÿÿÿÿÿÿ êÿÿÿÿÿÿÿÿÿÿÿÿÿ   ^disabledswcodec@6ac000062qcom,sm8650-lpass-rx-macroqcom,sm8550-lpass-rx-macro£¬({ @ f g¡emclkmacrodcodecfsgenVwmclk s¤soundwire@6ad00002qcom,soundwire-v2.0.0£­  ›{¤eifaceRX“¥�default- =ÿÿ1ÿÿÿ R ÿÿÿÿÿ e ÿÿÿÿÿ xÿÿÿÿÿÿÿÿÿ Šÿÿÿÿÿÿÿÿÿ ›ÿÿÿÿÿÿÿ ²ÿÿÿÿÿÿÿÿ Íÿÿÿÿÿÿÿÿ êÿÿÿÿÿ  ^okayscodec@0,42sdw20217010e00£ s"codec@6ae000062qcom,sm8650-lpass-tx-macroqcom,sm8550-lpass-tx-macro£®({ 9 f g¡emclkmacrodcodecfsgenVwmclk s¬codec@6b0000082qcom,sm8650-lpass-wsa-macroqcom,sm8550-lpass-wsa-macro£°({ B f g¡emclkmacrodcodecfsgenVwmclk s¦soundwire@6b100002qcom,soundwire-v2.0.0£±  ª{¦eifaceWSA“§�default- =??�ÿÿÿ Rÿÿ ÿ eÿÿÿÿÿÿÿÿÿ xÿÿÿÿÿÿÿÿÿÿÿ Šÿÿÿÿÿÿÿÿÿÿÿ ›ÿÿÿÿÿÿÿÿÿÿÿ ² Íÿÿÿÿÿÿÿÿÿÿÿÿÿ êÿÿÿÿÿÿÿÿÿÿÿÿÿ  ^okays speaker@0,02sdw20217020400£“¨�default ©  'SpkrLeft9fHªV sspeaker@0,12sdw20217020400£“«�default gM  'SpkrRight9fHªV ssoundwire@6d300002qcom,soundwire-v2.0.0£Ó ð €corewakeup{¬eifaceTX“­�default-hRexÿÿÿÿŠÿÿÿÿ›ÿÿÿÿ²ÿÿÿÿÍÿÿÿÿê  ^okayscodec@0,32sdw20217010e00£�s#codec@6d4400062qcom,sm8650-lpass-va-macroqcom,sm8550-lpass-va-macro£Ô@${ 9 f gemclkmacrodcodecVwfsgen s¡pinctrl@6e800002qcom,sm8650-lpass-lpi-pinctrl£è{ f g ecoreaudio–¦²©s©tx-swr-active-states­clk-pins¾gpio0 Ãswr_tx_clkÌÛådata-pins¾gpio1gpio2gpio14 Ãswr_tx_dataÌÛòrx-swr-active-states¥clk-pins¾gpio3 Ãswr_rx_clkÌÛådata-pins ¾gpio4gpio5 Ãswr_rx_dataÌÛòdmic01-default-statesxclk-pins¾gpio6 Ãdmic1_clkÌ data-pins¾gpio7 Ãdmic1_dataÌ dmic23-default-statesyclk-pins¾gpio8 Ãdmic2_clkÌ data-pins¾gpio9 Ãdmic2_dataÌ wsa-swr-active-states§clk-pins¾gpio10 Ãwsa_swr_clkÌÛådata-pins¾gpio11 Ãwsa_swr_dataÌÛòwsa2-swr-active-states£clk-pins¾gpio15 Ãwsa2_swr_clkÌÛådata-pins¾gpio16Ãwsa2_swr_dataÌÛòspkr-1-sd-n-active-state¾gpio21ÃgpioÌå s¨interconnect@74000002qcom,sm8650-lpass-lpiaon-noc£@�€çûszinterconnect@74300002qcom,sm8650-lpass-lpicx-noc£C¢çûsóinterconnect@7e400002qcom,sm8650-lpass-ag-noc£äà€çûs{mmc@8804000$2qcom,sm8650-sdhciqcom,sdhci-msm-v5£€@ Ï߀hc_irqpwr_irq{/”/•eifacecorexo0Ù12 qsdhc-ddrcpu-sdhc§™]® J.@ $ . >d, N€hQ^okay ^¯  g° s± € ˆ“²³ �´³�defaultsleeps|opp-table2operating-points-v2s®opp-19200000–$øõµopp-50000000–úð€õ¶opp-100000000–õáõ·opp-202000000– F€õ¸clock-controller@aaf00002qcom,sm8650-videocc£ ¯ {'/¸§™Vs}cci@ac15000!2qcom,sm8650-cciqcom,msm8996-cci£ ÁP  ª§¹{¹¹¹ ecamnoc_axicpas_ahbcci“º» �¼½�defaultsleep ^disabled s~i2c-bus@0£cB@ si2c-bus@1£cB@ s€cci@ac16000!2qcom,sm8650-cciqcom,msm8996-cci£ Á`  «§¹{¹¹¹ ecamnoc_axicpas_ahbcci“¾¿ �ÀÁ�defaultsleep ^disabled s�i2c-bus@0£cB@ s‚i2c-bus@1£cB@ sƒcci@ac17000!2qcom,sm8650-cciqcom,msm8996-cci£ Áp  ¬§¹{¹¹¹ecamnoc_axicpas_ahbcci“Âà �ÄÅ�defaultsleep ^disabled s„i2c-bus@0£cB@ s…i2c-bus@1£cB@ s†clock-controller@ade00002qcom,sm8650-camcc£ Þ{/'()§™Vs¹display-subsystem@ae000002qcom,sm8650-mdss£ àvmdss  S{Æ/Æ=�Æ0ÙÇ1qmdp0-memmdp1-mem§Æ J.×ì =^okaysÈdisplay-controller@ae010002qcom,sm8650-dpu £ àð ë  vmdpvbiflÈ({/ÆÆ@Æ=ÆIenrt_busifacelutcorevsyncRÆIb$ø]ɧ™s‡ports port@0£endpoint[ÊsÏport@1£endpoint[ËsÒport@2£endpoint[ÌsÕopp-table2operating-points-v2sÉopp-200000000– ëÂõ¶opp-325000000–_@õ·opp-375000000–Z Àõ¸opp-514000000–£€õŠdsi@ae94000(2qcom,sm8650-dsi-ctrlqcom,mdss-dsi-ctrl£ é@ vdsi_ctrllÈ0{ÆÆÆBÆ8Æ/$ebytebyte_intfpixelcoreifacebusRÆÆC ™ÍÍ]Χ™Í dsi ^okay °„sˆpanel@0�defaultsleep �ÏΓÍÎ%°(7²³± 0g…£2visionox,vtdr6130portendpointsÑ[vports port@0£endpoint[ÏsÊport@1£endpoint[Ñ ¼svopp-table2operating-points-v2sÎopp-187500000– -àõ¶opp-300000000–á£õ·opp-358000000–V¥€õ¸phy@ae950002qcom,sm8650-dsi-phy-4nm0£ éP éR€ éUvdsi_phydsi_phy_lanedsi_pll{Æ eifacerefVŠ^okay ǃsÍdsi@ae96000(2qcom,sm8650-dsi-ctrlqcom,mdss-dsi-ctrl£ é` vdsi_ctrllÈ0{ÆÆ ÆDÆ:Æ/$ebytebyte_intfpixelcoreifacebusRÆ ÆE ™ÑÑ]Χ™Ñ dsi  ^disableds‰ports port@0£endpoint[ÒsËport@1£endpointsŠphy@ae970002qcom,sm8650-dsi-phy-4nm0£ ép ér€ éuvdsi_phydsi_phy_lanedsi_pll{Æ eifacerefVŠ ^disabledsÑdisplayport-controller@af540002qcom,sm8650-dpP£ õ@ õBÀ õPp õ`œ õpœlÈ ({ÆÆ ÆÆÆ;ecore_ifacecore_auxctrl_linkctrl_link_ifacestream_pixelRÆÆ ™--]Ó§™- dp ^okays‹opp-table2operating-points-v2sÓopp-162000000– §ì€õÔopp-270000000–߀õ¶opp-540000000– /¿õ¸opp-810000000–0Gž€õŠports port@0£endpoint[ÕsÌport@1£endpoint[Ö ¼sÛclock-controller@af000002qcom,sm8650-dispcc£ ð\{'(/)ÍÍÑÑ--§™õ¶V^okaysÆphy@88e300062qcom,sm8650-snps-eusb2-phyqcom,sm8550-snps-eusb2-phy£Ž0T{eref�/Š^okay%ƒ Ó„×sÝphy@88e80002qcom,sm8650-qmp-usb3-dp-phy£Ž€0 {/³/µ/¶eauxrefcom_auxusb3_pipe�// —phycommon§/VŠH^okay•„¥Øs-ports port@0£endpoint[Ùsport@1£endpoint[Úsßport@2£endpoint[ÛsÖusb@a6f88002qcom,sm8650-dwc3qcom,dwc3£ oˆDl‚ƒÜÜÜ<€pwr_evenths_phy_irqdp_hs_phy_irqdm_hs_phy_irqss_phy_irq0{/ /­//²/¯&ecfg_noccoreifacesleepmock_utmixoR/¯/­b$ø ëÂ�/§/õŠ =^okaysŒusb@a600000 2snps,dwc3£ `Í  … J.@ Ý- usb2-phyusb3-phy á õ  + C [ s ‹ ¡ · ÌQ Ûotg ãs�ports port@0£endpoint[Þsport@1£endpoint[ßsÚinterrupt-controller@b2200002qcom,sm8650-pdcqcom,pdc £ "@ðdH óà^^a}?~Ì Šû�ôì×sÜthermal-sensor@c228000 2qcom,sm8650-tsensqcom,tsens-v2 £ "€ "  ú€€uplowcritical  sýthermal-sensor@c229000 2qcom,sm8650-tsensqcom,tsens-v2 £ "� "0 û�€uplowcritical  sþthermal-sensor@c22a000 2qcom,sm8650-tsensqcom,tsens-v2 £ "  "@ ü‚€uplowcritical   sÿpower-management@c300000#2qcom,sm8650-aoss-qmpqcom,aoss-qmp£ 0&l& €&Vs“sram@c3f00002qcom,rpmh-stats£ ?spmi@c4000002qcom,spmi-pmic-arbP£ @0 P@ D L BÐ@vcorechnlsobsrvrintrcnfg lÜ €periph_irqÆ ' 4×ì sŽpmic@c2qcom,pm8010qcom,spmi-pmic£  s�temp-alarm@24002qcom,spmi-temp-alarm£$ $ s pmic@d2qcom,pm8010qcom,spmi-pmic£  s�temp-alarm@24002qcom,spmi-temp-alarm£$ $ s pmic@12qcom,pm8550qcom,spmi-pmic£ s‘temp-alarm@a002qcom,spmi-temp-alarm£    s gpio@8800 2qcom,pm8550-gpioqcom,spmi-gpio£ˆ–²¯ ¦×ìs¯sdc2-card-det-state¾gpio12Ãnormal @  M \s³volume-up-n-state¾gpio6Ãnormal @  \sled-controller@ee00*2qcom,pm8550-flash-ledqcom,spmi-flash-led£î ^disableds’pwm!2qcom,pm8550-pwmqcom,pm8350c-pwm i^okay s“led@1£Ãstatus t zoffled@2£Ãstatus t zoffled@3£Ãstatus t zoffpmic@72qcom,pm8550qcom,spmi-pmic£ s”temp-alarm@a002qcom,spmi-temp-alarm£    s gpio@8800!2qcom,pm8550b-gpioqcom,spmi-gpio£ˆ–²à ¦×ìsàphy@fd002qcom,pm8550b-eusb2-repeater£ýŠ ˆf •ás×pmic@82qcom,pm8550qcom,spmi-pmic£ s•temp-alarm@a002qcom,spmi-temp-alarm£    s gpio@8800"2qcom,pm8550ve-gpioqcom,spmi-gpio£ˆ–²â¦×ìsâpmic@22qcom,pm8550qcom,spmi-pmic£ s–temp-alarm@a002qcom,spmi-temp-alarm£    sgpio@8800"2qcom,pm8550vs-gpioqcom,spmi-gpio£ˆ–²ã¦×ìsãpmic@32qcom,pm8550qcom,spmi-pmic£ s—temp-alarm@a002qcom,spmi-temp-alarm£    sgpio@8800"2qcom,pm8550vs-gpioqcom,spmi-gpio£ˆ–²ä¦×ìsäpmic@42qcom,pm8550qcom,spmi-pmic£ s˜temp-alarm@a002qcom,spmi-temp-alarm£    sgpio@8800"2qcom,pm8550vs-gpioqcom,spmi-gpio£ˆ–²å¦×ìsåpmic@62qcom,pm8550qcom,spmi-pmic£ s™temp-alarm@a002qcom,spmi-temp-alarm£    sgpio@8800"2qcom,pm8550vs-gpioqcom,spmi-gpio£ˆ–²æ¦×ìsæpmic@02qcom,pm8550qcom,spmi-pmic£ sšpon@13002qcom,pmk8350-pon£ vhlospbss›pwrkey2qcom,pmk8350-pwrkey  ¡t^okaysœresin2qcom,pmk8350-resin ^okay ¡rs�rtc@61002qcom,pmk8350-rtc£ab vrtcalarm b^okaysžnvram@71002qcom,spmi-sdam£q  =qsŸreboot-reason@48£H ¬sgpio@8800!2qcom,pmk8550-gpioqcom,spmi-gpio£¸–²ç¦×ìsçpinctrl@f1000002qcom,sm8650-tlmm£0  Ж¦×ì²gÓ ±Ü ¿ Jsgts-reset-statesÓ @ÌÃgpio62¾gpio162ts-irq-statesÒ M @ÌÃgpio61¾gpio161mdp-vsync-statesÎ ÔÌ Ãmdp_vsync¾gpio86-disp0-reset-n-suspend-statesÏ ÔÌÃgpio33¾gpio133disp0-reset-n-active-statesÍåÌÃgpio33¾gpio133cci0-0-default-statesºsda-pins¾gpio113 Ãcci_i2c_sdaÌ @˜scl-pins¾gpio114 Ãcci_i2c_sclÌ @˜cci0-0-sleep-states¼sda-pins¾gpio113 Ãcci_i2c_sdaÌ Ôscl-pins¾gpio114 Ãcci_i2c_sclÌ Ôcci0-1-default-states»sda-pins¾gpio115 Ãcci_i2c_sdaÌ @˜scl-pins¾gpio116 Ãcci_i2c_sclÌ @˜cci0-1-sleep-states½sda-pins¾gpio115 Ãcci_i2c_sdaÌ Ôscl-pins¾gpio116 Ãcci_i2c_sclÌ Ôcci1-0-default-states¾sda-pins¾gpio117 Ãcci_i2c_sdaÌ @˜scl-pins¾gpio118 Ãcci_i2c_sclÌ @˜cci1-0-sleep-statesÀsda-pins¾gpio117 Ãcci_i2c_sdaÌ Ôscl-pins¾gpio118 Ãcci_i2c_sclÌ Ôcci1-1-default-states¿sda-pins¾gpio12 Ãcci_i2c_sdaÌ @˜scl-pins¾gpio13 Ãcci_i2c_sclÌ @˜cci1-1-sleep-statesÁsda-pins¾gpio12 Ãcci_i2c_sdaÌ Ôscl-pins¾gpio13 Ãcci_i2c_sclÌ Ôcci2-0-default-statesÂsda-pins¾gpio112 Ãcci_i2c_sdaÌ @˜scl-pins¾gpio153 Ãcci_i2c_sclÌ @˜cci2-0-sleep-statesÄsda-pins¾gpio112 Ãcci_i2c_sdaÌ Ôscl-pins¾gpio153 Ãcci_i2c_sclÌ Ôcci2-1-default-statesÃsda-pins¾gpio119 Ãcci_i2c_sdaÌ @˜scl-pins¾gpio120 Ãcci_i2c_sclÌ @˜cci2-1-sleep-statesÅsda-pins¾gpio119 Ãcci_i2c_sdaÌ Ôscl-pins¾gpio120 Ãcci_i2c_sclÌ Ôhub-i2c0-data-clk-state¾gpio64gpio65 Ãi2chub0_se0Ì @sPhub-i2c1-data-clk-state¾gpio66gpio67 Ãi2chub0_se1Ì @sQhub-i2c2-data-clk-state¾gpio68gpio69 Ãi2chub0_se2Ì @sRhub-i2c3-data-clk-state¾gpio70gpio71 Ãi2chub0_se3Ì @sShub-i2c4-data-clk-state¾gpio72gpio73 Ãi2chub0_se4Ì @sThub-i2c5-data-clk-state¾gpio74gpio75 Ãi2chub0_se5Ì @sUhub-i2c6-data-clk-state¾gpio76gpio77 Ãi2chub0_se6Ì @sVhub-i2c7-data-clk-state¾gpio78gpio79 Ãi2chub0_se7Ì @sWhub-i2c8-data-clk-state¾gpio206gpio207 Ãi2chub0_se8Ì @sXhub-i2c9-data-clk-state¾gpio80gpio81 Ãi2chub0_se9Ì @sYpcie0-default-states€perst-pins¾gpio94ÃgpioÌ Ôclkreq-pins¾gpio95Ãpcie0_clk_req_nÌ @wake-pins¾gpio96ÃgpioÌ @pcie1-default-states…perst-pins¾gpio97ÃgpioÌ Ôclkreq-pins¾gpio98Ãpcie1_clk_req_nÌ @wake-pins¾gpio99ÃgpioÌ @qup-i2c0-data-clk-state¾gpio32gpio33 Ãqup1_se0Ì @s\qup-i2c1-data-clk-state¾gpio36gpio37 Ãqup1_se1Ì @s_qup-i2c2-data-clk-state¾gpio40gpio41 Ãqup1_se2Ì @sbqup-i2c3-data-clk-state¾gpio44gpio45 Ãqup1_se3Ì @˜sequp-i2c4-data-clk-state¾gpio48gpio49 Ãqup1_se4Ì @skqup-i2c5-data-clk-state¾gpio52gpio53 Ãqup1_se5Ì @snqup-i2c6-data-clk-state¾gpio56gpio57 Ãqup1_se6Ì @sqqup-i2c7-data-clk-state¾gpio60gpio61 Ãqup1_se7Ì @szqup-i2c8-data-clk-state ¾gpio0gpio1 Ãqup2_se0Ì @s4qup-i2c9-data-clk-state ¾gpio4gpio5 Ãqup2_se1Ì @s7qup-i2c10-data-clk-state ¾gpio8gpio9 Ãqup2_se2Ì @s:qup-i2c11-data-clk-state¾gpio12gpio13 Ãqup2_se3Ì @s=qup-i2c12-data-clk-state¾gpio16gpio17 Ãqup2_se4Ì @s@qup-i2c13-data-clk-state¾gpio20gpio21 Ãqup2_se5Ì @sCqup-i2c14-data-clk-state¾gpio24gpio25 Ãqup2_se6Ì @s qup-spi0-cs-state¾gpio35 Ãqup1_se0Ìås^qup-spi0-data-clk-state¾gpio32gpio33gpio34 Ãqup1_se0Ìås]qup-spi1-cs-state¾gpio39 Ãqup1_se1Ìåsaqup-spi1-data-clk-state¾gpio36gpio37gpio38 Ãqup1_se1Ìås`qup-spi2-cs-state¾gpio43 Ãqup1_se2Ìåsdqup-spi2-data-clk-state¾gpio40gpio41gpio42 Ãqup1_se2Ìåscqup-spi3-cs-state¾gpio47 Ãqup1_se3Ìåsjqup-spi3-data-clk-state¾gpio44gpio45gpio46 Ãqup1_se3Ìåsiqup-spi4-cs-state¾gpio51 Ãqup1_se4Ìåsmqup-spi4-data-clk-state¾gpio48gpio49gpio50 Ãqup1_se4Ìåslqup-spi5-cs-state¾gpio55 Ãqup1_se5Ìåspqup-spi5-data-clk-state¾gpio52gpio53gpio54 Ãqup1_se5Ìåsoqup-spi6-cs-state¾gpio59 Ãqup1_se6Ìåsyqup-spi6-data-clk-state¾gpio56gpio57gpio58 Ãqup1_se6Ìåsxqup-spi7-cs-state¾gpio63 Ãqup1_se7Ìås|qup-spi7-data-clk-state¾gpio60gpio61gpio62 Ãqup1_se7Ìås{qup-spi8-cs-state¾gpio3 Ãqup2_se0Ìås6qup-spi8-data-clk-state¾gpio0gpio1gpio2 Ãqup2_se0Ìås5qup-spi9-cs-state¾gpio7 Ãqup2_se1Ìås9qup-spi9-data-clk-state¾gpio4gpio5gpio6 Ãqup2_se1Ìås8qup-spi10-cs-state¾gpio11 Ãqup2_se2Ìås<qup-spi10-data-clk-state¾gpio8gpio9gpio10 Ãqup2_se2Ìås;qup-spi11-cs-state¾gpio15 Ãqup2_se3Ìås?qup-spi11-data-clk-state¾gpio12gpio13gpio14 Ãqup2_se3Ìås>qup-spi12-cs-state¾gpio19 Ãqup2_se4ÌåsBqup-spi12-data-clk-state¾gpio16gpio17gpio18 Ãqup2_se4ÌåsAqup-spi13-cs-state¾gpio23 Ãqup2_se5ÌåsEqup-spi13-data-clk-state¾gpio20gpio21gpio22 Ãqup2_se5ÌåsDqup-spi14-cs-state¾gpio27 Ãqup2_se6Ìås¡qup-spi14-data-clk-state¾gpio24gpio25gpio26 Ãqup2_se6Ìås¢qup-uart14-default-state¾gpio26gpio27 Ãqup2_se6Ì @sFqup-uart14-cts-rts-state¾gpio24gpio25 Ãqup2_se6Ì ÔsGqup-uart15-default-state¾gpio30gpio31 Ãqup2_se7ÌåsOsdc2-sleep-states´clk-pins ¾sdc2_clkÌåcmd-pins ¾sdc2_cmdÌ @data-pins ¾sdc2_dataÌ @sdc2-default-states²clk-pins ¾sdc2_clkÌåcmd-pins ¾sdc2_cmdÌ  @data-pins ¾sdc2_dataÌ  @bt-default-states%bt-en-pins¾gpio17ÃgpioÌåsw-ctrl-pins¾gpio18Ãgpio Ôlt9611-irq-state¾gpio85Ãgpioåstlt9611-rst-state¾gpio28Ãgpio suspkr-2-sd-n-active-state¾gpio77ÃgpioÌå s«wcd-reset-n-active-state¾gpio107ÃgpioÌå s!wlan-en-state¾gpio16ÃgpioÌ Ôs$iommu@15000000/2qcom,sm8650-smmu-500qcom,smmu-500arm,mmu-500£Œ Aabcdefghijklmnopqrstuvµ¶·¸¹º»¼½¾¿À;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXY‹Œ�Ž��‘’“”•–—˜™¢£œ¥Â§¨©±²³´µ¶·¸°½Qs.interrupt-controller@17100000 2arm,gic-v3 £    ì× ã ú =smsi-controller@171400002arm,gic-v3-its£  stimer@174200002arm,armv7-timer-mem£B=  frame@17421000£BB   )frame@17423000£B0   ) ^disabledframe@17425000£BP   ) ^disabledframe@17427000£Bp   ) ^disabledframe@17429000£B�   ) ^disabledframe@1742b000£B°   ) ^disabledframe@1742d000£BÐ   ) ^disabledrsc@17a000002qcom,rpmh-rsc@£ ¡¢£vdrv-0drv-1drv-2$ § 6  F R apps_rscs£bcm-voter2qcom,bcm-votersclock-controller2qcom,sm8650-rpmh-clk{èexoVspower-controller2qcom,sm8650-rpmhpd]és™opp-table2operating-points-v2séopp-16�s¤opp-48�0sµopp-52�4s¥opp-56�8sÔopp-60�<s¦opp-64�@s¶opp-80�Ps§opp-128�€s·opp-144��s¨opp-192�Às¸opp-256�sŠopp-320�@s©opp-336�Psªopp-384�€s«opp-416� s¬regulators-02qcom,pm8550-rpmh-regulators bê rê ‚ë ˜ì ¦ë ¸ë Éë Úì éí øí î bbob1 #vreg_bob1 22K J2qcom,sm8650-pmic-glinkqcom,sm8550-pmic-glinkqcom,pmic-glink  Ögconnector@02usb-c-connector£èdualódualports port@0£endpoint[sÞport@1£endpoint[sÙport@2£endpoint[shregulator-lt9611-1v2 ^disabled-fi2regulator-fixed #LT9611_1V2 2O€ JO€ýê gO srregulator-lt9611-3v3 ^disabled-fi2regulator-fixed #LT9611_3V3 22Z  J2Z ý gN sssound(2qcom,sm8650-sndcardqcom,sm8450-sndcard ,SM8650-HDKÕ SpkrLeft INWSA_SPK1 OUTSpkrRight INWSA_SPK2 OUTIN1_HPHLHPHL_OUTIN2_HPHRHPHR_OUTAMIC1MIC BIAS1AMIC2MIC BIAS2AMIC5MIC BIAS4TX SWR_INPUT0ADC1_OUTPUTTX SWR_INPUT1ADC2_OUTPUTTX SWR_INPUT3ADC4_OUTPUTwcd-playback-dai-link .WCD Playbackcpu8qcodec8¤platform8wcd-capture-dai-link .WCD Capturecpu8xcodec8¬platform8wsa-dai-link .WSA Playbackcpu8icodec8 ¦platform8regulator-vph-pwr2regulator-fixed #vph_pwr 28u  J8u BVsêregulator-vreg-bob-3v3 ^disabled-fi2regulator-fixed #VREG_BOB_3P3 22Z  J2Z ýêsaudio-codec&2qcom,wcd9395-codecqcom,wcd9390-codec“!�defaulthw@€w@˜w@°w@ È$øIð�È¡ ¡ ¡ ¡ ¡ ïð ÃP?"N# 0gk]fmfHf}ë swcn7850-pmu2qcom,wcn7850-pmu�default“$% ‘g £g%&³fÀª¼'Ðïùì í{regulatorsldo0 #vreg_pmu_rfa_cmnsHldo1 #vreg_pmu_aon_0p59sIldo2 #vreg_pmu_wlcx_0p8sJldo3 #vreg_pmu_wlmx_0p85sKldo4 #vreg_pmu_btcmx_0p85sÌldo5 #vreg_pmu_rfa_0p8sLldo6 #vreg_pmu_rfa_1p2sMldo7 #vreg_pmu_rfa_1p8sNldo8 #vreg_pmu_pcie_0p9s�ldo9 #vreg_pmu_pcie_1p8s‚__symbols__Þ/clocks/xo-boardç/clocks/sleep-clkñ/clocks/bi-tcxo-div2-clkþ/clocks/bi-tcxo-ao-div2-clk /cpus/cpu@0/cpus/cpu@0/l2-cache/cpus/cpu@0/l2-cache/l3-cache/cpus/cpu@100"/cpus/cpu@200'/cpus/cpu@200/l2-cache./cpus/cpu@3003/cpus/cpu@4008/cpus/cpu@400/l2-cache?/cpus/cpu@500D/cpus/cpu@500/l2-cacheK/cpus/cpu@600P/cpus/cpu@600/l2-cacheW/cpus/cpu@700\/cpus/cpu@700/l2-cache c/cpus/idle-states/cpu-sleep-0-0 v/cpus/idle-states/cpu-sleep-1-0 ‡/cpus/idle-states/cpu-sleep-2-0)�/cpus/domain-idle-states/cluster-sleep-0)­/cpus/domain-idle-states/cluster-sleep-1½/firmware/scmÁ/interconnect-0Ê/interconnect-1Ò/psci/power-domain-cpu0Ú/psci/power-domain-cpu1â/psci/power-domain-cpu2ê/psci/power-domain-cpu3ò/psci/power-domain-cpu4ú/psci/power-domain-cpu5/psci/power-domain-cpu6 /psci/power-domain-cpu7/psci/power-domain-cluster/reserved-memory-/reserved-memory/hyp@80000000$5/reserved-memory/cpusys-vm@80e00000,C/reserved-memory/xbl-dt-log-merged@81a00000%Y/reserved-memory/aop-cmd-db@81c60000.h/reserved-memory/aop-tme-uefi-merged@81c80000Œ/reserved-memory/smem@81d00000#€/reserved-memory/adsp-mhi@81f00000 �/reserved-memory/pvmfw@824a0000&—/reserved-memory/global-sync@82600000"§/reserved-memory/tz-stat@82700000³/reserved-memory/qdss@82800000(¼/reserved-memory/qlink-logging@84800000#Î/reserved-memory/mpss-dsm@86b00000%Û/reserved-memory/mpss-dsm-2@8b400000ê/reserved-memory/mpss@8bc00000&ó/reserved-memory/q6-mpss-dtb@9b000000!/reserved-memory/ipa-fw@9b080000"/reserved-memory/ipa-gsi@9b090000)/reserved-memory/gpu-micro-code@9b09a000-/reserved-memory/spss@9b0a0000(=/reserved-memory/spu-tz-shared@9b280000+O/reserved-memory/spu-modem-shared@9b2e0000!d/reserved-memory/camera@9b300000 o/reserved-memory/video@9bb00000y/reserved-memory/cvp@9c300000�/reserved-memory/cdsp@9ca00000&Š/reserved-memory/q6-cdsp-dtb@9de00000&š/reserved-memory/q6-adsp-dtb@9de80000#ª/reserved-memory/adspslpi@9df00000 ·/reserved-memory/rmtfs@d7c00000$Á/reserved-memory/tz-merged@d8000000(Ï/reserved-memory/hwfence-shbuf@e6440000&Ý/reserved-memory/trust-ui-vm@f3800000!í/reserved-memory/oem-vm@f7c00000#ø/reserved-memory/llcc-lpi@ff800000/smp2p-adsp/master-kernel/smp2p-adsp/slave-kernel"/smp2p-cdsp/master-kernel1/smp2p-cdsp/slave-kernel?/smp2p-modem/master-kernelO/smp2p-modem/slave-kernel^/smp2p-modem/ipa-ap-to-modeml/smp2p-modem/ipa-modem-to-apy/soc@0}/soc@0/clock-controller@100000�/soc@0/mailbox@406000†/soc@0/dma-controller@800000�/soc@0/geniqup@8c0000!š/soc@0/geniqup@8c0000/i2c@880000!Ÿ/soc@0/geniqup@8c0000/spi@880000!¤/soc@0/geniqup@8c0000/i2c@884000!©/soc@0/geniqup@8c0000/spi@884000!®/soc@0/geniqup@8c0000/i2c@888000!´/soc@0/geniqup@8c0000/spi@888000!º/soc@0/geniqup@8c0000/i2c@88c000!À/soc@0/geniqup@8c0000/spi@88c000!Æ/soc@0/geniqup@8c0000/i2c@890000!Ì/soc@0/geniqup@8c0000/spi@890000!Ò/soc@0/geniqup@8c0000/i2c@894000!Ø/soc@0/geniqup@8c0000/spi@894000$Þ/soc@0/geniqup@8c0000/serial@898000$å/soc@0/geniqup@8c0000/serial@89c000ì/soc@0/geniqup@9c0000!ý/soc@0/geniqup@9c0000/i2c@980000!/soc@0/geniqup@9c0000/i2c@984000!/soc@0/geniqup@9c0000/i2c@988000!/soc@0/geniqup@9c0000/i2c@98c000!%/soc@0/geniqup@9c0000/i2c@990000!//soc@0/geniqup@9c0000/i2c@994000!9/soc@0/geniqup@9c0000/i2c@998000!C/soc@0/geniqup@9c0000/i2c@99c000!M/soc@0/geniqup@9c0000/i2c@9a0000!W/soc@0/geniqup@9c0000/i2c@9a4000a/soc@0/dma-controller@a00000j/soc@0/geniqup@ac0000!u/soc@0/geniqup@ac0000/i2c@a80000!z/soc@0/geniqup@ac0000/spi@a80000!/soc@0/geniqup@ac0000/i2c@a84000!„/soc@0/geniqup@ac0000/spi@a84000!‰/soc@0/geniqup@ac0000/i2c@a88000!Ž/soc@0/geniqup@ac0000/spi@a88000!“/soc@0/geniqup@ac0000/i2c@a8c000-˜/soc@0/geniqup@ac0000/i2c@a8c000/typec-mux@eC¢/soc@0/geniqup@ac0000/i2c@a8c000/typec-mux@e/ports/port@0/endpoint!´/soc@0/geniqup@ac0000/spi@a8c000!¹/soc@0/geniqup@ac0000/i2c@a90000!¾/soc@0/geniqup@ac0000/spi@a90000!Ã/soc@0/geniqup@ac0000/i2c@a94000!È/soc@0/geniqup@ac0000/spi@a94000!Í/soc@0/geniqup@ac0000/i2c@a980000Ò/soc@0/geniqup@ac0000/i2c@a98000/hdmi-bridge@2bFß/soc@0/geniqup@ac0000/i2c@a98000/hdmi-bridge@2b/ports/port@0/endpointFè/soc@0/geniqup@ac0000/i2c@a98000/hdmi-bridge@2b/ports/port@2/endpoint!ó/soc@0/geniqup@ac0000/spi@a98000!ø/soc@0/geniqup@ac0000/i2c@a9c000!ý/soc@0/geniqup@ac0000/spi@a9c000/soc@0/interconnect@1500000 /soc@0/interconnect@1600000/soc@0/interconnect@1680000"/soc@0/interconnect@16c0000+/soc@0/interconnect@16e00006/soc@0/interconnect@1700000A/soc@0/interconnect@1780000J/soc@0/rng@10c3000N/soc@0/pcie@1c00000T/soc@0/pcie@1c00000/pcie@0^/soc@0/phy@1c06000h/soc@0/pcie@1c08000n/soc@0/phy@1c0e000x/soc@0/dma-controller@1dc4000‚/soc@0/crypto@1dfa000‰/soc@0/phy@1d80000•/soc@0/ufs@1d84000/soc@0/crypto@1d88000 /soc@0/hwlock@1f40000 «/soc@0/clock-controller@1fc0000°/soc@0/gpu@3d00000´/soc@0/gpu@3d00000/opp-tablev/soc@0/gmu@3d6a000Â/soc@0/gmu@3d6a000/opp-table Ð/soc@0/clock-controller@3d90000Ö/soc@0/iommu@3da0000â/soc@0/ipa@3f40000æ/soc@0/remoteproc@4080000ö/soc@0/codec@6aa0000/soc@0/soundwire@6ab0000 /soc@0/codec@6ac0000/soc@0/soundwire@6ad0000#/soc@0/soundwire@6ad0000/codec@0,4%/soc@0/codec@6ae00003/soc@0/codec@6b00000B/soc@0/soundwire@6b10000%G/soc@0/soundwire@6b10000/speaker@0,0%R/soc@0/soundwire@6b10000/speaker@0,1]/soc@0/soundwire@6d30000#b/soc@0/soundwire@6d30000/codec@0,3i/soc@0/codec@6d44000w/soc@0/pinctrl@6e80000+‚/soc@0/pinctrl@6e80000/tx-swr-active-state+�/soc@0/pinctrl@6e80000/rx-swr-active-state,ž/soc@0/pinctrl@6e80000/dmic01-default-state,­/soc@0/pinctrl@6e80000/dmic23-default-state,¼/soc@0/pinctrl@6e80000/wsa-swr-active-state-Ë/soc@0/pinctrl@6e80000/wsa2-swr-active-state0Û/soc@0/pinctrl@6e80000/spkr-1-sd-n-active-stateî/soc@0/interconnect@7400000ÿ/soc@0/interconnect@7430000/soc@0/interconnect@7e40000/soc@0/mmc@8804000#/soc@0/mmc@8804000/opp-table 3/soc@0/clock-controller@aaf0000;/soc@0/cci@ac15000@/soc@0/cci@ac15000/i2c-bus@0J/soc@0/cci@ac15000/i2c-bus@1T/soc@0/cci@ac16000Y/soc@0/cci@ac16000/i2c-bus@0c/soc@0/cci@ac16000/i2c-bus@1m/soc@0/cci@ac17000r/soc@0/cci@ac17000/i2c-bus@0|/soc@0/cci@ac17000/i2c-bus@1 †/soc@0/clock-controller@ade0000!Œ/soc@0/display-subsystem@ae00000<‘/soc@0/display-subsystem@ae00000/display-controller@ae01000Rš/soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@0/endpointR¨/soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@1/endpointR¶/soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@2/endpointFÄ/soc@0/display-subsystem@ae00000/display-controller@ae01000/opp-table-Ò/soc@0/display-subsystem@ae00000/dsi@ae94000CÜ/soc@0/display-subsystem@ae00000/dsi@ae94000/ports/port@0/endpointCé/soc@0/display-subsystem@ae00000/dsi@ae94000/ports/port@1/endpoint7÷/soc@0/display-subsystem@ae00000/dsi@ae94000/opp-table- /soc@0/display-subsystem@ae00000/phy@ae95000-/soc@0/display-subsystem@ae00000/dsi@ae96000C"/soc@0/display-subsystem@ae00000/dsi@ae96000/ports/port@0/endpointC//soc@0/display-subsystem@ae00000/dsi@ae96000/ports/port@1/endpoint-=/soc@0/display-subsystem@ae00000/phy@ae97000@K/soc@0/display-subsystem@ae00000/displayport-controller@af54000JÅ/soc@0/display-subsystem@ae00000/displayport-controller@af54000/opp-tableVT/soc@0/display-subsystem@ae00000/displayport-controller@af54000/ports/port@0/endpointV`/soc@0/display-subsystem@ae00000/displayport-controller@af54000/ports/port@1/endpoint m/soc@0/clock-controller@af00000t/soc@0/phy@88e3000€/soc@0/phy@88e8000)Ž/soc@0/phy@88e8000/ports/port@0/endpoint) /soc@0/phy@88e8000/ports/port@1/endpoint)¸/soc@0/phy@88e8000/ports/port@2/endpointÌ/soc@0/usb@a6f8800Ò/soc@0/usb@a6f8800/usb@a6000005Ý/soc@0/usb@a6f8800/usb@a600000/ports/port@0/endpoint5ë/soc@0/usb@a6f8800/usb@a600000/ports/port@1/endpoint$ù/soc@0/interrupt-controller@b220000ý/soc@0/thermal-sensor@c228000/soc@0/thermal-sensor@c229000 /soc@0/thermal-sensor@c22a000 /soc@0/power-management@c300000/soc@0/spmi@c400000$/soc@0/spmi@c400000/pmic@c+-/soc@0/spmi@c400000/pmic@c/temp-alarm@2400A/soc@0/spmi@c400000/pmic@d+J/soc@0/spmi@c400000/pmic@d/temp-alarm@2400^/soc@0/spmi@c400000/pmic@1*e/soc@0/spmi@c400000/pmic@1/temp-alarm@a00%w/soc@0/spmi@c400000/pmic@1/gpio@88009„/soc@0/spmi@c400000/pmic@1/gpio@8800/sdc2-card-det-state7”/soc@0/spmi@c400000/pmic@1/gpio@8800/volume-up-n-state/ /soc@0/spmi@c400000/pmic@1/led-controller@ee00­/soc@0/spmi@c400000/pmic@1/pwm¸/soc@0/spmi@c400000/pmic@7*À/soc@0/spmi@c400000/pmic@7/temp-alarm@a00%Ó/soc@0/spmi@c400000/pmic@7/gpio@8800$á/soc@0/spmi@c400000/pmic@7/phy@fd00ø/soc@0/spmi@c400000/pmic@8*/soc@0/spmi@c400000/pmic@8/temp-alarm@a00%/soc@0/spmi@c400000/pmic@8/gpio@8800$/soc@0/spmi@c400000/pmic@2*//soc@0/spmi@c400000/pmic@2/temp-alarm@a00%E/soc@0/spmi@c400000/pmic@2/gpio@8800V/soc@0/spmi@c400000/pmic@3*a/soc@0/spmi@c400000/pmic@3/temp-alarm@a00%w/soc@0/spmi@c400000/pmic@3/gpio@8800ˆ/soc@0/spmi@c400000/pmic@4*“/soc@0/spmi@c400000/pmic@4/temp-alarm@a00%©/soc@0/spmi@c400000/pmic@4/gpio@8800º/soc@0/spmi@c400000/pmic@6*Å/soc@0/spmi@c400000/pmic@6/temp-alarm@a00%Û/soc@0/spmi@c400000/pmic@6/gpio@8800ì/soc@0/spmi@c400000/pmic@0$ô/soc@0/spmi@c400000/pmic@0/pon@1300+/soc@0/spmi@c400000/pmic@0/pon@1300/pwrkey* /soc@0/spmi@c400000/pmic@0/pon@1300/resin$/soc@0/spmi@c400000/pmic@0/rtc@6100&!/soc@0/spmi@c400000/pmic@0/nvram@710070/soc@0/spmi@c400000/pmic@0/nvram@7100/reboot-reason@48%>/soc@0/spmi@c400000/pmic@0/gpio@8800}/soc@0/pinctrl@f100000,L/soc@0/pinctrl@f100000/cci0-0-default-state*[/soc@0/pinctrl@f100000/cci0-0-sleep-state,h/soc@0/pinctrl@f100000/cci0-1-default-state*w/soc@0/pinctrl@f100000/cci0-1-sleep-state,„/soc@0/pinctrl@f100000/cci1-0-default-state*“/soc@0/pinctrl@f100000/cci1-0-sleep-state, /soc@0/pinctrl@f100000/cci1-1-default-state*¯/soc@0/pinctrl@f100000/cci1-1-sleep-state,¼/soc@0/pinctrl@f100000/cci2-0-default-state*Ë/soc@0/pinctrl@f100000/cci2-0-sleep-state,Ø/soc@0/pinctrl@f100000/cci2-1-default-state*ç/soc@0/pinctrl@f100000/cci2-1-sleep-state/ô/soc@0/pinctrl@f100000/hub-i2c0-data-clk-state//soc@0/pinctrl@f100000/hub-i2c1-data-clk-state//soc@0/pinctrl@f100000/hub-i2c2-data-clk-state/*/soc@0/pinctrl@f100000/hub-i2c3-data-clk-state/