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pon@13002qcom,pmk8350-pon– Çhlospbspwrkey2qcom,pmk8350-pwrkeyþ ùtQokayresin2qcom,pmk8350-resinþQokay ùrrtc@61002qcom,pmk8350-rtc–ab ÇrtcalarmþbQokaynvram@71002qcom,spmi-sdam–q  0qreboot-reason@48–H fgpio@8800!2qcom,pmk8550-gpioqcom,spmi-gpio–¸ÖòèæÊßfèpmic@a2qcom,pmr735dqcom,spmi-pmic–  temp-alarm@a002qcom,spmi-temp-alarm– þ  -fgpio@8800!2qcom,pmr735d-gpioqcom,spmi-gpio–ˆÖòéæÊßfépinctrl@f1000002qcom,sm8650-tlmm–0 þÐÖæÊßògÓ Ü  Jfgcci0-0-default-statef²sda-pinsþgpio113 cci_i2c_sda  \˜scl-pinsþgpio114 cci_i2c_scl  \˜cci0-0-sleep-statef´sda-pinsþgpio113 cci_i2c_sda  ,scl-pinsþgpio114 cci_i2c_scl  ,cci0-1-default-statef³sda-pinsþgpio115 cci_i2c_sda  \˜scl-pinsþgpio116 cci_i2c_scl  \˜cci0-1-sleep-statefµsda-pinsþgpio115 cci_i2c_sda  ,scl-pinsþgpio116 cci_i2c_scl  ,cci1-0-default-statef¶sda-pinsþgpio117 cci_i2c_sda  \˜scl-pinsþgpio118 cci_i2c_scl  \˜cci1-0-sleep-statef¸sda-pinsþgpio117 cci_i2c_sda  ,scl-pinsþgpio118 cci_i2c_scl  ,cci1-1-default-statef·sda-pinsþgpio12 cci_i2c_sda  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\fYpcie0-default-statef€perst-pinsþgpio94 gpio  ,clkreq-pinsþgpio95 pcie0_clk_req_n  \wake-pinsþgpio96 gpio  \pcie1-default-stateperst-pinsþgpio97 gpio  ,clkreq-pinsþgpio98 pcie1_clk_req_n  \wake-pinsþgpio99 gpio  \qup-i2c0-data-clk-stateþgpio32gpio33 qup1_se0  \f\qup-i2c1-data-clk-stateþgpio36gpio37 qup1_se1  \f_qup-i2c2-data-clk-stateþgpio40gpio41 qup1_se2  \fbqup-i2c3-data-clk-stateþgpio44gpio45 qup1_se3  \˜fequp-i2c4-data-clk-stateþgpio48gpio49 qup1_se4  \flqup-i2c5-data-clk-stateþgpio52gpio53 qup1_se5  \frqup-i2c6-data-clk-stateþgpio56gpio57 qup1_se6  \fuqup-i2c7-data-clk-stateþgpio60gpio61 qup1_se7  \fzqup-i2c8-data-clk-state þgpio0gpio1 qup2_se0  \f4qup-i2c9-data-clk-state þgpio4gpio5 qup2_se1  \f7qup-i2c10-data-clk-state þgpio8gpio9 qup2_se2  \f:qup-i2c11-data-clk-stateþgpio12gpio13 qup2_se3  \f=qup-i2c12-data-clk-stateþgpio16gpio17 qup2_se4  \f@qup-i2c13-data-clk-stateþgpio20gpio21 qup2_se5  \fCqup-i2c14-data-clk-stateþgpio24gpio25 qup2_se6  \qup-spi0-cs-stateþgpio35 qup1_se0  %f^qup-spi0-data-clk-stateþgpio32gpio33gpio34 qup1_se0  %f]qup-spi1-cs-stateþgpio39 qup1_se1  %faqup-spi1-data-clk-stateþgpio36gpio37gpio38 qup1_se1  %f`qup-spi2-cs-stateþgpio43 qup1_se2  %fdqup-spi2-data-clk-stateþgpio40gpio41gpio42 qup1_se2  %fcqup-spi3-cs-stateþgpio47 qup1_se3  %fkqup-spi3-data-clk-stateþgpio44gpio45gpio46 qup1_se3  %fjqup-spi4-cs-stateþgpio51 qup1_se4  %fnqup-spi4-data-clk-stateþgpio48gpio49gpio50 qup1_se4  %fmqup-spi5-cs-stateþgpio55 qup1_se5  %ftqup-spi5-data-clk-stateþgpio52gpio53gpio54 qup1_se5  %fsqup-spi6-cs-stateþgpio59 qup1_se6  %fyqup-spi6-data-clk-stateþgpio56gpio57gpio58 qup1_se6  %fxqup-spi7-cs-stateþgpio63 qup1_se7  %f|qup-spi7-data-clk-stateþgpio60gpio61gpio62 qup1_se7  %f{qup-spi8-cs-stateþgpio3 qup2_se0  %f6qup-spi8-data-clk-stateþgpio0gpio1gpio2 qup2_se0  %f5qup-spi9-cs-stateþgpio7 qup2_se1  %f9qup-spi9-data-clk-stateþgpio4gpio5gpio6 qup2_se1  %f8qup-spi10-cs-stateþgpio11 qup2_se2  %f<qup-spi10-data-clk-stateþgpio8gpio9gpio10 qup2_se2  %f;qup-spi11-cs-stateþgpio15 qup2_se3  %f?qup-spi11-data-clk-stateþgpio12gpio13gpio14 qup2_se3  %f>qup-spi12-cs-stateþgpio19 qup2_se4  %fBqup-spi12-data-clk-stateþgpio16gpio17gpio18 qup2_se4  %fAqup-spi13-cs-stateþgpio23 qup2_se5  %fEqup-spi13-data-clk-stateþgpio20gpio21gpio22 qup2_se5  %fDqup-spi14-cs-stateþgpio27 qup2_se6  %qup-spi14-data-clk-stateþgpio24gpio25gpio26 qup2_se6  %qup-uart14-default-stateþgpio26gpio27 qup2_se6  \fFqup-uart14-cts-rts-stateþgpio24gpio25 qup2_se6  ,fGqup-uart15-default-stateþgpio30gpio31 qup2_se7  %fOsdc2-sleep-stateclk-pins þsdc2_clk  %cmd-pins þsdc2_cmd  \data-pins þsdc2_data  \sdc2-default-stateclk-pins þsdc2_clk  %cmd-pins þsdc2_cmd  \data-pins þsdc2_data  \bt-default-statef'bt-en-pinsþgpio17 gpio  %sw-ctrl-pinsþgpio18 gpio ,disp0-reset-n-active-stateþgpio133 gpio  %fÌdisp0-reset-n-suspend-stateþgpio133 gpio  ,fÎmdp-vsync-active-stateþgpio86 mdp_vsync  ,fÍmdp-vsync-suspend-stateþgpio86 mdp_vsync  ,fÏspkr-2-sd-n-active-stateþgpio77 gpio  % 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`tfìaudio-codec&2qcom,wcd9395-codecqcom,wcd9390-codec†"�default†w@žw@¶w@Îw@ æ$øIð�È¡ ¡ ¡ ¡ ¡  ð 4ÃP]#l$ #gk{f‹fˆf›íM/;fportendpointN%fiwcn7850-pmu2qcom,wcn7850-pmu�default†&' ¯g Ág( ËfѨ¯)áñìîýïnregulatorsldo0 Švreg_pmu_rfa_cmnfHldo1 Švreg_pmu_aon_0p59fIldo2 Švreg_pmu_wlcx_0p8fJldo3 Švreg_pmu_wlmx_0p85fKldo4 Švreg_pmu_btcmx_0p85ldo5 Švreg_pmu_rfa_0p8fLldo6 Švreg_pmu_rfa_1p2fMldo7 Švreg_pmu_rfa_1p8fNldo8 Švreg_pmu_pcie_0p9f�ldo9 Švreg_pmu_pcie_1p8f‚ interrupt-parent#address-cells#size-cellsmodelcompatiblestdout-path#clock-cellsclock-frequencyphandleclocksclock-multclock-divdevice_typeregpower-domainspower-domain-namesenable-methodnext-level-cachecapacity-dmips-mhzdynamic-power-coefficientqcom,freq-domain#cooling-cellscache-levelcache-unifiedcpuentry-methodidle-state-namearm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uslocal-timer-stopqcom,dload-modeinterconnects#interconnect-cellsqcom,bcm-votersinterrupts#power-domain-cellsdomain-idle-statesrangesno-maphwlocksqcom,client-idqcom,vmidinterrupts-extendedmboxesqcom,smemqcom,local-pidqcom,remote-pidqcom,entry-name#qcom,smem-state-cellsinterrupt-controller#interrupt-cellsdma-ranges#reset-cells#mbox-cellsdma-channelsdma-channel-mask#dma-cellsiommusdma-coherentstatusclock-namesinterconnect-namesdmasdma-namespinctrl-0pinctrl-namesvddrfacmn-supplyvddaon-supplyvddwlcx-supplyvddwlmx-supplyvddrfa0p8-supplyvddrfa1p2-supplyvddrfa1p8-supplymax-speedvdd-supplyreset-gpiosmode-switchorientation-switchremote-endpointavdd-supplyspi-max-frequencytouchscreen-size-xtouchscreen-size-yvcc-supplyretimer-switchdata-lanesreg-namesinterrupt-namesresetsreset-namesiommu-mapinterrupt-mapinterrupt-map-maskmsi-mapmsi-map-masklinux,pci-domainnum-lanesbus-rangephysphy-nameswake-gpiosperst-gpiosvddpcie0p9-supplyvddpcie1p8-supplyassigned-clocksassigned-clock-ratesclock-output-names#phy-cellsvdda-phy-supplyvdda-pll-supplyqcom,eeqcom,controlled-remotelyfreq-table-hzrequired-oppslanes-per-directionqcom,icevcc-max-microampvccq-supplyvccq-max-microamp#hwlock-cellsoperating-points-v2qcom,gmumemory-regionfirmware-nameopp-hzopp-levelqcom,qmp#iommu-cells#global-interruptsqcom,smem-statesqcom,smem-state-namesqcom,gsi-loaderlabel#sound-dai-cellsqcom,din-portsqcom,dout-portsqcom,ports-sintervalqcom,ports-offset1qcom,ports-offset2qcom,ports-hstartqcom,ports-hstopqcom,ports-word-lengthqcom,ports-block-pack-modeqcom,ports-block-group-countqcom,ports-lane-controlqcom,rx-port-mappingpowerdown-gpiossound-name-prefixvdd-1p8-supplyvdd-io-supplyqcom,port-mappingqcom,ports-sinterval-lowqcom,tx-port-mappinggpio-controller#gpio-cellsgpio-rangespinsfunctiondrive-strengthslew-ratebias-disablebias-bus-holdoutput-highinput-enableoutput-lowbus-widthsdhci-caps-maskqcom,dll-configqcom,ddr-configpinctrl-1assigned-clock-parentsvdda-supplyvddio-supplyvci-supplyvdds-supplyvdda12-supplysnps,hird-thresholdsnps,usb2-gadget-lpm-disablesnps,dis_u2_susphy_quirksnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,is-utmi-l1-suspendsnps,usb3_lpm_capablesnps,usb2-lpm-disablesnps,has-lpm-erratumtx-fifo-resizedr_modeusb-role-switchqcom,pdc-ranges#qcom,sensors#thermal-sensor-cellsqcom,channelqcom,bus-idbias-pull-uppower-sourcecolorled-sourcesled-max-microampflash-max-microampflash-max-timeout-usfunction-enumerator#pwm-cellsvdd18-supplyvdd3-supplylinux,codebitswakeup-parentgpio-reserved-rangesbias-pull-downoutput-disable#redistributor-regionsredistributor-stridemsi-controller#msi-cellsframe-numberqcom,tcs-offsetqcom,drv-idqcom,tcs-configvdd-bob1-supplyvdd-bob2-supplyvdd-l2-l13-l14-supplyvdd-l3-supplyvdd-l5-l16-supplyvdd-l6-l7-supplyvdd-l8-l9-supplyvdd-l11-supplyvdd-l12-supplyvdd-l15-supplyvdd-l17-supplyqcom,pmic-idregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-initial-moderegulator-allow-set-loadregulator-allowed-modesvdd-l1-supplyvdd-l2-supplyvdd-s1-supplyvdd-s2-supplyvdd-s3-supplyvdd-s4-supplyvdd-s5-supplyvdd-s6-supplyvdd-l1-l2-supplyvdd-l3-l4-supplyvdd-l5-supplyvdd-l6-supplyvdd-l7-supply#freq-domain-cellsopp-peak-kBpsqcom,glink-channelsqcom,non-secure-domainqcom,domainqcom,intentsqcom,protection-domainthermal-sensorstemperaturehysteresispolling-delay-passivetripcooling-devicenvmem-cellsnvmem-cell-namesmode-recoverymode-bootloaderserial0serial1debounce-intervallinux,can-disablewakeup-sourceorientation-gpiospower-roledata-roleaudio-routinglink-namesound-dairegulator-always-onregulator-boot-onqcom,micbias1-microvoltqcom,micbias2-microvoltqcom,micbias3-microvoltqcom,micbias4-microvoltqcom,mbhc-buttons-vthreshold-microvoltqcom,mbhc-headset-vthreshold-microvoltqcom,mbhc-headphone-vthreshold-microvoltqcom,rx-deviceqcom,tx-devicevdd-buck-supplyvdd-rxtx-supplyvdd-mic-bias-supplywlan-enable-gpiosbt-enable-gpiosvddio1p2-supplyvdddig-supply