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À­opp-514000000½£€ydsi@ae94000(2qcom,sm8650-dsi-ctrlqcom,mdss-dsi-ctrl– é@ ždsi_ctrl_½0n»»»B»8»/$Xbytebyte_intfpixelcoreifacebusV»»CÿÂ’Ú‡0Â5dsi Qokay sports port@0–endpointïÄf¿port@1–endpointïÅ "fÍopp-table2operating-points-v2fÃopp-187500000½ -à«opp-300000000½á£¬opp-358000000½V¥€­panel@02visionox,vtdr6130– >p… -Æ :Ç EȆÉÊåËÌ�defaultsleepportendpointïÍfÅphy@ae950002qcom,sm8650-dsi-phy-4nm0– éP éR€ éUždsi_phydsi_phy_lanedsi_plln» XifacerefIŽQokay PrfÂdsi@ae96000(2qcom,sm8650-dsi-ctrlqcom,mdss-dsi-ctrl– é` ždsi_ctrl_½0n»» »D»:»/$Xbytebyte_intfpixelcoreifacebusV» »EÿÎΒÚ‡0Î5dsi  Qdisabledports port@0–endpointïÏfÀport@1–endpointphy@ae970002qcom,sm8650-dsi-phy-4nm0– ép ér€ éuždsi_phydsi_phy_lanedsi_plln» XifacerefIŽ QdisabledfÎdisplayport-controller@af540002qcom,sm8650-dpP– õ@ õBÀ õPp õ`œ õpœ_½ (n»» »»»;Xcore_ifacecore_auxctrl_linkctrl_link_ifacestream_pixelV»»ÿ--’К‡0-5dpv Qdisabledopp-table2operating-points-v2fÐopp-162000000½ §ì€Ñopp-270000000½߀«opp-540000000½ /¿­opp-810000000½0Gž€yports port@0–endpointïÒfÁport@1–endpointïÓfØclock-controller@af000002qcom,sm8650-dispcc– ð\n'(/)ÂÂÎÎ--š‡«Iû Qokayf»phy@88e300062qcom,sm8650-snps-eusb2-phyqcom,sm8550-snps-eusb2-phy–Ž0TnXref¸/ŽQokay Er \s0ÔfÙphy@88e80002qcom,sm8650-qmp-usb3-dp-phy–Ž€0 n/³/µ/¶Xauxrefcom_auxusb3_pipe¸// ¿phycommonš/IŽ jQokay™s©Õf-ports port@0–endpointïÖf port@1–endpointï×fÛport@2–endpointïØfÓusb@a6f88002qcom,sm8650-dwc3qcom,dwc3– oˆD_‚ƒŽŽŽ<¨pwr_evenths_phy_irqdp_hs_phy_irqdm_hs_phy_irqss_phy_irq0n/ /­//²/¯&Xcfg_noccoreifacesleepmock_utmixoV/¯/­f$ø ë¸/š/y 0Qokayusb@a600000 2snps,dwc3– `Í þ… =.@ 0Ù-5usb2-phyusb3-phy } ‘ ® Ç ß ÷  ' = S hD wotg ports port@0–endpointïÚf port@1–endpointïÛf×interrupt-controller@b2200002qcom,sm8650-pdcqcom,pdc – "@ðdH �à^^a}?~Ì Šû�ôßÊfŽthermal-sensor@c228000 2qcom,sm8650-tsensqcom,tsens-v2 – "€ " þú€¨uplowcritical Ÿ ­fõthermal-sensor@c229000 2qcom,sm8650-tsensqcom,tsens-v2 – "� "0þû�¨uplowcritical Ÿ ­föthermal-sensor@c22a000 2qcom,sm8650-tsensqcom,tsens-v2 – "  "@þü‚¨uplowcritical Ÿ  ­f÷power-management@c300000#2qcom,sm8650-aoss-qmpqcom,aoss-qmp– 0&_& s&If‚sram@c3f00002qcom,rpmh-stats– ?spmi@c4000002qcom,spmi-pmic-arbP– @0 P@ D L BÐ@žcorechnlsobsrvrintrcnfg _Ž ¨periph_irqÊ Ã ÐÊß pmic@c2qcom,pm8010qcom,spmi-pmic–  temp-alarm@24002qcom,spmi-temp-alarm–$þ $ ­fpmic@d2qcom,pm8010qcom,spmi-pmic–  temp-alarm@24002qcom,spmi-temp-alarm–$þ $ ­fpmic@12qcom,pm8550qcom,spmi-pmic– temp-alarm@a002qcom,spmi-temp-alarm– þ  ­fgpio@8800 2qcom,pm8550-gpioqcom,spmi-gpio–ˆì¤ üÊßf¤sdc2-card-det-stategpio12normal Üb é øf¨led-controller@ee00*2qcom,pm8550-flash-ledqcom,spmi-flash-led–î Qdisabledpwm!2qcom,pm8550-pwmqcom,pm8350c-pwm  Qdisabledpmic@72qcom,pm8550qcom,spmi-pmic– temp-alarm@a002qcom,spmi-temp-alarm– þ  ­fgpio@8800!2qcom,pm8550b-gpioqcom,spmi-gpio–ˆìÜ üÊßfÜphy@fd002qcom,pm8550b-eusb2-repeater–ýŽ ž ÝfÔpmic@82qcom,pm8550qcom,spmi-pmic– temp-alarm@a002qcom,spmi-temp-alarm– þ  ­fgpio@8800"2qcom,pm8550ve-gpioqcom,spmi-gpio–ˆìÞüÊßfÞpmic@22qcom,pm8550qcom,spmi-pmic– temp-alarm@a002qcom,spmi-temp-alarm– þ  ­fgpio@8800"2qcom,pm8550vs-gpioqcom,spmi-gpio–ˆìßüÊßfßpmic@32qcom,pm8550qcom,spmi-pmic– temp-alarm@a002qcom,spmi-temp-alarm– þ  ­fgpio@8800"2qcom,pm8550vs-gpioqcom,spmi-gpio–ˆìàüÊßfàpmic@42qcom,pm8550qcom,spmi-pmic– temp-alarm@a002qcom,spmi-temp-alarm– þ  ­fgpio@8800"2qcom,pm8550vs-gpioqcom,spmi-gpio–ˆìáüÊßfápmic@62qcom,pm8550qcom,spmi-pmic– temp-alarm@a002qcom,spmi-temp-alarm– þ  ­f gpio@8800"2qcom,pm8550vs-gpioqcom,spmi-gpio–ˆìâüÊßfâpmic@02qcom,pm8550qcom,spmi-pmic– pon@13002qcom,pmk8350-pon– žhlospbspwrkey2qcom,pmk8350-pwrkeyþ )t Qdisabledresin2qcom,pmk8350-resinþ Qdisabledrtc@61002qcom,pmk8350-rtc–ab žrtcalarmþbnvram@71002qcom,spmi-sdam–q  0qreboot-reason@48–H 4f gpio@8800!2qcom,pmk8550-gpioqcom,spmi-gpio–¸ìãüÊßfãpmic@a2qcom,pmr735dqcom,spmi-pmic–  temp-alarm@a002qcom,spmi-temp-alarm– þ  ­f gpio@8800!2qcom,pmr735d-gpioqcom,spmi-gpio–ˆìäüÊßfäpinctrl@f1000002qcom,sm8650-tlmm–0 þÐìüÊßpÓ 9Ž G Jfpcci0-0-default-statef¯sda-pinsgpio113 cci_i2c_sda" ܘscl-pinsgpio114 cci_i2c_scl" ܘcci0-0-sleep-statef±sda-pinsgpio113 cci_i2c_sda" \scl-pinsgpio114 cci_i2c_scl" \cci0-1-default-statef°sda-pinsgpio115 cci_i2c_sda" ܘscl-pinsgpio116 cci_i2c_scl" ܘcci0-1-sleep-statef²sda-pinsgpio115 cci_i2c_sda" \scl-pinsgpio116 cci_i2c_scl" \cci1-0-default-statef³sda-pinsgpio117 cci_i2c_sda" ܘscl-pinsgpio118 cci_i2c_scl" ܘcci1-0-sleep-statefµsda-pinsgpio117 cci_i2c_sda" \scl-pinsgpio118 cci_i2c_scl" \cci1-1-default-statef´sda-pinsgpio12 cci_i2c_sda" ܘscl-pinsgpio13 cci_i2c_scl" ܘcci1-1-sleep-statef¶sda-pinsgpio12 cci_i2c_sda" \scl-pinsgpio13 cci_i2c_scl" \cci2-0-default-statef·sda-pinsgpio112 cci_i2c_sda" ܘscl-pinsgpio153 cci_i2c_scl" ܘcci2-0-sleep-statef¹sda-pinsgpio112 cci_i2c_sda" \scl-pinsgpio153 cci_i2c_scl" \cci2-1-default-statef¸sda-pinsgpio119 cci_i2c_sda" ܘscl-pinsgpio120 cci_i2c_scl" ܘcci2-1-sleep-statefºsda-pinsgpio119 cci_i2c_sda" \scl-pinsgpio120 cci_i2c_scl" \hub-i2c0-data-clk-stategpio64gpio65 i2chub0_se0" ÜfIhub-i2c1-data-clk-stategpio66gpio67 i2chub0_se1" ÜfJhub-i2c2-data-clk-stategpio68gpio69 i2chub0_se2" ÜfKhub-i2c3-data-clk-stategpio70gpio71 i2chub0_se3" ÜfLhub-i2c4-data-clk-stategpio72gpio73 i2chub0_se4" ÜfMhub-i2c5-data-clk-stategpio74gpio75 i2chub0_se5" ÜfNhub-i2c6-data-clk-stategpio76gpio77 i2chub0_se6" ÜfOhub-i2c7-data-clk-stategpio78gpio79 i2chub0_se7" ÜfPhub-i2c8-data-clk-stategpio206gpio207 i2chub0_se8" ÜfQhub-i2c9-data-clk-stategpio80gpio81 i2chub0_se9" ÜfRpcie0-default-statefqperst-pinsgpio94gpio" \clkreq-pinsgpio95pcie0_clk_req_n" Üwake-pinsgpio96gpio" Üpcie1-default-stateftperst-pinsgpio97gpio" \clkreq-pinsgpio98pcie1_clk_req_n" Üwake-pinsgpio99gpio" Üqup-i2c0-data-clk-stategpio32gpio33 qup1_se0" ÜfUqup-i2c1-data-clk-stategpio36gpio37 qup1_se1" ÜfXqup-i2c2-data-clk-stategpio40gpio41 qup1_se2" Üf[qup-i2c3-data-clk-stategpio44gpio45 qup1_se3" Üf^qup-i2c4-data-clk-stategpio48gpio49 qup1_se4" Üfaqup-i2c5-data-clk-stategpio52gpio53 qup1_se5" Üfdqup-i2c6-data-clk-stategpio56gpio57 qup1_se6" Üfgqup-i2c7-data-clk-stategpio60gpio61 qup1_se7" Üfjqup-i2c8-data-clk-state gpio0gpio1 qup2_se0" Üf4qup-i2c9-data-clk-state gpio4gpio5 qup2_se1" Üf7qup-i2c10-data-clk-state gpio8gpio9 qup2_se2" Üf:qup-i2c11-data-clk-stategpio12gpio13 qup2_se3" Üf=qup-i2c12-data-clk-stategpio16gpio17 qup2_se4" Üf@qup-i2c13-data-clk-stategpio20gpio21 qup2_se5" ÜfCqup-i2c14-data-clk-stategpio24gpio25 qup2_se6" Üqup-spi0-cs-stategpio35 qup1_se0";fWqup-spi0-data-clk-stategpio32gpio33gpio34 qup1_se0";fVqup-spi1-cs-stategpio39 qup1_se1";fZqup-spi1-data-clk-stategpio36gpio37gpio38 qup1_se1";fYqup-spi2-cs-stategpio43 qup1_se2";f]qup-spi2-data-clk-stategpio40gpio41gpio42 qup1_se2";f\qup-spi3-cs-stategpio47 qup1_se3";f`qup-spi3-data-clk-stategpio44gpio45gpio46 qup1_se3";f_qup-spi4-cs-stategpio51 qup1_se4";fcqup-spi4-data-clk-stategpio48gpio49gpio50 qup1_se4";fbqup-spi5-cs-stategpio55 qup1_se5";ffqup-spi5-data-clk-stategpio52gpio53gpio54 qup1_se5";fequp-spi6-cs-stategpio59 qup1_se6";fiqup-spi6-data-clk-stategpio56gpio57gpio58 qup1_se6";fhqup-spi7-cs-stategpio63 qup1_se7";flqup-spi7-data-clk-stategpio60gpio61gpio62 qup1_se7";fkqup-spi8-cs-stategpio3 qup2_se0";f6qup-spi8-data-clk-stategpio0gpio1gpio2 qup2_se0";f5qup-spi9-cs-stategpio7 qup2_se1";f9qup-spi9-data-clk-stategpio4gpio5gpio6 qup2_se1";f8qup-spi10-cs-stategpio11 qup2_se2";f<qup-spi10-data-clk-stategpio8gpio9gpio10 qup2_se2";f;qup-spi11-cs-stategpio15 qup2_se3";f?qup-spi11-data-clk-stategpio12gpio13gpio14 qup2_se3";f>qup-spi12-cs-stategpio19 qup2_se4";fBqup-spi12-data-clk-stategpio16gpio17gpio18 qup2_se4";fAqup-spi13-cs-stategpio23 qup2_se5";fEqup-spi13-data-clk-stategpio20gpio21gpio22 qup2_se5";fDqup-spi14-cs-stategpio27 qup2_se6";qup-spi14-data-clk-stategpio24gpio25gpio26 qup2_se6";qup-uart14-default-stategpio26gpio27 qup2_se6" ÜfFqup-uart14-cts-rts-stategpio24gpio25 qup2_se6" \fGqup-uart15-default-stategpio30gpio31 qup2_se7";fHsdc2-sleep-statef©clk-pins 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,apps_rscbcm-voter2qcom,bcm-voterfclock-controller2qcom,sm8650-rpmh-clknåXxoIfpower-controller2qcom,sm8650-rpmhpd’æ f‡opp-table2operating-points-v2fæopp-16Äopp-48Ä0fªopp-52Ä4opp-56Ä8fÑopp-60Ä<opp-64Ä@f«opp-80ÄPopp-128Ä€f¬opp-144Ä�opp-192ÄÀf­opp-256Äfyopp-320Ä@opp-336ÄPopp-384Ä€opp-416Ä regulators-02qcom,pm8550-rpmh-regulators êç úç è é .è @è Qè bé qê €ê �ë žbbob1 «vreg_bob1 º2K Ò2qcom,sm8650-pmic-glinkqcom,sm8550-pmic-glinkqcom,pmic-glink  £pconnector@02usb-c-connector–µdualÀdualports port@0–endpointï fÚport@1–endpointï fÖsound(2qcom,sm8650-sndcardqcom,sm8450-sndcard ,SM8650-MTP3ÊSpkrLeft INWSA_SPK1 OUTSpkrRight INWSA_SPK2 OUTwsa-dai-link ØWSA Playbackcpuâicodecâšplatformâvph-pwr-regulator2regulator-fixed «vph_pwr º8u  Ò8u ìfç interrupt-parent#address-cells#size-cellsmodelcompatiblestdout-path#clock-cellsclock-frequencyphandleclocksclock-multclock-divdevice_typeregpower-domainspower-domain-namesenable-methodnext-level-cachecapacity-dmips-mhzdynamic-power-coefficientqcom,freq-domain#cooling-cellscache-levelcache-unifiedcpuentry-methodidle-state-namearm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uslocal-timer-stopqcom,dload-modeinterconnects#interconnect-cellsqcom,bcm-votersinterrupts#power-domain-cellsdomain-idle-statesrangesno-maphwlocksqcom,client-idqcom,vmidinterrupts-extendedmboxesqcom,smemqcom,local-pidqcom,remote-pidqcom,entry-name#qcom,smem-state-cellsinterrupt-controller#interrupt-cellsdma-ranges#reset-cells#mbox-cellsdma-channelsdma-channel-mask#dma-cellsiommusdma-coherentstatusclock-namesinterconnect-namesdmasdma-namespinctrl-0pinctrl-namesreg-namesinterrupt-namesresetsreset-namesiommu-mapinterrupt-mapinterrupt-map-maskmsi-mapmsi-map-masklinux,pci-domainnum-lanesbus-rangephysphy-nameswake-gpiosperst-gpiosassigned-clocksassigned-clock-ratesclock-output-names#phy-cellsvdda-phy-supplyvdda-pll-supplyvdda-qref-supplyqcom,eeqcom,num-eesnum-channelsqcom,controlled-remotelyfreq-table-hzrequired-oppslanes-per-directionqcom,icereset-gpiosvcc-supplyvcc-max-microampvccq-supplyvccq-max-microamp#hwlock-cellsoperating-points-v2qcom,gmumemory-regionopp-hzopp-levelqcom,qmp#iommu-cells#global-interruptsqcom,smem-statesqcom,smem-state-namesfirmware-namelabelqcom,glink-channelsqcom,non-secure-domainqcom,domainqcom,intents#sound-dai-cellsqcom,protection-domainqcom,din-portsqcom,dout-portsqcom,ports-sintervalqcom,ports-offset1qcom,ports-offset2qcom,ports-hstartqcom,ports-hstopqcom,ports-word-lengthqcom,ports-block-pack-modeqcom,ports-block-group-countqcom,ports-lane-controlpowerdown-gpiossound-name-prefixvdd-1p8-supplyvdd-io-supplyqcom,port-mappingqcom,ports-sinterval-lowgpio-controller#gpio-cellsgpio-rangespinsfunctiondrive-strengthslew-ratebias-disablebias-bus-holdoutput-highinput-enableoutput-lowbus-widthsdhci-caps-maskqcom,dll-configqcom,ddr-configcd-gpiosvmmc-supplyvqmmc-supplyno-sdiono-mmcpinctrl-1remote-endpointassigned-clock-parentsvdda-supplydata-lanesvddio-supplyvci-supplyvdd-supplyvdds-supplyvdda12-supplyorientation-switchsnps,hird-thresholdsnps,usb2-gadget-lpm-disablesnps,dis_u2_susphy_quirksnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,is-utmi-l1-suspendsnps,usb3_lpm_capablesnps,usb2-lpm-disablesnps,has-lpm-erratumtx-fifo-resizedr_modeusb-role-switchqcom,pdc-ranges#qcom,sensors#thermal-sensor-cellsqcom,channelqcom,bus-idbias-pull-upoutput-disablepower-source#pwm-cellsvdd18-supplyvdd3-supplylinux,codebitswakeup-parentgpio-reserved-rangesbias-pull-down#redistributor-regionsredistributor-stridemsi-controller#msi-cellsframe-numberqcom,tcs-offsetqcom,drv-idqcom,tcs-configvdd-bob1-supplyvdd-bob2-supplyvdd-l2-l13-l14-supplyvdd-l3-supplyvdd-l5-l16-supplyvdd-l6-l7-supplyvdd-l8-l9-supplyvdd-l11-supplyvdd-l12-supplyvdd-l15-supplyvdd-l17-supplyqcom,pmic-idregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-initial-moderegulator-allow-set-loadregulator-allowed-modesvdd-l1-supplyvdd-l2-supplyvdd-s1-supplyvdd-s2-supplyvdd-s3-supplyvdd-s4-supplyvdd-s5-supplyvdd-s6-supplyvdd-l1-l2-supplyvdd-l3-l4-supplyvdd-l5-supplyvdd-l6-supplyvdd-l7-supply#freq-domain-cellsopp-peak-kBpsthermal-sensorstemperaturehysteresispolling-delay-passivetripcooling-devicenvmem-cellsnvmem-cell-namesmode-recoverymode-bootloaderserial0orientation-gpiospower-roledata-roleaudio-routinglink-namesound-dairegulator-always-onregulator-boot-on