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‹4<=ALFÏqFÏq?C9mclk_txmclk_rxhclk&c°txNPQ ˜tx-mrx-mx }zokay­ i2s@fe410000,rockchip,rk3568-i2s-tdmýþA ‹5<EILFÏqFÏqGK:mclk_txmclk_rxhclk&cc°rxtxNRS ˜tx-mrx-mx ídefault0ãdefghijklmno} zdisabledi2s@fe420000,rockchip,rk3568-i2s-tdmýþB ‹6<MLFÏqOO;mclk_txmclk_rxhclk&cc°txrxNT˜tx-mx ídefaultãpqrs} zdisabledi2s@fe430000,rockchip,rk3568-i2s-tdmýþC ‹7SW<mclk_txmclk_rxhclk&cc°txrxNUV ˜tx-mrx-mx } zdisabledpdm@fe440000,rockchip,rk3568-pdmýþD ‹LZYpdm_clkpdm_hclk&c °rxãtuvwxyídefaultNX˜pdm-m} zdisabledspdif@fe460000,rockchip,rk3568-spdifýþF ‹f mclkhclk_\&c°txídefaultãz} zdisableddma-controller@fe530000,arm,pl330arm,primecellýþS@‹ º  apb_pclkÑ­&dma-controller@fe550000,arm,pl330arm,primecellýþU@‹º  apb_pclkÑ­ci2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþZ ‹/HG i2cpclkã{ídefault  zdisabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþ[ ‹0JI i2cpclkã|ídefault  zdisabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþ\ ‹1LK i2cpclkã}ídefault  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‹w'$baudclkapb_pclk&&&ã�ídefault+8 zdisabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uartýþh ‹x+(baudclkapb_pclk&&& ã�ídefault+8 zdisabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uartýþi ‹y/,baudclkapb_pclk&& & ã‘ídefault+8 zdisabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþj ‹z30baudclkapb_pclk&& & ã’ídefault+8 zdisabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþk ‹{74baudclkapb_pclk&&&ã“ídefault+8 zdisabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþl ‹|;8baudclkapb_pclk&&&ã”ídefault+8 zdisabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþm ‹}?<baudclkapb_pclk&&&ã•ídefault+8 zdisabledthermal-zonescpu-thermalÜdòè –tripscpu_alert0 p Ðøpassive­—cpu_alert1 $ø Ðøpassivecpu_crit s Ð øcriticalcooling-mapsmap0 '—0 , ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿgpu-thermalÜòè –tripsgpu-threshold p Ðøpassivegpu-target $ø Ðøpassive­˜gpu-crit s Ð øcriticalcooling-mapsmap0 '˜ ,™ÿÿÿÿÿÿÿÿtsadc@fe710000,rockchip,rk3568-tsadcýþq ‹s<Lf@ ®`tsadcapb_pclkN�‚×x  ;sídefaultsleepãš R› \zokay r ‰­–saradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcýþr ‹]saradcapb_pclkN€ ˜saradc-apb ¤zokay ¶œpwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþnZY pwmpclkã�ídefaultB zdisabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþnZY pwmpclkãžídefaultB zdisabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþn ZY pwmpclkãŸídefaultB zdisabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþn0ZY pwmpclkã ídefaultB zdisabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo]\ pwmpclkã¡ídefaultB zdisabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo]\ pwmpclkã¢ídefaultB zdisabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo ]\ pwmpclkã£ídefaultB zdisabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo0]\ pwmpclkã¤ídefaultB zdisabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp`_ pwmpclkã¥ídefaultB zdisabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp`_ pwmpclkã¦ídefaultB zdisabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp `_ pwmpclkã§ídefaultB zdisabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp0`_ pwmpclkã¨ídefaultB zdisabledphy@fe830000,rockchip,rk3568-naneng-combphyýþƒ"} refapbpipe<"LõáNǘphy © Ôª êzokay­phy@fe840000,rockchip,rk3568-naneng-combphyýþ„%~ refapbpipe<%LõáNɘphy © Ô« êzokay­phy@fe870000,rockchip,rk3568-csi-dphyýþ‡ypclk êNº˜apbx  zdisabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphyýþ… refpclkz ê/ ˜apbN» zdisabled­Omipi-dphy@fe860000,rockchip,rk3568-dsi-dphyýþ† refpclk{ ê/ ˜apbN¼ zdisabled­Pusb2phy@fe8a0000,rockchip,rk3568-usb2phyýþŠphyclkÐclk_usbphy0_480m ‹‡ õ¬#zokay­host-port êzokay ­­otg-port êzokay­usb2phy@fe8b0000,rockchip,rk3568-usb2phyýþ‹phyclkÐclk_usbphy1_480m ‹ˆ õ®#zokayhost-port êzokay ¯­otg-port êzokay­pinctrl,rockchip,rk3568-pinctrlx ®X û­°gpio@fdd60000,rockchip,gpio-bankýýÖ ‹!.   °  ,uŠ­#gpio@fe740000,rockchip,gpio-bankýþt ‹"cd  °  ,uŠgpio@fe750000,rockchip,gpio-bankýþu ‹#ef  °@  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baudpclkNYX ˜coreapbídefaultãË zdisabledphy@fe820000,rockchip,rk3568-naneng-combphyýþ‚| refapbpipe<LõáNŘphy © ÔÌ êzokay­chosen serial2:1500000n8hdmi-con,hdmi-connectorøaportendpointmÍ­Wvdd-usbc-regulator,regulator-fixed ¢vdd_usbc±Å×LK@ïLK@­Îvcc3v3-sys-regulator,regulator-fixed ¢vcc3v3_sys±Å×2Z ï2Z Î­%vcc5v0-sys-regulator,regulator-fixed ¢vcc5v0_sys±Å×LK@ïLK@έ"vcc3v3-pcie-regulator,regulator-fixed ¢vcc3v3_pcie×2Z ï2Z  * <# = @"­¼vcc5v0-usb-regulator,regulator-fixed ¢vcc5v0_usb±Å×LK@ïLK@έÐvcc5v0-usb-host-regulator,regulator-fixed * Ü#ídefaultãÏ¢vcc5v0_usb_host±Å×LK@ïLK@Э­vcc5v0-usb-otg-regulator,regulator-fixed * Ü#ídefaultãÑ¢vcc5v0_usb_otg×LK@ïLK@Э¯pcie30-avdd0v9-regulator,regulator-fixed¢pcie30_avdd0v9±Å× » ï » %pcie30-avdd1v8-regulator,regulator-fixed¢pcie30_avdd1v8±Å×w@ïw@%gpio-leds ,gpio-ledsídefaultãÒÓÔÕled-lan1 N Tlan ] <Öled-lan2 N Tlan ] <Öled-power N Tpower qheartbeat <×led-wan N Twan <¾ interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3mmc0mmc1ethernet0device_typeregclocks#cooling-cellsenable-methodoperating-points-v2i-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachecpu-supplyphandlecache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityarm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesrangesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerpmuio1-supplypmuio2-supplyvccio1-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspendrockchip,system-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplywakeup-sourceregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpoint#sound-dai-cellsavdd-0v9-supplyavdd-1v8-supplyrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesreset-gpiosno-sdiono-mmcbus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpvmmc-supplyvqmmc-supplynon-removabledma-namesarm,pl330-periph-burst#dma-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfphy-supplygpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsrockchip,phy-grfdata-lanesvpcie3v3-supplyclock_in_outphy-handlephy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaystdout-pathenable-active-highstartup-delay-uscolorfunctionfunction-enumeratorlinux,default-trigger