Ð þíRÓ8D¬('Dt"tsd,rk3588-jaguarrockchip,rk3588 +$7Theobroma Systems RK3588-SBC Jaguaraliases=/pinctrl/gpio@fd8a0000C/pinctrl/gpio@fec20000I/pinctrl/gpio@fec30000O/pinctrl/gpio@fec40000U/pinctrl/gpio@fec50000[/i2c@fd880000`/i2c@fea90000e/i2c@feaa0000j/i2c@feab0000o/i2c@feac0000t/i2c@fead0000y/i2c@fec80000~/i2c@fec90000ƒ/i2c@feca0000ˆ/serial@fd890000�/serial@feb40000˜/serial@feb50000 /serial@feb60000¨/serial@feb70000°/serial@feb80000¸/serial@feb90000À/serial@feba0000È/serial@febb0000Ð/serial@febc0000Ø/spi@feb00000Ý/spi@feb10000â/spi@feb20000ç/spi@feb30000ì/spi@fecb0000ñ/ethernet@fe1b0000û/mmc@fe2e0000/mmc@fe2c0000/i2c@fd880000/rtc@6fcpus+cpu-mapcluster0core0 core1 core2 core3 cluster1core0 core1 cluster2core0 core1 cpu@0cpuarm,cortex-a55psci,? F V0£,k {€ˆ@š€§€´@Æ€Ó ääþ !,cpu@100cpuarm,cortex-a55psci,? k {€ˆ@š€§€´@Æ€Óääþ !,cpu@200cpuarm,cortex-a55psci,? k {€ˆ@š€§€´@Æ€Óääþ !,cpu@300cpuarm,cortex-a55psci,? k {€ˆ@š€§€´@Æ€Óääþ !,cpu@400cpuarm,cortex-a76psci,? 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?é,àsyscon@fd5a8000rockchip,rk3588-vo1-grfsysconýZ€@?Ñ,ksyscon@fd5ac000rockchip,rk3588-usb-grfsysconýZÀ@,Þsyscon@fd5b0000rockchip,rk3588-php-grfsysconý[,+syscon@fd5bc000$rockchip,rk3588-pipe-phy-grfsysconý[À,ásyscon@fd5c4000$rockchip,rk3588-pipe-phy-grfsysconý\@,âsyscon@fd5c8000$rockchip,rk3588-usbdpphy-grfsysconý\€@,ßsyscon@fd5d0000.rockchip,rk3588-usb2phy-grfsysconsimple-mfdý]@+,Ýusb2phy@0rockchip,rk3588-usb2phyÌ? +phyclk usb480m_phy0æ‰xmRphyapb Edisabled,Üotg-port^ Edisabled,#syscon@fd5d8000.rockchip,rk3588-usb2phy-grfsysconsimple-mfdý]€@+usb2phy@8000rockchip,rk3588-usb2phy€Ì? +phyclk usb480m_phy2æ‡xoRphyapbEokay,%host-port^Eokayi*,&syscon@fd5dc000.rockchip,rk3588-usb2phy-grfsysconsimple-mfdý]À@+usb2phy@c000rockchip,rk3588-usb2phyÀÌ? +phyclk usb480m_phy3æˆxp RphyapbEokay,'host-port^Eokay,(syscon@fd5e0000$rockchip,rk3588-hdptxphy-grfsysconý^,Ûsyscon@fd5f0000rockchip,rk3588-iocsysconý_,ãsram@fd600000 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?!#" ™456…+power-domain@10 ?!#"™7…power-domain@11 ?!#"™8…power-domain@12 ?™9:;<…power-domain@13 +…power-domain@14(?€¯­�™=…power-domain@15 ?…¯­†™>…power-domain@16?µ¶ ™?@A+…power-domain@17 ?ºµ¶» ™BCD…power-domain@21�?¯®­°›š�žŸ ¡¢£¤¥¦¨§ ™EFGHIJKL+…power-domain@23?CA¯™M…power-domain@14 ?€¯­�™=…power-domain@15?…¯­™>…power-domain@22?«ª™N…power-domain@24?[Z]™OP+…power-domain@258?çèæäßÞZ™Q…power-domain@268?Q™RS…power-domain@270?ÒÓÐÏÖÕ™TUVW+…power-domain@28 ?ÒÓ™XY…power-domain@29(?ÇÆÊÉÓ™Z[…power-domain@30?z{™\…power-domain@31@?WŒÀ�Ž��‘™]^_`…power-domain@33!?WZ[…power-domain@34"?WZ[…power-domain@37%?Š2™a…power-domain@38&?45…power-domain@40(™b…video-codec@fdb50000+rockchip,rk3588-vpu121rockchip,rk3568-vpuýµæwvdpu?±² +aclkhclk c7 iommu@fdb50800,rockchip,rk3588-iommurockchip,rk3568-iommuýµ@æv +aclkiface?±²7 E,crga@fdb80000(rockchip,rk3588-rgarockchip,rk3288-rgaý¸€æt?¨§©+aclkhclksclkxrqp Rcoreaxiahb7 video-codec@fdba0000rockchip,rk3588-vepu121ýºæz?�ž +aclkhclk d7 iommu@fdba0800,rockchip,rk3588-iommurockchip,rk3568-iommuýº@æy?�ž +aclkiface7 E,dvideo-codec@fdba4000rockchip,rk3588-vepu121ýº@æ|?Ÿ  +aclkhclk e7 iommu@fdba4800,rockchip,rk3588-iommurockchip,rk3568-iommuýºH@æ{?Ÿ  +aclkiface7 E,evideo-codec@fdba8000rockchip,rk3588-vepu121ýº€æ~?¡¢ +aclkhclk f7 iommu@fdba8800,rockchip,rk3588-iommurockchip,rk3568-iommuýºˆ@æ}?¡¢ +aclkiface7 E,fvideo-codec@fdbac000rockchip,rk3588-vepu121ýºÀæ€?£¤ +aclkhclk g7 iommu@fdbac800,rockchip,rk3588-iommurockchip,rk3568-iommuýºÈ@æ?£¤ +aclkiface7 E,gvideo-codec@fdc70000rockchip,rk3588-av1-vpuýÇælvdpuFACVׄׄ?AC +aclkhclk7  xþýÿvop@fdd90000rockchip,rk3588-vop ýÙBýÙP§vopgamma-lutæœ8?]\abcd[7+aclkhclkdclk_vp0dclk_vp1dclk_vp2dclk_vp3pclk_vop h7 ti±jÂkÓl Edisabledports+,port@0+port@1+port@2+port@3+iommu@fdd97e00,rockchip,rk3588-iommurockchip,rk3568-iommu ýÙ~ýÙæœ?]\ +aclkifaceE7  Edisabled,hi2s@fddc0000rockchip,rk3588-i2s-tdmýÜæ¸?ììá+mclk_txmclk_rxhclkFêàTmYtx7 x¸Rtx-m÷ Edisabledi2s@fddf0000rockchip,rk3588-i2s-tdmýßæ¹?445+mclk_txmclk_rxhclkF1àTmYtx7 xØRtx-m÷ Edisabledi2s@fddfc000rockchip,rk3588-i2s-tdmýßÀæ½?00,+mclk_txmclk_rxhclkF-àTmYrx7 xìRrx-m÷ Edisabledqos@fdf35000rockchip,rk3588-qossysconýóP ,9qos@fdf35200rockchip,rk3588-qossysconýóR ,:qos@fdf35400rockchip,rk3588-qossysconýóT ,;qos@fdf35600rockchip,rk3588-qossysconýóV ,<qos@fdf36000rockchip,rk3588-qossysconýó` ,\qos@fdf39000rockchip,rk3588-qossysconýó� ,aqos@fdf3d800rockchip,rk3588-qossysconýóØ ,bqos@fdf3e000rockchip,rk3588-qossysconýóà ,^qos@fdf3e200rockchip,rk3588-qossysconýóâ ,]qos@fdf3e400rockchip,rk3588-qossysconýóä ,_qos@fdf3e600rockchip,rk3588-qossysconýóæ ,`qos@fdf40000rockchip,rk3588-qossysconýô ,Zqos@fdf40200rockchip,rk3588-qossysconýô ,[qos@fdf40400rockchip,rk3588-qossysconýô ,Tqos@fdf40500rockchip,rk3588-qossysconýô ,Uqos@fdf40600rockchip,rk3588-qossysconýô ,Vqos@fdf40800rockchip,rk3588-qossysconýô ,Wqos@fdf41000rockchip,rk3588-qossysconýô ,Xqos@fdf41100rockchip,rk3588-qossysconýô ,Yqos@fdf60000rockchip,rk3588-qossysconýö ,?qos@fdf60200rockchip,rk3588-qossysconýö ,@qos@fdf60400rockchip,rk3588-qossysconýö ,Aqos@fdf61000rockchip,rk3588-qossysconýö ,Bqos@fdf61200rockchip,rk3588-qossysconýö ,Cqos@fdf61400rockchip,rk3588-qossysconýö ,Dqos@fdf62000rockchip,rk3588-qossysconýö ,=qos@fdf63000rockchip,rk3588-qossysconýö0 ,>qos@fdf64000rockchip,rk3588-qossysconýö@ ,Mqos@fdf66000rockchip,rk3588-qossysconýö` ,Eqos@fdf66200rockchip,rk3588-qossysconýöb ,Fqos@fdf66400rockchip,rk3588-qossysconýöd ,Gqos@fdf66600rockchip,rk3588-qossysconýöf ,Hqos@fdf66800rockchip,rk3588-qossysconýöh ,Iqos@fdf66a00rockchip,rk3588-qossysconýöj ,Jqos@fdf66c00rockchip,rk3588-qossysconýöl ,Kqos@fdf66e00rockchip,rk3588-qossysconýön ,Lqos@fdf67000rockchip,rk3588-qossysconýöp ,Nqos@fdf67200rockchip,rk3588-qossysconýör qos@fdf70000rockchip,rk3588-qossysconý÷ ,7qos@fdf71000rockchip,rk3588-qossysconý÷ ,8qos@fdf72000rockchip,rk3588-qossysconý÷ ,4qos@fdf72200rockchip,rk3588-qossysconý÷" ,5qos@fdf72400rockchip,rk3588-qossysconý÷$ ,6qos@fdf80000rockchip,rk3588-qossysconýø ,Qqos@fdf81000rockchip,rk3588-qossysconýø ,Rqos@fdf81200rockchip,rk3588-qossysconýø ,Sqos@fdf82000rockchip,rk3588-qossysconýø ,Oqos@fdf82200rockchip,rk3588-qossysconýø" ,Pdfi@fe060000þrockchip,rk3588-dfi@æ&0:Ónpcie@fe180000*rockchip,rk3588-pcierockchip,rk3568-pcie0?0?CH>MR°)+aclk_mstaclk_slvaclk_dbipclkauxpipepciPæø÷öõôsyspmcmsglegacyerr#`6ooooDUd0p0l`) epcie-phy7 "T$óóó ó à@ À@0 @À@þó§dbiapbconfigx). Rpwrpipe+ Edisabledlegacy-interrupt-controllerv æõ,opcie@fe190000*rockchip,rk3588-pcierockchip,rk3568-pcie@O0?DI?NSs)+aclk_mstaclk_slvaclk_dbipclkauxpipepciPæýüûúùsyspmcmsglegacyerr#`6qqqqDUd@p@l`r epcie-phy7 "T$ôôô ô à@ @0 A@þô§dbiapbconfigx*/ Rpwrpipe+ Edisabledlegacy-interrupt-controllerv æú,qethernet@fe1c0000&rockchip,rk3588-gmacsnps,dwmac-4.20aþ æêémacirqeth_wake_irq(?67Y^50+stmmacethclk_mac_refpclk_macaclk_macptp_ref7 !x$ Rstmmacethti‹+œs¬½tÐuã Edisabledmdiosnps,dwmac-mdio+stmmac-axi-configìö,srx-queues-config,tqueue0queue1tx-queues-config,,uqueue0queue1sata@fe210000'rockchip,rk3588-dwc-ahcisnps,dwc-ahciþ!æ(?b_eTo+satapmaliverxoobrefasicB+ Edisabledsata-port@0T@`r esata-phya p sata@fe230000'rockchip,rk3588-dwc-ahcisnps,dwc-ahciþ#æ(?dagVq+satapmaliverxoobrefasicB+ Edisabledsata-port@0T@`) esata-phya p spi@fe2b0000 rockchip,sfcþ+@æÎ?/0+clk_sfchclk_sfc+ Edisabledmmc@fe2c00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshcþ,@æË ?  ­®+biuciuciu-driveciu-sampleŠðÑ€‹default �vwx7 (Eokay˜¢¬½ÈÕâïü yzmmc@fe2d00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshcþ-@æÌ ?Š‹«¬+biuciuciu-driveciu-sampleŠ ë‹default�{7 % Edisabledmmc@fe2e0000rockchip,rk3588-dwcmshcþ.æÍF-., V ëÂn6 ëÂ(?,*+-.+corebusaxiblocktimerŠ ëÂ�|}~‹default(xRcorebusaxiblocktimerEokay¢#5BQ`z€…�“ y�i2s@fe470000rockchip,rk3588-i2s-tdmþGæ´?+/(+mclk_txmclk_rxhclkF)-àT..Ytxrx7 &x*+ Rtx-mrx-m¡‹default(�‚ƒ„…†‡ˆ‰Š‹÷ Edisabledi2s@fe480000rockchip,rk3588-i2s-tdmþHæµ?y}u+mclk_txmclk_rxhclkT..Ytxrxx^_ Rtx-mrx-m¡‹default(�Œ�Ž��‘’“”•÷ Edisabledi2s@fe490000(rockchip,rk3588-i2srockchip,rk3066-i2sþIæ¶?+i2s_clki2s_hclkFàT––Ytxrx7 &‹default�—˜™š÷ Edisabledi2s@fe4a0000(rockchip,rk3588-i2srockchip,rk3066-i2sþJæ·?%+i2s_clki2s_hclkF"àT––Ytxrx7 &‹default�›œ�ž÷ Edisabledinterrupt-controller@fe600000 arm,gic-v3 þ`þhæ v¼þaƨ8Ñ$+,msi-controller@fe640000arm,gic-v3-itsþdÑà,pmsi-controller@fe660000arm,gic-v3-itsþfÑà,ðppi-partitionsinterrupt-partition-0ë,interrupt-partition-1ë ,dma-controller@fea10000arm,pl330arm,primecellþ¡@ æVWô?n +apb_pclk ,.dma-controller@fea30000arm,pl330arm,primecellþ£@ æXYô?o +apb_pclk ,–i2c@fea90000(rockchip,rk3588-i2crockchip,rk3399-i2cþ©?ƒ{ +i2cpclkæ>�Ÿ‹default+ Edisabledi2c@feaa0000(rockchip,rk3588-i2crockchip,rk3399-i2cþª?„| +i2cpclkæ?� ‹default+ Edisabledi2c@feab0000(rockchip,rk3588-i2crockchip,rk3399-i2cþ«?…} +i2cpclkæ@�¡‹default+ Edisabledi2c@feac0000(rockchip,rk3588-i2crockchip,rk3399-i2cþ¬?†~ +i2cpclkæA�¢‹default+ Edisabledi2c@fead0000(rockchip,rk3588-i2crockchip,rk3399-i2cþ­?‡ +i2cpclkæB�£‹default+ Edisabledtimer@feae0000,rockchip,rk3588-timerrockchip,rk3288-timerþ® æ!?TW +pclktimerwatchdog@feaf0000 rockchip,rk3588-wdtsnps,dw-wdtþ¯?dc +tclkpclkæ;spi@feb00000(rockchip,rk3588-spirockchip,rk3066-spiþ°æF?—’+spiclkapb_pclkT..Ytxrx  �¤¥¦‹default+ Edisabledspi@feb10000(rockchip,rk3588-spirockchip,rk3066-spiþ±æG?˜“+spiclkapb_pclkT..Ytxrx  �§¨©‹default+ Edisabledspi@feb20000(rockchip,rk3588-spirockchip,rk3066-spiþ²æH?™”+spiclkapb_pclkT––Ytxrx �ª«‹default+EokayF™V ëÂpmic@0rockchip,rk806 ¬æ  -‹default�­®¯° 9B@ K c- o- {- ‡- “- Ÿ- «- ·- Ã- Ï- ܱ é- ö² ² -dvs1-null-pins gpio_pwrctrl1 !pin_fun0,®dvs2-null-pins gpio_pwrctrl2 !pin_fun0,¯dvs3-null-pins gpio_pwrctrl3 !pin_fun0,°regulatorsdcdc-reg1Ùëdp~ð0Ô ¶vdd_gpu_s0 *�,"regulator-state-mem;dcdc-reg2¶vdd_cpu_lit_s0ÅÙëdp~ð0Ô,regulator-state-mem;dcdc-reg3 ¶vdd_log_s0ÅÙë L¸ q°0Ôregulator-state-mem; F q°dcdc-reg4 ¶vdd_vdenc_s0ÅÙëdp~ð0Ôregulator-state-mem;dcdc-reg5 ¶vdd_ddr_s0ÅÙë L¸ » 0Ôregulator-state-mem; F øPdcdc-reg6 ¶vdd2_ddr_s3ÅÙregulator-state-mem bdcdc-reg7¶vdd_2v0_pldo_s3ÅÙë„€„€0Ô,±regulator-state-mem b F„€dcdc-reg8 ¶vcc_3v3_s3ÅÙë2Z 2Z ,yregulator-state-mem b F2Z dcdc-reg9 ¶vddq_ddr_s0ÅÙregulator-state-mem;dcdc-reg10 ¶vcc_1v8_s3ÅÙëw@w@,�regulator-state-mem b Fw@pldo-reg1 ¶vcca_1v8_s0ÅÙëw@w@regulator-state-mem;pldo-reg2 ¶vcc_1v8_s0ÅÙëw@w@,Ôregulator-state-mem; Fw@pldo-reg3 ¶vdda_1v2_s0ÅÙëO€O€regulator-state-mem;pldo-reg4 ¶vcca_3v3_s0ÅÙë2Z 2Z 0Ôregulator-state-mem;pldo-reg5 ¶vccio_sd_s0ÅÙëw@2Z 0Ô,zregulator-state-mem;pldo-reg6 ¶pldo6_s3ÅÙëw@w@regulator-state-mem b Fw@nldo-reg1 ¶vdd_0v75_s3ÅÙë q° q°regulator-state-mem b F q°nldo-reg2¶vdda_ddr_pll_s0ÅÙë øP øPregulator-state-mem; F øPnldo-reg3 ¶vdda_0v75_s0ÅÙë q° q°regulator-state-mem;nldo-reg4 ¶vdda_0v85_s0ÅÙë øP øPregulator-state-mem;nldo-reg5 ¶vdd_0v75_s0ÅÙë q° q°regulator-state-mem;spi@feb30000(rockchip,rk3588-spirockchip,rk3066-spiþ³æI?š•+spiclkapb_pclkT––Ytxrx  �³´µ‹default+ Edisabledserial@feb40000&rockchip,rk3588-uartsnps,dw-apb-uartþ´æL?«Ÿ+baudclkapb_pclkT.. Ytxrx�¶‹defaultmc Edisabledserial@feb50000&rockchip,rk3588-uartsnps,dw-apb-uartþµæM?¯ +baudclkapb_pclkT. . Ytxrx�·‹defaultmcEokayserial@feb60000&rockchip,rk3588-uartsnps,dw-apb-uartþ¶æN?³¡+baudclkapb_pclkT. . Ytxrx�¸¹‹defaultmcEokay zserial@feb70000&rockchip,rk3588-uartsnps,dw-apb-uartþ·æO?·¢+baudclkapb_pclkT– – Ytxrx�º‹defaultmc Edisabledserial@feb80000&rockchip,rk3588-uartsnps,dw-apb-uartþ¸æP?»£+baudclkapb_pclkT– – Ytxrx�»‹defaultmc Edisabledserial@feb90000&rockchip,rk3588-uartsnps,dw-apb-uartþ¹æQ?¿¤+baudclkapb_pclkT– –Ytxrx�¼‹defaultmc Edisabledserial@feba0000&rockchip,rk3588-uartsnps,dw-apb-uartþºæR?Ã¥+baudclkapb_pclkTmmYtxrx�½‹defaultmcEokayserial@febb0000&rockchip,rk3588-uartsnps,dw-apb-uartþ»æS?Ǧ+baudclkapb_pclkTm m Ytxrx�¾‹defaultmc Edisabledserial@febc0000&rockchip,rk3588-uartsnps,dw-apb-uartþ¼æT?˧+baudclkapb_pclkTm m Ytxrx�¿‹defaultmc Edisabledpwm@febd0000(rockchip,rk3588-pwmrockchip,rk3328-pwmþ½?LK +pwmpclk�À‹defaultz Edisabledpwm@febd0010(rockchip,rk3588-pwmrockchip,rk3328-pwmþ½?LK +pwmpclk�Á‹defaultz Edisabledpwm@febd0020(rockchip,rk3588-pwmrockchip,rk3328-pwmþ½ ?LK +pwmpclk�‹defaultz Edisabledpwm@febd0030(rockchip,rk3588-pwmrockchip,rk3328-pwmþ½0?LK +pwmpclk�Ëdefaultz Edisabledpwm@febe0000(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¾?ON +pwmpclk�Ä‹defaultz Edisabledpwm@febe0010(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¾?ON +pwmpclk�Å‹defaultz Edisabledpwm@febe0020(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¾ ?ON +pwmpclk�Æ‹defaultz Edisabledpwm@febe0030(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¾0?ON +pwmpclk�Ç‹defaultz Edisabledpwm@febf0000(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¿?RQ +pwmpclk�È‹defaultz Edisabledpwm@febf0010(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¿?RQ +pwmpclk�É‹defaultz Edisabledpwm@febf0020(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¿ ?RQ +pwmpclk�Ê‹defaultz Edisabledpwm@febf0030(rockchip,rk3588-pwmrockchip,rk3328-pwmþ¿0?RQ +pwmpclk�Ë‹defaultz Edisabledthermal-zonespackage-thermal › ± ¿Ìtripspackage-crit ÏÁ8 Û criticalbigcore0-thermal ›d ± ¿Ìtripsbigcore0-alert ÏL ÛÐpassive,Íbigcore0-crit ÏÁ8 Û criticalcooling-mapsmap0 æÍ ëÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿbigcore2-thermal ›d ± ¿Ìtripsbigcore2-alert ÏL ÛÐpassive,Îbigcore2-crit ÏÁ8 Û criticalcooling-mapsmap0 æÎ ëÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿlittlecore-thermal ›d ± ¿Ìtripslittlecore-alert ÏL ÛÐpassive,Ïlittlecore-crit ÏÁ8 Û criticalcooling-mapsmap0 æÏ0 ëÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿcenter-thermal › ± ¿Ìtripscenter-crit ÏÁ8 Û criticalgpu-thermal ›d ± ¿Ìtripsgpu-alert ÏL ÛÐpassive,Ðgpu-crit ÏÁ8 Û criticalcooling-mapsmap0 æÐ ëÑÿÿÿÿÿÿÿÿnpu-thermal › ± ¿Ìtripsnpu-crit ÏÁ8 Û criticaltsadc@fec00000rockchip,rk3588-tsadcþÀæ�?ž�+tsadcapb_pclkFžV„€xVWRtsadc-apbtsadc úÔÀ  (�Ò CÓ‹defaultsleep MEokay,Ìadc@fec10000rockchip,rk3588-saradcþÁæŽ c?‘�+saradcapb_pclkxU Rsaradc-apbEokay uÔ, i2c@fec80000(rockchip,rk3588-i2crockchip,rk3399-i2cþÈ?ˆ€ +i2cpclkæC�Õ‹default+ Edisabledi2c@fec90000(rockchip,rk3588-i2crockchip,rk3399-i2cþÉ?‰� +i2cpclkæD�Ö‹default+Eokayeeprom@54st,24c04atmel,24c04T � Šyi2c@feca0000(rockchip,rk3588-i2crockchip,rk3399-i2cþÊ?Š‚ +i2cpclkæE�׋default+Eokayregulator@42rockchip,rk8602B™¶vdd_cpu_big0_s0ÅÙëdp�ü0-,regulator-state-mem;spi@fecb0000(rockchip,rk3588-spirockchip,rk3066-spiþËæJ?›–+spiclkapb_pclkTm mYtxrx  �ØÙÚ‹default+ Edisabledefuse@fecc0000rockchip,rk3588-otpþÌ ?Œ‹��+otpapb_pclkphyarbx§¦¨ Rotpapbarb+cpu-code@2id@7cpu-leakage@17cpu-leakage@18cpu-leakage@19log-leakage@1agpu-leakage@1bcpu-version@1c •npu-leakage@28(codec-leakage@29)dma-controller@fed10000arm,pl330arm,primecellþÑ@ æZ[ô?p +apb_pclk ,mphy@fed60000rockchip,rk3588-hdptx-phyþÖ ? T+refapb^8x#cde!""RphyapbinitcmnlaneroplllcplltÛ Edisabledphy@fed80000rockchip,rk3588-usbdp-phyþØ^?¡lVÜ+refclkimmortalpclkutmi(x   Rinitcmnlanepcs_apbpma_apb šÝ ­Þ ¾ß Ôà Edisabled,$phy@fee00000rockchip,rk3588-naneng-combphyþà?¨vW +refapbpipeF¨Võá^x<CRphyapb ä+ öá Edisabled,rphy@fee20000rockchip,rk3588-naneng-combphyþâ?ªxW +refapbpipeFªVõá^x>ERphyapb ä+ öâ Edisabled,)sram@ff001000 mmio-sramÿð$ÿð+pinctrlrockchip,rk3588-pinctrl$tã+,ägpio@fd8a0000rockchip,gpio-bankýŠæ?qr  ä v -,¬gpio@fec20000rockchip,gpio-bankþÂæ?st  ä v -,mdot2e-w-disable1-n-hog    )m.2 E-key W_DISABLE1# 3gpio@fec30000rockchip,gpio-bankþÃæ?uv  ä@ v -, gpio@fec40000rockchip,gpio-bankþÄæ?wx  ä` v -gpio@fec50000rockchip,gpio-bankþÅæ?yz  ä€ v -,ømdot2e-w-disable2-n-hog   )m.2 E-key W_DISABLE2# 3pcfg-pull-up <,épcfg-pull-down I,çpcfg-pull-none X,åpcfg-pull-none-drv-level-2 X e,ëpcfg-pull-up-drv-level-1 < e,êpcfg-pull-up-drv-level-2 < e,æpcfg-pull-none-smt X t,èauddsmbt1120can0can1can2cifclk32kcpuddrphych0ddrphych1ddrphych2ddrphych3dp0dp1emmcemmc-bus8€ ‰ææææææææ,|emmc-clk ‰æ,~emmc-cmd ‰æ,}emmc-data-strobe ‰ç,emmc-reset ‰å, eth1fspigmac1gpuhdmii2c0i2c0m2-xfer ‰èè,,i2c1i2c1m4-xfer ‰ è è,Ÿi2c2i2c2m0-xfer ‰ è è, i2c3i2c3m0-xfer ‰ è è,¡i2c4i2c4m0-xfer ‰ è è,¢i2c5i2c5m0-xfer ‰ è è,£i2c6i2c6m4-xfer ‰ è è,Õi2c7i2c7m0-xfer ‰ è è,Öi2c8i2c8m2-xfer ‰ è è,×i2s0i2s0-lrck ‰å,‚i2s0-sclk ‰å,ƒi2s0-sdi0 ‰å,„i2s0-sdi1 ‰å,…i2s0-sdi2 ‰å,†i2s0-sdi3 ‰å,‡i2s0-sdo0 ‰å,ˆi2s0-sdo1 ‰å,‰i2s0-sdo2 ‰å,Ši2s0-sdo3 ‰å,‹i2s1i2s1m0-lrck ‰å,Œi2s1m0-sclk ‰å,�i2s1m0-sdi0 ‰å,Ži2s1m0-sdi1 ‰å,�i2s1m0-sdi2 ‰å,�i2s1m0-sdi3 ‰å,‘i2s1m0-sdo0 ‰ å,’i2s1m0-sdo1 ‰ å,“i2s1m0-sdo2 ‰ å,”i2s1m0-sdo3 ‰ å,•i2s2i2s2m1-lrck ‰å,—i2s2m1-sclk ‰ å,˜i2s2m1-sdi ‰ å,™i2s2m1-sdo ‰ å,ši2s3i2s3-lrck ‰å,›i2s3-sclk ‰å,œi2s3-sdi ‰å,�i2s3-sdo ‰å,žjtaglitcpumcumipinpupcie20x1pcie30phypcie30x1pcie30x2pcie30x4pcie30x4-clkreqn-m0 ‰å,pcie30x4-perstn-m0 ‰å,ópcie30x4-waken-m0 ‰ å,òpdm0pdm1pmicpmic-pinsp ‰éåååååå,­pmupwm0pwm0m0-pins ‰å,0pwm1pwm1m0-pins ‰å,1pwm2pwm2m0-pins ‰å,2pwm3pwm3m0-pins ‰å,3pwm4pwm4m0-pins ‰ å,Àpwm5pwm5m0-pins ‰ å,Ápwm6pwm6m0-pins ‰ å,Âpwm7pwm7m0-pins ‰ å,Ãpwm8pwm8m0-pins ‰ å,Äpwm9pwm9m0-pins ‰ å,Åpwm10pwm10m0-pins ‰ å,Æpwm11pwm11m0-pins ‰ å,Çpwm12pwm12m0-pins ‰ å,Èpwm13pwm13m0-pins ‰ å,Épwm14pwm14m0-pins ‰ å,Êpwm15pwm15m0-pins ‰ å,Ërefclksatasata0sata1sata2sdiosdiom1-pins` ‰åééééé,{sdmmcsdmmc-bus4@ ‰ææææ,vsdmmc-clk ‰æ,xsdmmc-cmd ‰æ,wspdif0spdif1spi0spi0m0-pins0 ‰êêê,¦spi0m0-cs0 ‰ê,¤spi0m0-cs1 ‰ê,¥spi1spi1m1-pins0 ‰êêê,©spi1m1-cs0 ‰ê,§spi1m1-cs1 ‰ê,¨spi2spi2m2-pins0 ‰ê êê,«spi2m2-cs0 ‰ ê,ªspi3spi3m1-pins0 ‰ê êê,µspi3m1-cs0 ‰ê,³spi3m1-cs1 ‰ê,´spi4spi4m0-pins0 ‰êêê,Úspi4m0-cs0 ‰ê,Øspi4m0-cs1 ‰ê,Ùtsadctsadc-shut-org ‰å,Òuart0uart0m0-xfer ‰éé,/uart1uart1m1-xfer ‰ é é,¶uart2uart2m0-xfer ‰ é é,·uart3uart3m2-xfer ‰ é é,¸uart3-rtsn ‰ å,¹uart4uart4m1-xfer ‰ é é,ºuart5uart5m1-xfer ‰ é é,»uart6uart6m1-xfer ‰ é é,¼uart7uart7m0-xfer ‰ é é,½uart8uart8m1-xfer ‰ é é,¾uart9uart9m1-xfer ‰ é é,¿vopbt656gpio-functsadc-gpio-func ‰å,Óeth0eth0-pins ‰å,gmac0gmac0-miim ‰åå,þgmac0-rx-bus20 ‰ååå,ÿgmac0-tx-bus20 ‰ååå,gmac0-rgmii-clk ‰å å,gmac0-rgmii-bus@ ‰åå å å,etherneteth-reset ‰å,ledsled1-pin ‰å, usb@fc400000rockchip,rk3588-dwc3snps,dwc3ü@@æÝ?—–•+ref_clksuspend_clkbus_clkXotg `ìíeusb2-phyusb3-phy outmi_wide7 xSÇè  Edisabledsyscon@fd5b8000%rockchip,rk3588-pcie3-phy-grfsysconý[€, syscon@fd5c0000$rockchip,rk3588-pipe-phy-grfsysconý\,syscon@fd5cc000$rockchip,rk3588-usbdpphy-grfsysconý\À@,syscon@fd5d4000.rockchip,rk3588-usb2phy-grfsysconsimple-mfdý]@@+,usb2phy@4000rockchip,rk3588-usb2phy@Ì? +phyclk usb480m_phy1æŠxnRphyapb Edisabled,otg-port^ Edisabled,ìi2s@fddc8000rockchip,rk3588-i2s-tdmýÜ€æ¼?ññî+mclk_txmclk_rxhclkFïàTmYtx7 xºRtx-m÷ Edisabledi2s@fddf4000rockchip,rk3588-i2s-tdmýß@æº?99?+mclk_txmclk_rxhclkF6àTmYtx7 xÚRtx-m÷ Edisabledi2s@fddf8000rockchip,rk3588-i2s-tdmý߀æ»?++'+mclk_txmclk_rxhclkF(àTmYrx7 xÇRrx-m÷ Edisabledi2s@fde00000rockchip,rk3588-i2s-tdmýàæ¾?&&"+mclk_txmclk_rxhclkF#àTmYrx7 xîRrx-m÷ Edisabledpcie@fe150000*rockchip,rk3588-pcierockchip,rk3568-pcie+4?@E;JOtî-+aclk_mstaclk_slvaclk_dbipclkauxpiperefpciPæsyspmcmsglegacyerr#`6ïïïïDUdðl`ñ epcie-phy7 "T$ððð ð à@ @0 @@þð§dbiapbconfigx&+ RpwrpipeEokay‹default�òó —¬ £ôlegacy-interrupt-controllerv æ,ïpcie-ep@fe150000rockchip,rk3588-pcie-epP @ @þ @ @0§dbidbi2apbaddr_spaceatu0?@E;JOt)+aclk_mstaclk_slvaclk_dbipclkauxpipe�æ +syspmcmsglegacyerrdma0dma1dma2dma3Ul`ñ epcie-phy7 "x&+ Rpwrpipe Edisabledpcie@fe160000*rockchip,rk3588-pcierockchip,rk3568-pcie+0?AF<KPu)+aclk_mstaclk_slvaclk_dbipclkauxpipepciPæÿþsyspmcmsglegacyerr#`6õõõõDUdðl`ñ epcie-phy7 "T$ñññ ñ à@ @@0 @@@þñ§dbiapbconfigx', Rpwrpipe Edisabledlegacy-interrupt-controllerv æÿ,õpcie@fe170000*rockchip,rk3588-pcierockchip,rk3568-pcie /0?BG=LQ¯)+aclk_mstaclk_slvaclk_dbipclkauxpipepciPæóòñðïsyspmcmsglegacyerr#`6ööööDUd p l`÷ epcie-phy7 "T$òòò ò à@ €@0 @€@þò§dbiapbconfigx(- Rpwrpipe+Eokay —ø  £ôlegacy-interrupt-controllerv æð,öethernet@fe1b0000&rockchip,rk3588-gmacsnps,dwmac-4.20aþ æãâmacirqeth_wake_irq(?67X]40+stmmacethclk_mac_refpclk_macaclk_macptp_ref7 !x# Rstmmacethti‹+œù¬½úÐûãEokay ³output Àü Ërgmiiiý‹default�þÿ Ô Ý æø ö '† mdiosnps,dwmac-mdio+ethernet-phy@6ethernet-phy-ieee802.3-c22?ù,üstmmac-axi-configìö,ùrx-queues-config,úqueue0queue1tx-queues-config,,ûqueue0queue1sata@fe220000'rockchip,rk3588-dwc-ahcisnps,dwc-ahciþ"æ(?c`fUp+satapmaliverxoobrefasicB+ Edisabledsata-port@0T@`÷ esata-phya p phy@fed90000rockchip,rk3588-usbdp-phyþÙ^?¡mW+refclkimmortalpclkutmi(xRinitcmnlanepcs_apbpma_apb š ­Þ ¾ Ôà Edisabled,íphy@fee10000rockchip,rk3588-naneng-combphyþá?©wW +refapbpipeF©Võá^x=DRphyapb ä+ öEokay,÷phy@fee80000rockchip,rk3588-pcie3-phyþè^?y+pclkxHRphy ä+ ! Eokay,ñopp-table-cluster0operating-points-v2 2, opp-1008000000 =<Ü D L¸ L¸~ð Rœ@opp-1200000000 =G†Œ D ß4 ß4~ð Rœ@opp-1416000000 =Tfr D ¢„ ¢„~ð Rœ@ copp-1608000000 =_Ø" D øP øP~ð Rœ@opp-1800000000 =kIÒ D~ð~ð~ð Rœ@opp-table-cluster1operating-points-v2 2,opp-1200000000 =G†Œ D L¸ L¸B@ Rœ@opp-1416000000 =Tfr D  B@ Rœ@opp-1608000000 =_Ø" D ¢„ ¢„B@ Rœ@opp-1800000000 =kIÒ D øP øPB@ Rœ@opp-2016000000 =x)¸ DHHB@ Rœ@opp-2208000000 =ƒ›h DllB@ Rœ@opp-2400000000 =�  DB@B@B@ Rœ@opp-table-cluster2operating-points-v2 2,opp-1200000000 =G†Œ D L¸ L¸B@ Rœ@opp-1416000000 =Tfr D  B@ Rœ@opp-1608000000 =_Ø" D ¢„ ¢„B@ Rœ@opp-1800000000 =kIÒ D øP øPB@ Rœ@opp-2016000000 =x)¸ DHHB@ Rœ@opp-2208000000 =ƒ›h DllB@ Rœ@opp-2400000000 =�  DB@B@B@ Rœ@opp-tableoperating-points-v2,!opp-300000000 =ᣠD L¸ L¸ øPopp-400000000 =ׄ D L¸ L¸ øPopp-500000000 =Íe D L¸ L¸ øPopp-600000000 =#ÃF D L¸ L¸ øPopp-700000000 =)¹' D ®` ®` øPopp-800000000 =/¯ D q° q° øPopp-900000000 =5¤é D 5 5 øPopp-1000000000 =;šÊ D øP øP øPadc-keys adc-keys o  {buttons Œw@ ¦dbutton-bios-disable ´BIOS_DISABLE ºh Åchosen ßserial2:115200n8dc-12v-regulatorregulator-fixed¶dc_12vÅÙë··,emmc-pwrseqmmc-pwrseq-emmc� ‹default — ,€leds gpio-leds‹default� led-1  !heartbeat ëheartbeatpcie-refclk-gen-clock fixed-clockÌñõá,pcie-refclk-clockgpio-gate-clock?Ì ¬‹default�,îpps pps-gpio ¬vcc-1v1-nldo-s3-regulatorregulator-fixed¶vcc_1v1_nldo_s3ÅÙëÈàÈà0-,²vcc-1v2-s3-regulatorregulator-fixed ¶vcc_1v2_s3ÅÙëO€O€0-,ývcc-2v8-s3-regulatorregulator-fixed ¶vcc_2v8_s3ÅÙë*¹€*¹€0yvcc-5v0-usb-a-regulatorregulator-fixed ¶usb_a_vccëLK@LK@0- ñ ,*vcc-5v0-usb-c1-regulatorregulator-fixed ¶5v_usbc1ëLK@LK@0 ñø vcc-5v0-usb-c2-regulatorregulator-fixed ¶5v_usbc2ëLK@LK@0 ñøvcc3v3-mdot2-regulatorregulator-fixed ¶vcc3v3_mdot2ÅÙë2Z 2Z 0,ôvcc5v0-sys-regulatorregulator-fixed ¶vcc5v0_sysÅÙëLK@LK@0,-vcc5v0-usb-regulatorregulator-fixed ¶vcc5v0_usbÅÙëLK@LK@0-, compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3spi4ethernet0mmc0mmc1rtc0cpudevice_typeregenable-methodcapacity-dmips-mhzclocksassigned-clocksassigned-clock-ratescpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachedynamic-power-coefficient#cooling-cellsoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedportsarm,smc-idshmem#clock-cells#reset-cellsinterruptsclock-frequencyclock-output-namesinterrupt-namesrangesclock-namespower-domainsstatusmali-supplydr_modephysphy-namesphy_typeresetssnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,dis-u2-freeclk-exists-quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirksnps,dis_rxdet_inp3_quirk#iommu-cellsreset-names#phy-cellsphy-supplyrockchip,grfpinctrl-0pinctrl-namesfcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspenddmasdma-namesreg-shiftreg-io-width#pwm-cells#power-domain-cellspm_qosiommusreg-namesrockchip,vop-grfrockchip,vo1-grfrockchip,pmuassigned-clock-parents#sound-dai-cellsbus-range#interrupt-cellsinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapnum-lanesinterrupt-controllerrockchip,php-grfsnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,wr_osr_lmtsnps,rd_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useports-implementedhba-port-capsnps,rx-ts-maxsnps,tx-ts-maxfifo-depthmax-frequencybroken-cdbus-widthcap-sd-highspeeddisable-wpsd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-ddr50sd-uhs-sdr104vmmc-supplyvqmmc-supplycap-mmc-highspeedmmc-ddr-1_8vmmc-hs200-1_8vmmc-hs400-1_8vmmc-hs400-enhanced-strobemmc-pwrseqno-sdiono-sdnon-removablerockchip,trcm-sync-tx-onlymbi-aliasmbi-rangesmsi-controller#msi-cellsaffinityarm,pl330-periph-burst#dma-cellsnum-csgpio-controller#gpio-cellsspi-max-frequencysystem-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvcc13-supplyvcc14-supplyvcca-supplypinsfunctionregulator-enable-ramp-delayregulator-suspend-microvoltregulator-on-in-suspendlinux,rs485-enabled-at-boot-timepolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polaritypinctrl-1#thermal-sensor-cells#io-channel-cellsvref-supplypagesizevcc-supplybitsrockchip,u2phy-grfrockchip,usb-grfrockchip,usbdpphy-grfrockchip,vo-grfrockchip,pipe-grfrockchip,pipe-phy-grfgpio-rangesgpiosoutput-lowline-namegpio-hogbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsreset-gpiosvpcie3v3-supplyclock_in_outphy-handlephy-modetx_delayrx_delaysnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-usrockchip,phy-grfopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallabellinux,codepress-threshold-microvoltstdout-pathlinux,default-triggercolorenable-gpiosenable-active-high