;86t(6<8Microchip PolarFire-SoC Icicle Kit (Production Silicon)!microchip,mpfs-icicle-prod-reference-rtl-v2507microchip,mpfs-icicle-kit-prodmicrochip,mpfs-icicle-kitmicrochip,mpfs-prodmicrochip,mpfscpus,B@cpu@0 !sifive,e51sifive,rocket0riscv?cpuK@^k@x |rv64imacrv64i$imaczicntrzicsrzifenceizihpm disabledinterrupt-controller!riscv,cpu-intc cpu@1#!sifive,u54-mcsifive,rocket0riscv@@ ?cpuK@^@k)4  ?riscv,sv39x |rv64imafdcrv64i(imafdczicntrzicsrzifenceizihpmHRokayinterrupt-controller!riscv,cpu-intc cpu@2#!sifive,u54-mcsifive,rocket0riscv@@ ?cpuK@^@k)4  ?riscv,sv39x |rv64imafdcrv64i(imafdczicntrzicsrzifenceizihpmHRokayinterrupt-controller!riscv,cpu-intc cpu@3#!sifive,u54-mcsifive,rocket0riscv@@ ?cpuK@^@k)4  ?riscv,sv39x |rv64imafdcrv64i(imafdczicntrzicsrzifenceizihpmHRokayinterrupt-controller!riscv,cpu-intccpu@4#!sifive,u54-mcsifive,rocket0riscv@@ ?cpuK@^@k)4  ?riscv,sv39x |rv64imafdcrv64i(imafdczicntrzicsrzifenceizihpmHRokayinterrupt-controller!riscv,cpu-intccpu-mapcluster0core0ccore1ccore2ccore3ccore4cmssrefclk !fixed-clockgtsY@syscontroller!microchip,mpfs-sys-controllerokay mssclkclk !fixed-clockgtĴsoc !simple-buscache-controller@20100005!microchip,mpfs-ccachesifive,fu540-c000-ccachecachexM@`m  clint@2000000&!sifive,fu540-c000-clintsifive,clint0xP      interrupt-controller@c000000)!sifive,fu540-c000-plicsifive,plic-1.0.0x H      dma-controller@3000000!!microchip,mpfs-pdmasifive,pdma0x   syscon@200020000!microchip,mpfs-mss-top-sysregsysconsimple-mfdx syscon@20003000!!microchip,mpfs-sysreg-scbsysconx 0clock-controller@38010000!microchip,mpfs-ccc@x8899g disabledclock-controller@38040000!microchip,mpfs-ccc@x8899g disabledclock-controller@38100000!microchip,mpfs-ccc@x88 99 gokay:&pll0_ref0pll0_ref1pll1_ref0pll1_ref1dll0_refdll1_refclock-controller@38400000!microchip,mpfs-ccc@x8@89@9g disabledserial@20000000 !ns16550ax 2? ZI disabledserial@20100000 !ns16550ax 2? [I okayserial@20102000 !ns16550ax  2? \I okayserial@20104000 !ns16550ax @2? ]I okayserial@20106000 !ns16550ax `2? ^ Iokaymmc@20008000 !microchip,mpfs-sd4hccdns,sd4hcx  XW okayeozspi@20108000!microchip,mpfs-spix  6 okayspi@20109000!microchip,mpfs-spix  7okayspi@21000000.!microchip,mpfs-qspimicrochip,coreqspi-rtl-v2x! Uokayi2c@2010a000,!microchip,mpfs-i2cmicrochip,corei2c-rtl-v7x  :tokayi2c@2010b000,!microchip,mpfs-i2cmicrochip,corei2c-rtl-v7x  =tokaypower-monitor@10!microchip,pac1934xchannel@1x'VDDREGchannel@2x'VDDA25channel@3x'VDD25channel@4x' VDDA_REGcan@2010c000!microchip,mpfs-canx % 8 disabledcan@2010d000!microchip,mpfs-canx % 9 disabledethernet@20110000!microchip,mpfs-macbcdns,macbx   @ABCDE &pclkhclkokay'sgmii0ethernet@20112000!microchip,mpfs-macbcdns,macbx   FGHIJK &pclkhclkokay'sgmii0ethernet-phy@9x ethernet-phy@8xgpio@20120000!microchip,mpfs-gpiox  ;K disabledgpio@20121000!microchip,mpfs-gpiox  ;K disabledgpio@20122000!microchip,mpfs-gpiox   ;Kokay55555555555555555555555555555555rtc@20124000!microchip,mpfs-rtcx @ PQ! &rtcrtcrefokayusb@20201000!microchip,mpfs-musbx  VWWdmamcokayghostsyscon@37020000"!microchip,mpfs-control-scbsysconx7mailbox@37020800!microchip,mpfs-mailboxx7 `ookayspi@37020100.!microchip,mpfs-qspimicrochip,coreqspi-rtl-v2x7 nokayflash@0!jedec,spi-nor{1-x clkcfg@3e001000!microchip,mpfs-clkcfgx>gpwm@40000000!microchip,corepwm-rtl-v4x@okayi2c@40000200!microchip,corei2c-rtl-v7x@ ztokaymailbox!microchip,sbi-ipc Whart-1hart-2hart-3hart-4ookaymailbox@50000000!microchip,miv-ihc-rtl-v2xP Whart-1hart-2hart-3hart-4o disabledpcie@3000000000!microchip,pcie-host-1.0?pci0x0C C cfgbridgectrl w` &fic1fic30%0okayinterrupt-controllerclock-cccref !fixed-clockgtaliases?/soc/ethernet@20112000I/soc/serial@20000000Q/soc/serial@20100000Y/soc/serial@20102000a/soc/serial@20104000i/soc/serial@20106000chosenqserial1:115200n8leds !gpio-ledsled-1 }led1led-2 }led2led-3 }led3led-4 }led4memory@80000000?memoryx@memory@1040000000?memoryx@@reserved-memoryregion@bfc00000x@ #address-cells#size-cellsmodelcompatibletimebase-frequencydevice_typei-cache-block-sizei-cache-setsi-cache-sizeregriscv,isariscv,isa-baseriscv,isa-extensionsclocksstatusphandle#interrupt-cellsinterrupt-controllerd-cache-block-sized-cache-setsd-cache-sized-tlb-setsd-tlb-sizei-tlb-setsi-tlb-sizemmu-typetlb-splitnext-level-cachecpu#clock-cellsclock-frequencymboxesmicrochip,bitstream-flashrangescache-levelcache-unifiedinterrupt-parentinterruptsinterrupts-extendedriscv,ndevdma-channels#dma-cells#reset-cellsclock-namesreg-io-widthreg-shiftcurrent-speedmax-frequencybus-widthdisable-wpcap-sd-highspeedcap-mmc-highspeedmmc-ddr-1_8vmmc-hs200-1_8vsd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104shunt-resistor-micro-ohmslabelresetslocal-mac-addressphy-modephy-handlegpio-controller#gpio-cellsinterrupt-namesdr_mode#mbox-cellsspi-max-frequencyspi-rx-bus-widthmicrochip,sync-update-mask#pwm-cellsmicrochip,ihc-chan-disabled-maskreg-namesbus-rangeinterrupt-mapinterrupt-map-maskdma-rangesmsi-parentmsi-controllerethernet0serial0serial1serial2serial3serial4stdout-pathgpioscolorno-map