Ð þí,;8'„(·'Lmilkv,duosophgo,cv1800b &Milk-V Duocpus,}x@cpu@0thead,c906riscv?cpuKO@bo|@�€œ€ ©riscv,sv39 ²rv64imafdc¼rv64i(Ëimafdczicntrzicsrzifenceizihpminterrupt-controllerriscv,cpu-intcàõoscillator fixed-clockosc_25m!.}x@ soc simple-bus>EVsyscon@3000000,sophgo,cv1800b-top-sysconsysconsimple-mfdKphy@48sophgo,cv1800b-usb2-phyKHfq]^_ xappstblpm„: dma-router@154sophgo,cv1800b-dmamuxKT˜‹–reset-controller@3003000sophgo,cv1800b-resetK0¢mdio-mux@3009800mdio-mux-mmioregmdio-muxK˜¯¿€ Èdisabledmdio@0Kphy@0ethernet-phy-ieee802.3-c22Kmdio@80K€gpio@3020000snps,dw-apb-gpioK„,gpio-controller@0snps,dw-apb-gpio-portÏßë Kàõò<gpio@3021000snps,dw-apb-gpioK„-gpio-controller@0snps,dw-apb-gpio-portÏßë Kàõò=gpio@3022000snps,dw-apb-gpioK „.gpio-controller@0snps,dw-apb-gpio-portÏßë Kàõò>gpio@3023000snps,dw-apb-gpioK0„Kgpio-controller@0snps,dw-apb-gpio-portÏßë Kàõò?adc@30f0000sophgo,cv1800b-saradcKqòd Èdisabledchannel@0Kchannel@1Kchannel@2Ki2c@4000000snps,designware-i2cKq35 xrefpclkò1„ Èdisabledi2c@4010000snps,designware-i2cKq36 xrefpclkò2„ Èdisabledi2c@4020000snps,designware-i2cKq37 xrefpclkò3„ Èdisabledi2c@4030000snps,designware-i2cKq38 xrefpclkò4„ Èdisabledi2c@4040000snps,designware-i2cKq39 xrefpclkò5„ Èdisabledethernet@4070000&sophgo,cv1800b-dwmacsnps,dwmac-3.70aKq#"xstmmacethptp_refòýmacirq  internal„  !stmmaceth- ; Id€‰”Ÿ²Å  Èdisabledmdiosnps,dwmac-mdiorx-queues-configÕqueue0tx-queues-configëqueue0stmmac-axi-config  serial@4140000snps,dw-apb-uartKò,qMNxbaudclkapb_pclk+5„ÈokayB Ldefaultserial@4150000snps,dw-apb-uartKò-qOPxbaudclkapb_pclk+5„ Èdisabledserial@4160000snps,dw-apb-uartKò.qQRxbaudclkapb_pclk+5„ Èdisabledserial@4170000snps,dw-apb-uartKò/qSTxbaudclkapb_pclk+5„ Èdisabledspi@4180000snps,dw-apb-ssiKq=> xssi_clkpclkò6„( Èdisabledspi@4190000snps,dw-apb-ssiKq=? xssi_clkpclkò7„) Èdisabledspi@41a0000snps,dw-apb-ssiKq=@ xssi_clkpclkò8„* Èdisabledspi@41b0000snps,dw-apb-ssiKq=A xssi_clkpclkò9„+ Èdisabledserial@41c0000snps,dw-apb-uartKò0qUVxbaudclkapb_pclk+5„J Èdisabledmmc@4310000sophgo,cv1800b-dwcmshcK1ò$q xcorebusÈokayB LdefaultZdmt|mmc@4320000sophgo,cv1800b-dwcmshcK2ò&q xcorebus Èdisableddma-controller@4330000snps,axi-dma-1.01aK3òq..xcore-clkcfgr-clk‹‡ ” ¤²Ã Èdisabledusb@4340000sophgo,cv1800b-usbK4q[\ xotgutmiÓ å ô€€@@@@ ò  usb2-phy„ !dwc2Èokayhostrtc@5025000sophgo,cv1800b-rtcsysconKP òýalarmlongpressvbatqxrtcmcupinctrl@3001000sophgo,cv1800b-pinctrlKpsysrtcuart0-cfg uart0-pins$ÿÿ+8*0P äsdhci0-cfg sdhci0-clk-pins$ÿ+8>äP äsdhci0-cmd-pins$ÿ+8*0P äsdhci0-data-pins$ÿÿÿÿ +8*0P äsdhci0-cd-pins$ÿ +8*0P äclock-controller@3002000sophgo,cv1800b-clkK q !interrupt-controller@70000000$sophgo,cv1800b-plicthead,c900-plicKp]  àõqetimer@74000000&sophgo,cv1800b-clintthead,c900-clintKt]memory@80000000?memoryK€aliases|/soc/serial@4140000„/soc/serial@4150000Œ/soc/serial@4160000”/soc/serial@4170000œ/soc/serial@41c0000chosen¤serial0:115200n8reserved-memory>region@83f40000Kƒô ° #address-cells#size-cellscompatiblemodeltimebase-frequencydevice_typeregd-cache-block-sized-cache-setsd-cache-sizei-cache-block-sizei-cache-setsi-cache-sizemmu-typeriscv,isariscv,isa-baseriscv,isa-extensionsinterrupt-controller#interrupt-cellsphandleclock-output-names#clock-cellsclock-frequencyrangesinterrupt-parentdma-noncoherent#phy-cellsclocksclock-namesresets#dma-cellsdma-masters#reset-cellsmdio-parent-busmux-maskstatusgpio-controller#gpio-cellsngpiosinterruptsinterrupt-namesphy-handlephy-modereset-namesrx-fifo-depthtx-fifo-depthsnps,multicast-filter-binssnps,perfect-filter-entriessnps,aalsnps,txpblsnps,rxpblsnps,mtl-rx-configsnps,mtl-tx-configsnps,axi-configsnps,rx-queues-to-usesnps,tx-queues-to-usesnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtreg-shiftreg-io-widthpinctrl-0pinctrl-namesbus-widthno-1-8-vno-mmcno-sdiodisable-wpdma-channelssnps,block-sizesnps,prioritysnps,dma-masterssnps,data-widthg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephysphy-namesdr_modereg-namespinmuxbias-pull-updrive-strength-microamppower-sourceinterrupts-extendedriscv,ndevserial0serial1serial2serial3serial4stdout-pathno-map