Ð þíGä8B$(ÀAì"beagle,beaglev-aheadthead,th1520 &BeagleV Aheadcpus ,-ÆÀcpu@0thead,c910riscv?cpu Krv64imafdcUrv64iAdimafdcziccrsezicntrzicsrzifenceizihpmzfhxtheadvectory…‰@œ©¶@ÉÖã ôriscv,sv39interrupt-controllerriscv,cpu-intcý#cpu@1thead,c910riscv?cpu Krv64imafdcUrv64iAdimafdcziccrsezicntrzicsrzifenceizihpmzfhxtheadvectory…‰@œ©¶@ÉÖã ôriscv,sv39interrupt-controllerriscv,cpu-intcý#cpu@2thead,c910riscv?cpu Krv64imafdcUrv64iAdimafdcziccrsezicntrzicsrzifenceizihpmzfhxtheadvectory…‰@œ©¶@ÉÖã ôriscv,sv39interrupt-controllerriscv,cpu-intcý#cpu@3thead,c910riscv?cpu Krv64imafdcUrv64iAdimafdcziccrsezicntrzicsrzifenceizihpmzfhxtheadvectory…‰@œ©¶@ÉÖã ôriscv,sv39interrupt-controllerriscv,cpu-intcý#l2-cachecache‹@+ž«7#pmu riscv,pmuÀEÿøÿøÿøÿøÿøÿø ÿø ÿøÿøÿøÿøÿøÿøÿøÿøÿøÀa   Hzÿÿÿÿÿÿÿÿÿøÿÿÿÿÿÿÿÿÿøÿÿÿÿÿÿÿÿÿøÿÿÿÿÿÿÿÿÿøÿÿÿÿÿÿÿÿÿøÿÿÿÿÿÿÿÿÿøÿÿÿÿÿÿÿÿÿøÿÿÿÿÿÿÿÿÿø ÿÿÿÿÿÿÿÿÿø ÿÿÿÿÿÿÿÿÿø ÿÿÿÿÿÿÿÿÿø ÿÿÿÿÿÿÿÿÿø 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“disabledmdiosnps,dwmac-mdio ethernet@ffe7070000#thead,th1520-gmacsnps,dwmac-3.70a …ÿç ÿì0 Õdwmacapb�BßmacirqŒ 0 2 šstmmacethpclkapbï ø @$ @ “okay½defaultË P  [rgmii-idmdiosnps,dwmac-mdio ethernet-phy@1…-� dp'ÃP# mmc@ffe7080000thead,th1520-dwcmshc…ÿç�>Œ +šcore“okay“� Í=€«ºÈÐmmc@ffe7090000thead,th1520-dwcmshc…ÿç �@Œ +šcore“okay“� Í=€mmc@ffe70a0000thead,th1520-dwcmshc…ÿç �GŒ +šcore “disabledserial@ffe7f00000snps,dw-apb-uart…ÿçð�%Œ U 8šbaudclkapb_pclk¦° “disabledserial@ffe7f04000snps,dw-apb-uart…ÿçð@�'Œ U :šbaudclkapb_pclk¦° “disabledgpio@ffe7f34000snps,dw-apb-gpio…ÿçó@ Œ ?šbusgpio-controller@0snps,dw-apb-gpio-portÖæò ù …ý�:gpio@ffe7f38000snps,dw-apb-gpio…ÿçó€ Œ 1šbusgpio-controller@0snps,dw-apb-gpio-portÖæòù …ý�;#pinctrl@ffe7f3c000thead,th1520-pinctrl…ÿçóÀŒ -#gpio@ffec005000snps,dw-apb-gpio…ÿìP Œ =šbusgpio-controller@0snps,dw-apb-gpio-portÖæò ù …ý�8gpio@ffec006000snps,dw-apb-gpio…ÿì` Œ >šbusgpio-controller@0snps,dw-apb-gpio-portÖæòù …ý�9pinctrl@ffec007000thead,th1520-pinctrl…ÿìpŒ /#gmac0-0# tx-pinsDGMAC0_TX_CLKGMAC0_TXENGMAC0_TXD0GMAC0_TXD1GMAC0_TXD2GMAC0_TXD3gmac0#0?Mcrx-pinsDGMAC0_RX_CLKGMAC0_RXDVGMAC0_RXD0GMAC0_RXD1GMAC0_RXD2GMAC0_RXD3gmac0#0mMcmdc-pins GMAC0_MDCgmac0#0 ?Mcmdio-pins GMAC0_MDIOgmac0#0 mzcphy-reset-pins GMAC0_COL#0?Mcphy-interrupt-pins GMAC0_CRSgpio�0mzcuart0-0# tx-pins UART0_TXDuart#0?Mcrx-pins UART0_RXDuart�0mzcserial@ffec010000snps,dw-apb-uart…ÿì@�&Œ U 9šbaudclkapb_pclk¦° “disabledpwm@ffec01c000thead,th1520-pwm…ÿìÀ@Œ 3œreset-controller@ffec02c000thead,th1520-reset-misc…ÿìÀtreset-controller@ffecc30000thead,th1520-reset-vp…ÿìÃtclock-controller@ffef010000thead,th1520-clk-ap…ÿ# reset-controller@ffef014000thead,th1520-reset-ap…ÿï@treset-controller@ffef040028thead,th1520-reset-dsp…ÿï(tgpu@ffef4000000thead,th1520-gpuimg,img-bxm-4-64img,img-rogue…ÿï@-�fŒ šcorememsys§reset-controller@ffef528000thead,th1520-reset…ÿïR€Ot#clock-controller@ffef528050thead,th1520-clk-vo…ÿïR€P°Œ ­#dma-controller@ffefc00000snps,axi-dma-1.01a…ÿïÀ�Œ  šcore-clkcfgr-clkµÀÍÝëü “okaytimer@ffefc32000snps,dw-apb-timer…ÿïà Œ štimer� “disabledtimer@ffefc32014snps,dw-apb-timer…ÿïà Œ štimer� “disabledtimer@ffefc32028snps,dw-apb-timer…ÿïà (Œ štimer� “disabledtimer@ffefc3203csnps,dw-apb-timer…ÿïà <Œ štimer� “disabledserial@fff7f08000snps,dw-apb-uart…ÿ÷ð€@�(Œ U ;šbaudclkapb_pclk¦° “disabledserial@fff7f0c000snps,dw-apb-uart…ÿ÷ðÀ@�)Œ U <šbaudclkapb_pclk¦° “disabledtimer@ffffc33000snps,dw-apb-timer…ÿÿÃ0Œ štimer� “disabledtimer@ffffc33014snps,dw-apb-timer…ÿÿÃ0Œ štimer� “disabledtimer@ffffc33028snps,dw-apb-timer…ÿÿÃ0(Œ štimer� “disabledtimer@ffffc3303csnps,dw-apb-timer…ÿÿÃ0<Œ štimer� “disabledmailbox@ffffc38000thead,th1520-mbox@…ÿÿÀ`ÿÿÄ`ÿÿÄÀ ÿÿÅ@ *Õlocalremote-icu0remote-icu1remote-icu2 Œ H I J K:šclk-localclk-remote-icu0clk-remote-icu1clk-remote-icu2-�##gpio@fffff41000snps,dw-apb-gpio…ÿÿô gpio-controller@0snps,dw-apb-gpio-portÖæòù …ý�Lreset-controller@fffff44000thead,th1520-reset-ao…ÿÿô@ t “reservedpinctrl@fffff4a000thead,th1520-pinctrl…ÿÿô  Œ#led-0#led-pins5AUDIO_PA8AUDIO_PA9AUDIO_PA10AUDIO_PA11AUDIO_PA12#0?Mcpvt@fffff4e000moortec,mr75203@…ÿÿôà€ÿÿôà€ÿÿôကÿÿôèÕcommontspdvmŒ/gpio@fffff52000snps,dw-apb-gpio…ÿÿõ  gpio-controller@0snps,dw-apb-gpio-portÖæò ù…ý�7#aliasesE/soc/ethernet@ffe7070000'O/soc/gpio@ffec005000/gpio-controller@0'U/soc/gpio@ffec006000/gpio-controller@0'[/soc/gpio@ffe7f34000/gpio-controller@0'a/soc/gpio@ffe7f38000/gpio-controller@0'g/soc/gpio@fffff52000/gpio-controller@0'm/soc/gpio@fffff41000/gpio-controller@0s/soc/serial@ffe7014000{/soc/serial@ffe7f00000ƒ/soc/serial@ffec010000‹/soc/serial@ffe7f04000“/soc/serial@fff7f08000›/soc/serial@fff7f0c000£/soc/spi@ffe700c000chosen¨serial0:115200n8memory@0?memory…leds½defaultË gpio-ledsled-1 j´ºled1led-2 j ´ºled2led-3 j ´ºled3led-4 j ´ºled4led-5 j ´ºled5 compatible#address-cells#size-cellsmodeltimebase-frequencydevice_typeriscv,isariscv,isa-baseriscv,isa-extensionsthead,vlenbregi-cache-block-sizei-cache-sizei-cache-setsd-cache-block-sized-cache-sized-cache-setsnext-level-cachemmu-typeinterrupt-controller#interrupt-cellsphandlecache-levelcache-unifiedriscv,event-to-mhpmcountersriscv,event-to-mhpmeventriscv,raw-event-to-mhpmcountersclock-output-names#clock-cellsclock-frequencysnps,wr_osr_lmtsnps,rd_osr_lmtsnps,blenmboxesmbox-namesresetsreset-names#power-domain-cellsinterrupt-parentdma-noncoherentrangesinterrupts-extendedriscv,ndev#reset-cellsinterruptsclocksstatusclock-namesreg-shiftreg-io-widthpinctrl-namespinctrl-0reg-namesinterrupt-namessnps,pblsnps,fixed-burstsnps,multicast-filter-binssnps,perfect-filter-entriessnps,axi-configphy-handlephy-modereset-gpiosreset-delay-usreset-post-delay-usbus-widthmax-frequencymmc-hs400-1_8vnon-removableno-sdiono-sdgpio-controller#gpio-cellsngpiosgpio-rangesthead,pad-grouppinsfunctionbias-disabledrive-strengthinput-disableinput-schmitt-disableslew-rateinput-enableinput-schmitt-enablebias-pull-up#pwm-cellspower-domains#dma-cellsdma-channelssnps,block-sizesnps,prioritysnps,dma-masterssnps,data-widthsnps,axi-max-burst-len#mbox-cells#thermal-sensor-cellsethernet0gpio0gpio1gpio2gpio3gpio4gpio5serial0serial1serial2serial3serial4serial5spi0stdout-pathcolorlabel