Ð þ퀯8v( —uàAstarfive,visionfive-2-lite-emmcstarfive,jh7110sstarfive,jh7110  &StarFive VisionFive 2 Lite eMMCcpus ,= cpu@0sifive,s7riscv?CcpuO@b@o@|�rv64imac_zba_zbb—rv64i,¦imaczbazbbzicntrzicsrzifenceizihpm »disabledÂinterrupt-controllerriscv,cpu-intcÊÙî cpu@1sifive,u74-mcriscv?ÿ@@€,7(CcpuO@b@o€BM( Xriscv,sv39|�rv64imafdc_zba_zbb—rv64i0¦imafdczbazbbzicntrzicsrzifenceizihpmak†cpu’¡Âinterrupt-controllerriscv,cpu-intcÊÙîÂcpu@2sifive,u74-mcriscv?ÿ@@€,7(CcpuO@b@o€BM( Xriscv,sv39|�rv64imafdc_zba_zbb—rv64i0¦imafdczbazbbzicntrzicsrzifenceizihpmak†cpu’¡Âinterrupt-controllerriscv,cpu-intcÊÙîÂcpu@3sifive,u74-mcriscv?ÿ@@€,7(CcpuO@b@o€BM( Xriscv,sv39|�rv64imafdc_zba_zbb—rv64i0¦imafdczbazbbzicntrzicsrzifenceizihpmak†cpu’¡Âinterrupt-controllerriscv,cpu-intcÊÙîÂcpu@4sifive,u74-mcriscv?ÿ@@€,7(CcpuO@b@o€BM( Xriscv,sv39|�rv64imafdc_zba_zbb—rv64i0¦imafdczbazbbzicntrzicsrzifenceizihpmak†cpu’¡ interrupt-controllerriscv,cpu-intcÊÙîÂcpu-mapcluster0core0¬core1¬core2¬core3¬core4¬ opp-table-0operating-points-v2°Âopp-312500000» _  5opp-417000000»Úê@ 5opp-625000000»%@¾@ 5opp-1250000000»J�|€ÂB@thermal-zonescpu-thermalÐúæ:˜ô cooling-mapsmap0 0 ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿtripscpu-alert0L$ÐJpassive cpu-crit† $Ð Jcriticaldvp-clock fixed-clock/dvp_clkBOl÷Â;gmac0-rgmii-rxin-clock fixed-clock/gmac0_rgmii_rxinBOsY@Â6gmac0-rmii-refin-clock fixed-clock/gmac0_rmii_refinBOúð€Â5gmac1-rgmii-rxin-clock fixed-clockÊ/gmac1_rgmii_rxinBOsY@Â*gmac1-rmii-refin-clock fixed-clockÊ/gmac1_rmii_refinBOúð€Â)hdmitx0-pixel-clock fixed-clock/hdmitx0_pixelclkBO³Ü@Â>i2srx-bclk-ext-clock fixed-clock/i2srx_bclk_extBO»€Âi2srx-lrck-ext-clock fixed-clock/i2srx_lrck_extBOîÂi2stx-bclk-ext-clock fixed-clock/i2stx_bclk_extBO»€Â&i2stx-lrck-ext-clock fixed-clock/i2stx_lrck_extBOîÂ'mclk-ext-clock fixed-clock /mclk_extBO»€Âoscillator fixed-clockÊ/oscBOn6Â#rtc-oscillator fixed-clock/rtc_oscBO€Â7stmmac-axi-config_k{‹€@ Â2tdm-ext-clock fixed-clock/tdm_extBOîÂsoc simple-bus•  ¦timer@2000000$starfive,jh7110-clintsifive,clint0?ÊP­  cache-controller@2010000,starfive,jh7110-ccachesifive,ccache0cache?@ÁQ@Ìdq ØÂinterrupt-controller@c000000'starfive,jh7110-plicsifive,plic-1.0.0? H­         Ùî æˆ serial@10000000&starfive,jh7110-uartsnps,dw-apb-uart?’‘†baudclkapb_pclkñSTÁ ø»okayÊdefaultserial@10010000&starfive,jh7110-uartsnps,dw-apb-uart?”“†baudclkapb_pclkñUVÁ!ø»okaydefaultserial@10020000&starfive,jh7110-uartsnps,dw-apb-uart?–•†baudclkapb_pclkñWXÁ"ø »disabledi2c@10030000snps,designware-i2c?ІrefñLÁ# »okayO† ',<þTþdefaulti2c@10040000snps,designware-i2c?‹†refñMÁ$  »disabledi2c@10050000snps,designware-i2c?Œ†refñNÁ% »okayO† ',<þTþdefaultspi@10060000arm,pl022arm,primecell?ƒƒ†sspclkapb_pclkñEÁ&l"ƒ »okaydefaultspi@10070000arm,pl022arm,primecell?„„†sspclkapb_pclkñFÁ'l"ƒ  »disabledspi@10080000arm,pl022arm,primecell?……†sspclkapb_pclkñGÁ(l"ƒ  »disabledtdm@10090000starfive,jh7110-tdm? ,¸¹º»4†tdm_ahbtdm_apbtdm_internaltdmmclk_innertdm_extñikjŠ�rxtx™ »disabledi2s@100e0000starfive,jh7110-i2srx?<°¯³µ@†i2sclkapbmclkmclk_innermclk_extbclklrckbclk_extlrck_extñcd Š�txrx ª™ »disabledpwmdac@100b0000starfive,jh7110-pwmdac? �ž †apbcoreñ`Š�tx™ »disableddefaultÂHusb@10100000starfive,jh7110-usb¦ º(†lpmstbapbaxiutmi_apb ñ  Îpwrupapbaxiutmi_apb»okayÚhostdefault usb@0 cdns,usb3? âotgxhcidev Ádlnìhostperipheralotgü!"cdns3,usb2-phycdns3,usb3-phyphy@10200000starfive,jh7110-usb-phy? _†125mapp_125m Â!phy@10210000starfive,jh7110-pcie-phy?! ºHô Â"phy@10220000starfive,jh7110-pcie-phy?" ÂCclock-controller@10230000starfive,jh7110-stgcrg?#<#6_7 H†oschifi4_corestg_axiahbusb_125mcpu_bushifi4_axinocstg_busapb_busB*Âsyscon@10240000"starfive,jh7110-stg-sysconsyscon?$Âserial@12000000&starfive,jh7110-uartsnps,dw-apb-uart?˜—†baudclkapb_pclkñYZÁ-ø »disabledserial@12010000&starfive,jh7110-uartsnps,dw-apb-uart?š™†baudclkapb_pclkñ[\Á.ø »disabledserial@12020000&starfive,jh7110-uartsnps,dw-apb-uart?œ›†baudclkapb_pclkñ]^Á/ø »disabledi2c@12030000snps,designware-i2c?�†refñOÁ0  »disabledi2c@12040000snps,designware-i2c?ކrefñPÁ1  »disabledi2c@12050000snps,designware-i2c?�†refñQÁ2 »okayO† ',<þTþdefault$pmic@36x-powers,axp15060?6Ùîregulatorsdcdc17I]2Z u2Z �vcc_3v3Â.dcdc2I]¡ u �vdd_cpuÂaldo47I]w@u2Z  �emmc_vddÂ/eeprom@50 atmel,24c04?PÊœi2c@12060000snps,designware-i2c?�†refñRÁ3 »okayO† ',<þTþdefault%spi@12070000arm,pl022arm,primecell?†††sspclkapb_pclkñHÁ4l"ƒ  »disabledspi@12080000arm,pl022arm,primecell?‡‡†sspclkapb_pclkñIÁ5l"ƒ  »disabledspi@12090000arm,pl022arm,primecell? ˆˆ†sspclkapb_pclkñJÁ6l"ƒ  »disabledspi@120a0000arm,pl022arm,primecell? ‰‰†sspclkapb_pclkñKÁ7l"ƒ  »disabledi2s@120b0000starfive,jh7110-i2stx0? $¢¡$†i2sclkapbmclkmclk_innermclk_extñefŠ/�tx™ »disabledi2s@120c0000starfive,jh7110-i2stx1? <©¨¬®&'@†i2sclkapbmclkmclk_innermclk_extbclklrckbclk_extlrck_extñghŠ0�tx™ »disabledpwm@120d0000%starfive,jh7110-pwmopencores,pwm-v1? yñl¥»okaydefault(temperature-sensor@120e0000starfive,jh7110-temp?‚� †sensebusñ|{ Îsensebus° spi@13010000#starfive,jh7110-qspicdns,qspi-nor ?!@ÁZWX †refahbapbñ>=?Îqspiqspi-ocprstc_refÆÖæ»okay flash@0jedec,spi-nor?Êû õá+9Gpartitionsfixed-partitions spl@0?uboot-env@f0000?uboot@100000?ðclock-controller@13020000starfive,jh7110-syscrg?Ê<#)*&'+++ކoscgmac1_rmii_refingmac1_rgmii_rxini2stx_bclk_exti2stx_lrck_exti2srx_bclk_exti2srx_lrck_exttdm_extmclk_extpll0_outpll1_outpll2_outB*0UZ+ e+++Y|ÍeJ�|€Âsyscon@13030000-starfive,jh7110-sys-sysconsysconsimple-mfd?Âclock-controllerstarfive,jh7110-pllÊ#BÂ+pinctrl@13040000starfive,jh7110-sys-pinctrl?pñÁVÙî‘¡Â@i2c0-0Âi2c-pins­ 9 :´ÁÎi2c2-0Âi2c-pins­;x<|´ÁÎi2c5-0ÊÂ$i2c-pins­O¨P¬´ÊÁÎi2c6-0Â%i2c-pins­V¸W¼´ÁÎmmc0-0Â-mmc-pins(­@ABCDEFGHIãð Ámmc1-0Â0clk-pins­ÿ7 ãð ÿ #mmc-pins­,9L -:P .;T /ÿwatchdog@13070000starfive,jh7110-wdt?z{ †apbcoreñmnmemory-controller@15700000starfive,jh7110-dmc ?pʆpllñ&'( Îaxioscapbcrypto@16000000starfive,jh7110-crypto?@ †hclkahbÁñŠ,,�txrxdma-controller@16008000arm,pl080arm,primecelll€?€@Á †apb_pclkñ<Sj| �Â,rng@1600c000starfive,jh7110-trng?À@ †hclkahbñÁmmc@16010000starfive,jh7110-mmc?[]†biuciuñ@ÎresetÁJË ˜¯¹|»okayõáU]|úð€ƒÊdefault-ÉÛìù./mmc@16020000starfive,jh7110-mmc?\^†biuciuñAÎresetÁKË ˜¯¹œ>»okayúð€U^|úð€ƒÊ!default02Hethernet@16030000&starfive,jh7110-dwmacsnps,dwmac-5.20?(11m1o†stmmacethpclkptp_reftxgtxñ11Îstmmacethahb Áìmacirqeth_wake_irqeth_lpiVdr@�©ºÉä2ôý ª3 »okay4 rgmii-id'U1e1mdio snps,dwmac-mdioethernet-phy@0?A^|›‚¹ ^ØÜíÜÂ4ethernet@16040000&starfive,jh7110-dwmacsnps,dwmac-5.20?(bafjk†stmmacethpclkptp_reftxgtxñBCÎstmmacethahb ÁNMLìmacirqeth_wake_irqeth_lpiVdr@�©ºÉä2ôý ª� »disableddma-controller@16050000starfive,jh7110-axi-dma?†core-clkcfgr-clkñÁI�    0 @ NÂclock-controller@17000000starfive,jh7110-aoncrg?(#56 l7N†oscgmac0_rmii_refingmac0_rgmii_rxinstg_axiahbapb_busgmac0_gtxclkrtc_oscB*Â1syscon@17010000"starfive,jh7110-aon-sysconsyscon? eÂ3pinctrl@17020000starfive,jh7110-aon-pinctrl?ñ1ÁUÙî‘¡ÂFpower-controller@17030000starfive,jh7110-pmu?Áo eÂ<csi@19800000#starfive,jh7110-csi2rxcdns,csi2rx?€08888 8 8 F†sys_clkp_clkpixel_if0_clkpixel_if1_clkpixel_if2_clkpixel_if3_clk0ñ8 888885Îsysreg_bankpixel_if0pixel_if1pixel_if2pixel_if3ü9dphy »disabledU8|³Ü@ports port@0?port@1?endpoint y:Â=clock-controller@19810000starfive,jh7110-ispcrg?�345;1†isp_top_coreisp_top_axinoc_bus_isp_axidvp_clkñ)*B* ‰<Â8phy@19820000starfive,jh7110-dphy-rx?‚888 †cfgreftxñ88 ‰3 Â9isp@19840000starfive,jh7110-camss ?„‡ âsysconisp888 88 834E†apb_funcwrapper_clk_cdvp_invaxiwrmipi_rx0_pxlispcore_2xisp_axi0ñ888 8 )*6Îwrapper_pwrapper_caxirdaxiwrisp_top_nisp_top_axi ‰<Á\WZX »disabledU88|óO` Í=€ports port@0?port@1?endpoint y=Â:clock-controller@295c0000starfive,jh7110-voutcrg?)\,:=>?¥>V†vout_srcvout_top_ahbvout_top_axivout_top_hdmitx0_mclki2stx0_bclkhdmitx0_pixelclkñ+B* ‰<pcie@940000000starfive,jh7110-pcie ? @+âcfgapb — î8¦‚00à @Á8 ¨` »???? ÉCpciº Øÿ `  †noctlaxi_mst0apb0ñ   Îmst0slv0slvbrgcoreapb »disabled â@ü"defaultAinterrupt-controller îÙÂ?pcie@9c0000000starfive,jh7110-pcie ? À,âcfgapb — î8¦‚88à € €@Á9 ¨` »BBBB ÉCpciº Øÿ `   †noctlaxi_mst0apb0ñÎmst0slv0slvbrgcoreapb»okay â@üCdefaultD îEinterrupt-controller îÙÂBaliases þ/soc/ethernet@16030000 /soc/i2c@10030000 /soc/i2c@10050000 /soc/i2c@12050000 /soc/i2c@12060000 /soc/mmc@16010000 !/soc/mmc@16020000 &/soc/serial@10000000chosen .serial0:115200n8memory@40000000Cmemory?@Êgpio-restart gpio-restart è@# Eàleds gpio-ledsled-0 èFaudio-codeclinux,spdif-dit™ÂIsoundsimple-audio-card :StarFive-PWMDAC-Sound-Card simple-audio-card,dai-link@0? Qleft_j XG hGcpu uHÂGcodec uIregulator-vcc-3v3-pcieregulator-fixed  ’@ �vcc_3v3_pcie]2Z u2Z ÂE compatible#address-cells#size-cellsmodeltimebase-frequencyregdevice_typei-cache-block-sizei-cache-setsi-cache-sizenext-level-cacheriscv,isariscv,isa-baseriscv,isa-extensionsstatusphandlebootph-pre-raminterrupt-controller#interrupt-cellsd-cache-block-sized-cache-setsd-cache-sized-tlb-setsd-tlb-sizei-tlb-setsi-tlb-sizemmu-typetlb-splitoperating-points-v2clocksclock-names#cooling-cellscpu-supplycpuopp-sharedopp-hzopp-microvoltpolling-delay-passivepolling-delaythermal-sensorstripcooling-devicetemperaturehysteresisclock-output-names#clock-cellsclock-frequencysnps,lpi_ensnps,wr_osr_lmtsnps,rd_osr_lmtsnps,bleninterrupt-parentrangesinterrupts-extendedinterruptscache-levelcache-unifiedriscv,ndevresetsreg-io-widthreg-shiftpinctrl-namespinctrl-0i2c-sda-hold-time-nsi2c-sda-falling-time-nsi2c-scl-falling-time-nsarm,primecell-periphidnum-csdmasdma-names#sound-dai-cellsstarfive,sysconstarfive,stg-sysconreset-namesdr_modereg-namesinterrupt-namesphysphy-names#phy-cellsstarfive,sys-syscon#reset-cellsregulator-boot-onregulator-always-onregulator-min-microvoltregulator-max-microvoltregulator-namepagesize#pwm-cells#thermal-sensor-cellscdns,fifo-depthcdns,fifo-widthcdns,trigger-addresscdns,read-delayspi-max-frequencycdns,tshsl-nscdns,tsd2d-nscdns,tchsh-nscdns,tslch-nsassigned-clocksassigned-clock-parentsassigned-clock-ratesgpio-controller#gpio-cellspinmuxbias-disableinput-enableinput-schmitt-enablebias-pull-updrive-strengthinput-disableinput-schmitt-disableslew-ratebias-pull-downlli-bus-interface-ahb1mem-bus-interface-ahb1memcpy-burst-sizememcpy-bus-width#dma-cellsfifo-watermark-aligneddata-addrstarfive,sysregcap-mmc-highspeedcap-mmc-hw-resetmmc-ddr-1_8vmmc-hs200-1_8vvmmc-supplyvqmmc-supplycap-sd-highspeedkeep-power-in-suspendnon-removablerx-fifo-depthtx-fifo-depthsnps,multicast-filter-binssnps,perfect-filter-entriessnps,fixed-burstsnps,no-pbl-x8snps,force_thresh_dma_modesnps,axi-configsnps,tsosnps,txpblsnps,rxpblphy-handlephy-modestarfive,tx-use-rgmii-clkmotorcomm,tx-clk-adj-enabledmotorcomm,tx-clk-100-invertedmotorcomm,tx-clk-1000-invertedmotorcomm,rx-clk-drv-microampmotorcomm,rx-data-drv-microamprx-internal-delay-pstx-internal-delay-psdma-channelssnps,dma-masterssnps,data-widthsnps,block-sizesnps,prioritysnps,axi-max-burst-len#power-domain-cellsremote-endpointpower-domainslinux,pci-domaininterrupt-map-maskinterrupt-mapmsi-controllerbus-rangeperst-gpiosvpcie3v3-supplyethernet0i2c0i2c2i2c5i2c6mmc0mmc1serial0stdout-pathsimple-audio-card,nameformatbitclock-masterframe-mastersound-daienable-active-highgpio